clk: qcom: dispcc-qcm2290: Add MDSS_CORE reset

Add the MDSS_CORE reset which can be asserted to reset the state of
the entire MDSS.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230316-topic-qcm_dispcc_reset-v1-2-dd3708853014@linaro.org

diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c
index 2ebd9a02b8950545386de4e5fab4fb6f729f4944..cbb5f1ec6a54e3c0ac69cb4c325e8889ae4e778d 100644 (file)
--- a/drivers/clk/qcom/dispcc-qcm2290.c
+++ b/drivers/clk/qcom/dispcc-qcm2290.c
@@ -20,6 +20,7 @@
 #include "clk-regmap-divider.h"
 #include "common.h"
 #include "gdsc.h"
+#include "reset.h"
 
 enum {
        P_BI_TCXO,
@@ -445,6 +446,10 @@ static struct clk_branch disp_cc_sleep_clk = {
        },
 };
 
+static const struct qcom_reset_map disp_cc_qcm2290_resets[] = {
+       [DISP_CC_MDSS_CORE_BCR] = { 0x2000 },
+};
+
 static struct gdsc mdss_gdsc = {
        .gdscr = 0x3000,
        .pd = {
@@ -494,6 +499,8 @@ static const struct qcom_cc_desc disp_cc_qcm2290_desc = {
        .num_clks = ARRAY_SIZE(disp_cc_qcm2290_clocks),
        .gdscs = disp_cc_qcm2290_gdscs,
        .num_gdscs = ARRAY_SIZE(disp_cc_qcm2290_gdscs),
+       .resets = disp_cc_qcm2290_resets,
+       .num_resets = ARRAY_SIZE(disp_cc_qcm2290_resets),
 };
 
 static const struct of_device_id disp_cc_qcm2290_match_table[] = {