]> xenbits.xensource.com Git - people/dariof/xen.git/commitdiff
xen/arm32: entry: Add missing trap_reset entry
authorJulien Grall <julien.grall@linaro.org>
Fri, 2 Feb 2018 14:19:21 +0000 (14:19 +0000)
committerStefano Stabellini <sstabellini@kernel.org>
Fri, 2 Feb 2018 19:34:47 +0000 (11:34 -0800)
At the moment, the reset vector is defined as .word 0 (e.g andeq r0, r0,
r0).

This is rather unintuitive and will result to execute the trap
undefined. Instead introduce trap helpers for reset and will generate an
error message in the unlikely case that reset will be called.

This is part of XSA-254.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
xen/arch/arm/arm32/entry.S
xen/arch/arm/arm32/traps.c

index c6490d2847c07657f414346db5428c350ee78fbe..64876c118417e739cb926c2e47a45e350333bd5d 100644 (file)
@@ -137,7 +137,7 @@ trap_##trap:                                                            \
 
         .align 5
 GLOBAL(hyp_traps_vector)
-        .word 0                         /* 0x00 - Reset */
+        b trap_reset                    /* 0x00 - Reset */
         b trap_undefined_instruction    /* 0x04 - Undefined Instruction */
         b trap_hypervisor_call          /* 0x08 - Hypervisor Call */
         b trap_prefetch_abort           /* 0x0c - Prefetch Abort */
@@ -146,6 +146,7 @@ GLOBAL(hyp_traps_vector)
         b trap_irq                      /* 0x18 - IRQ */
         b trap_fiq                      /* 0x1c - FIQ */
 
+DEFINE_TRAP_ENTRY(reset)
 DEFINE_TRAP_ENTRY(undefined_instruction)
 DEFINE_TRAP_ENTRY(hypervisor_call)
 DEFINE_TRAP_ENTRY(prefetch_abort)
index 705255883edde8acf5bc25994b5cf4b989c7d517..4f27543dec1f39fc23054a4bace48f8ca778d242 100644 (file)
 
 #include <asm/processor.h>
 
+void do_trap_reset(struct cpu_user_regs *regs)
+{
+    do_unexpected_trap("Reset", regs);
+}
+
 void do_trap_undefined_instruction(struct cpu_user_regs *regs)
 {
     uint32_t pc = regs->pc;