x86/VPMU: don't allow any non-zero writes to MSR_IA32_PEBS_ENABLE

x86/VPMU: don't allow any non-zero writes to MSR_IA32_PEBS_ENABLE

Calculation reserved bits for MSR_IA32_PEBS_ENABLE is model-dependent
and since we don't support PEBS anyway we shouldn't allow any writes to
it (but let's still permit guests wishing to disable PEBS).

We should also report PEBS as unsupported to HVM, just like we do on PV.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>