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target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg misc
authorPeter Maydell <peter.maydell@linaro.org>
Sat, 8 Feb 2014 14:46:56 +0000 (14:46 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Sat, 8 Feb 2014 14:46:56 +0000 (14:46 +0000)
commiteffa8e06435e6a47a3a21e50fd638b6fb29e616a
tree4b2fc094f5375ab2da7e2ecb673f142ce3a77be2tree
parentc0b2b5fa3651caff0b33621583a3709a8875e85fcommit | diff
target-arm: A64: Add SIMD simple 64 bit insns from scalar 2-reg misc

Implement the simple 64 bit integer operations from the SIMD
scalar 2-register misc group (C3.6.12): the comparisons against
zero, plus ABS and NEG.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
target-arm/translate-a64.c diff | blob | history
Obsolete Upstream Qemu based repository for xen-4.6-testing