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(parent: 7a3a009) | patch
tcg/optimize: fix known-zero bits for right shift ops
authorAurelien Jarno <aurelien@aurel32.net>
Tue, 3 Sep 2013 06:27:38 +0000 (08:27 +0200)
committerRichard Henderson <rth@twiddle.net>
Mon, 17 Feb 2014 16:12:28 +0000 (10:12 -0600)
commite46b225a3137e62c975c49aaae7bb5f9583cc428
treeaba700db46bf9759e561945e7b4b753c27db4e80tree
parent7a3a00979d9dfe2aaa66ce5fc68cd161b4f900bacommit | diff
tcg/optimize: fix known-zero bits for right shift ops

32-bit versions of sar and shr ops should not propagate known-zero bits
from the unused 32 high bits. For sar it could even lead to wrong code
being generated.

Cc: qemu-stable@nongnu.org
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg/optimize.c diff | blob | history
Obsolete Upstream Qemu based repository for xen-4.5-testing