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target-arm: A64: Implement minimal set of EL0-visible sysregs
authorPeter Maydell <peter.maydell@linaro.org>
Sat, 4 Jan 2014 22:15:45 +0000 (22:15 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 7 Jan 2014 19:17:59 +0000 (19:17 +0000)
commitb0d2b7d0f084f6b33acf7c722790da683916fee3
treeb54464113094ead3227aa55fde63c3de0aba7358tree
parentfea505221eaf87889000378d4d33ad0dfd5f4d9dcommit | diff
target-arm: A64: Implement minimal set of EL0-visible sysregs

Implement an initial minimal set of EL0-visible system registers:
 * NZCV
 * FPCR
 * FPSR
 * CTR_EL0
 * DCZID_EL0

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
target-arm/cpu.h diff | blob | blame | history
target-arm/helper.c diff | blob | blame | history
target-arm/translate-a64.c diff | blob | blame | history
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