]> xenbits.xensource.com Git - xen.git/commit
xen/arm: Implement workaround for Cortex A-57 and Cortex A72 AT speculate
authorJulien Grall <julien.grall@arm.com>
Tue, 24 Sep 2019 10:39:10 +0000 (11:39 +0100)
committerStefano Stabellini <sstabellini@kernel.org>
Tue, 29 Oct 2019 17:54:58 +0000 (10:54 -0700)
commitab1e6a7f13cf9a71aaa68dd342020c95a1b8dc67
tree512c8e87dbabf706fc566bca663e502785563754
parent801acf814bab999efd74a678dedced0f2121196b
xen/arm: Implement workaround for Cortex A-57 and Cortex A72 AT speculate

Both Cortex-A57 (erratum 1319537) and Cortex-A72 (erratum 1319367) can
end with corrupted TLBs if they speculate an AT instruction while S1/S2
system registers in inconsistent state.

The workaround is the same as for Cortex A-76 implemented by commit
a18be06aca "xen/arm: Implement workaround for Cortex-A76 erratum 1165522",
so it is only necessary to plumb in the cpuerrata framework.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
(cherry picked from commit 07e44b3d1be32fa2165c2367ae3ef9c6c8b39e1e)
docs/misc/arm/silicon-errata.txt
xen/arch/arm/cpuerrata.c