]> xenbits.xensource.com Git - xen.git/commit
x86/pv: Hide more EFER bits from PV guests
authorAndrew Cooper <andrew.cooper3@citrix.com>
Fri, 18 May 2018 09:47:37 +0000 (11:47 +0200)
committerJan Beulich <jbeulich@suse.com>
Fri, 18 May 2018 09:47:37 +0000 (11:47 +0200)
commitaaf66de7c547e7cbe10d4fb5cc8b8f99238404a8
treefb2b2066f58d5e7418c9e0bca85c058443886781
parent7e21b75a21dbd9eabd6d8df057d330dda5813201
x86/pv: Hide more EFER bits from PV guests

We don't advertise SVM in CPUID so a PV guest shouldn't be under the
impression that it can use SVM functionality, but despite this, it really
shouldn't see SVME set when reading EFER.

On Intel processors, 32bit PV guests don't see, and can't use SYSCALL.

Introduce EFER_KNOWN_MASK to whitelist the features Xen knows about, and use
this to clamp the guests view.

Take the opportunity to reuse the mask to simplify svm_vmcb_isvalid(), and
change "undefined" to "unknown" in the print message, as there is at least
EFER.TCE (Translation Cache Extension) defined but unknown to Xen.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
master commit: 589263031c04e2ba527783b4e04e8df27d364769
master date: 2018-05-07 11:52:57 +0100
xen/arch/x86/hvm/svm/svmdebug.c
xen/arch/x86/pv/emul-priv-op.c
xen/include/asm-x86/msr-index.h