]> xenbits.xensource.com Git - qemu-xen.git/commit
hw/misc/stm32l4x5_rcc: Handle Register Updates
authorArnaud Minier <arnaud.minier@telecom-paris.fr>
Sun, 3 Mar 2024 14:06:40 +0000 (15:06 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 5 Mar 2024 13:22:56 +0000 (13:22 +0000)
commit9c796d503f9d2ee2f6948964d972a7ef23b62033
tree8e13b6c9227e2030a9bc84d5994bcab3e76b30ac
parent141c29a23bb8eb63c04199a2c3653195ca14f76a
hw/misc/stm32l4x5_rcc: Handle Register Updates

Update the RCC state and propagate frequency changes when writing to the
RCC registers. Currently, ICSCR, CIER, the reset registers and the stop
mode registers are not implemented.

Some fields  have not been implemented due to uncertainty about
how to handle them (Like the clock security system or bypassing
mecanisms).

Signed-off-by: Arnaud Minier <arnaud.minier@telecom-paris.fr>
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr>
Message-id: 20240303140643.81957-6-arnaud.minier@telecom-paris.fr
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
hw/misc/stm32l4x5_rcc.c