]> xenbits.xensource.com Git - libvirt.git/commit
cpu: Add Haswell-noTSX-IBRS CPU model
authorJiri Denemark <jdenemar@redhat.com>
Tue, 9 Jan 2018 19:40:03 +0000 (20:40 +0100)
committerJiri Denemark <jdenemar@redhat.com>
Wed, 17 Jan 2018 16:07:03 +0000 (17:07 +0100)
commit7dd85ff62d7080b52d4d175f53ad5eb11cdcfb9c
tree3bc5985f4f0967040aaed9f0b77eb888d5613451
parent203c92e9cc2db854199b39ef3ffcc10406d3c59e
cpu: Add Haswell-noTSX-IBRS CPU model

This is a variant of Haswell-noTSX with indirect branch prediction
protection. The only difference between Haswell-noTSX and
Haswell-noTSX-IBRS is the added "spec-ctrl" feature.

The Haswell-noTSX-IBRS model in QEMU is a bit different since
Haswell-noTSX got several additional features since we added it in
cpu_map.xml:
    arat, abm, f16c, rdrand, vme, xsaveopt

Adding them only to the -IBRS variant would confuse our CPU detection
code.

Signed-off-by: Jiri Denemark <jdenemar@redhat.com>
Reviewed-by: Pavel Hrdina <phrdina@redhat.com>
src/cpu/cpu_map.xml
tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-guest.xml
tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-host.xml
tests/cputestdata/x86_64-cpuid-Xeon-E5-2609-v3-json.xml