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(parent: 0261157) | patch
xen: arm: drop cache maintenance by set/way trap handling
authorIan Campbell <ian.campbell@citrix.com>
Mon, 30 Mar 2015 11:12:28 +0000 (12:12 +0100)
committerIan Campbell <ian.campbell@citrix.com>
Tue, 31 Mar 2015 08:42:47 +0000 (09:42 +0100)
commit7b29eaeade8fab1dbf4e07c019167c4a6f71515a
tree14c8138c12ffe06037e60b62485b230cbfc4f683tree
parent0261157229f1213e89636dc4d6c08b910121a8eacommit | diff
xen: arm: drop cache maintenance by set/way trap handling

We do not set HCR_EL2.TSW so we will never see these.

This is undoubtedly wrong, but for now remove the dead code.

However, retain the HSR_SYSREG_* added by the precursor to this patch,
although they aren't used they are factually accurate and may as well
be kept for future use.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Julien Grall <julien.grall@linaro.org>
xen/arch/arm/traps.c diff | blob | blame | history
xen/include/asm-arm/sysregs.h diff | blob | blame | history
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