]> xenbits.xensource.com Git - qemu-xen.git/commit
hw/riscv/sifive_e: Create a SiFive E SoC object
authorAlistair Francis <alistair.francis@wdc.com>
Thu, 3 May 2018 23:54:02 +0000 (16:54 -0700)
committerAlistair Francis <alistair.francis@wdc.com>
Thu, 5 Jul 2018 22:24:25 +0000 (15:24 -0700)
commit651cd8b7e18eda46a36cf073428452d04bb354f2
treed37a22003723aa50dfd6e8dbc7f604e8d8999172
parent2308092b2b78e6e083092bd3599cec6a0769319e
hw/riscv/sifive_e: Create a SiFive E SoC object

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Michael Clark <mjc@sifive.com>
hw/riscv/sifive_e.c
include/hw/riscv/sifive_e.h