]> xenbits.xensource.com Git - qemu-xen.git/commit
target/riscv: Relax fld alignment requirement
authorLIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Fri, 2 Aug 2024 07:24:17 +0000 (15:24 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 6 Aug 2024 04:18:41 +0000 (14:18 +1000)
commit5e54b439f5be1e604453d9b02d85685a266121da
tree6f87d0eef0dfb4a767a0305bf58fdf08d38fd0b5
parent30d24145da72dc3f64d9d720ac2befad28e1daa2
target/riscv: Relax fld alignment requirement

According to the risc-v specification:
"FLD and FSD are only guaranteed to execute atomically if the effective
address is naturally aligned and XLEN≥64."

We currently implement fld as MO_ATOM_IFALIGN when XLEN < 64, which does
not violate the rules. But it will hide some problems. So relax it to
MO_ATOM_NONE.

Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240802072417.659-4-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/insn_trans/trans_rvd.c.inc