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(parent: 1e5d8ca) | patch
char/cadence_uart: Implement Tx flow control
authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Mon, 6 Jan 2014 10:16:40 +0000 (10:16 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Wed, 8 Jan 2014 19:07:21 +0000 (19:07 +0000)
commit38acd64b1cc8b9589e155d16ba4a0ccf9dc95ae4
tree17f8a3309f283f2ccb971924bcfaf36809cc7588tree
parent1e5d8cacb7fe509aa793ad844105fbc4fe02e015commit | diff
char/cadence_uart: Implement Tx flow control

If the UART back-end blocks, buffer in the Tx FIFO to try again later.
This stops the IO-thread busy waiting on char back-ends (which causes
all sorts of performance problems).

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 4bea048b3ab38425701d82ccc1ab92545c26b79c.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/char/cadence_uart.c diff | blob | history
Obsolete Upstream Qemu based repository for xen-4.5-testing