]> xenbits.xensource.com Git - xen.git/commit
x86/spec-ctrl: Rework SPEC_CTRL_ENTRY_FROM_INTR_IST
authorAndrew Cooper <andrew.cooper3@citrix.com>
Fri, 1 Jul 2022 14:59:40 +0000 (15:59 +0100)
committerAndrew Cooper <andrew.cooper3@citrix.com>
Tue, 12 Jul 2022 15:25:33 +0000 (16:25 +0100)
commit2a9e690a0ad5d54dca4166e089089a07bbe7fc85
tree88aa8532bc0d3baf2e9f31924c22614ed450538f
parente7671561c84322860875745e57b228a7a310f2bf
x86/spec-ctrl: Rework SPEC_CTRL_ENTRY_FROM_INTR_IST

We are shortly going to add a conditional IBPB in this path.

Therefore, we cannot hold spec_ctrl_flags in %eax, and rely on only clobbering
it after we're done with its contents.  %rbx is available for use, and the
more normal register to hold preserved information in.

With %rax freed up, use it instead of %rdx for the RSB tmp register, and for
the adjustment to spec_ctrl_flags.

This leaves no use of %rdx, except as 0 for the upper half of WRMSR.  In
practice, %rdx is 0 from SAVE_ALL on all paths and isn't likely to change in
the foreseeable future, so update the macro entry requirements to state this
dependency.  This marginal optimisation can be revisited if circumstances
change.

No practical change.

This is part of XSA-407.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
(cherry picked from commit e9b8d31981f184c6539f91ec54bd9cae29cdae36)
xen/arch/x86/x86_64/entry.S
xen/include/asm-x86/spec_ctrl_asm.h