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(parent: 7acafcf) | patch
target/riscv: correct the gvec IR called in gen_vec_rsub16_i64()
authorFrank Chang <frank.chang@sifive.com>
Fri, 10 Jul 2020 10:48:16 +0000 (18:48 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Tue, 14 Jul 2020 00:25:37 +0000 (17:25 -0700)
commit1989205c4e973bc7f9fac0ce0700993f30582538
tree7019f97dd872ea4db7bf69fe38a0a1d400fffb00tree
parent7acafcfa844fd93f5ff073077007627338bd6739commit | diff
target/riscv: correct the gvec IR called in gen_vec_rsub16_i64()

Signed-off-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20200710104920.13550-3-frank.chang@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/insn_trans/trans_rvv.inc.c diff | blob | blame | history
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