ia64/xen-unstable

changeset 8936:ff83b29ebe9a

Add arch/i386/Kconfig.cpu to sparse tree.

Signed-off-by: Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
author cl349@firebug.cl.cam.ac.uk
date Mon Feb 20 17:15:14 2006 +0000 (2006-02-20)
parents e9e319c61a1e
children f572c467d9c3
files linux-2.6-xen-sparse/arch/i386/Kconfig.cpu
line diff
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/linux-2.6-xen-sparse/arch/i386/Kconfig.cpu	Mon Feb 20 17:15:14 2006 +0000
     1.3 @@ -0,0 +1,315 @@
     1.4 +# Put here option for CPU selection and depending optimization
     1.5 +if !X86_ELAN
     1.6 +
     1.7 +choice
     1.8 +	prompt "Processor family"
     1.9 +	default M686
    1.10 +
    1.11 +config M386
    1.12 +	bool "386"
    1.13 +	---help---
    1.14 +	  This is the processor type of your CPU. This information is used for
    1.15 +	  optimizing purposes. In order to compile a kernel that can run on
    1.16 +	  all x86 CPU types (albeit not optimally fast), you can specify
    1.17 +	  "386" here.
    1.18 +
    1.19 +	  The kernel will not necessarily run on earlier architectures than
    1.20 +	  the one you have chosen, e.g. a Pentium optimized kernel will run on
    1.21 +	  a PPro, but not necessarily on a i486.
    1.22 +
    1.23 +	  Here are the settings recommended for greatest speed:
    1.24 +	  - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
    1.25 +	  486DLC/DLC2, UMC 486SX-S and NexGen Nx586.  Only "386" kernels
    1.26 +	  will run on a 386 class machine.
    1.27 +	  - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
    1.28 +	  SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
    1.29 +	  - "586" for generic Pentium CPUs lacking the TSC
    1.30 +	  (time stamp counter) register.
    1.31 +	  - "Pentium-Classic" for the Intel Pentium.
    1.32 +	  - "Pentium-MMX" for the Intel Pentium MMX.
    1.33 +	  - "Pentium-Pro" for the Intel Pentium Pro.
    1.34 +	  - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
    1.35 +	  - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
    1.36 +	  - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
    1.37 +	  - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
    1.38 +	  - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
    1.39 +	  - "Crusoe" for the Transmeta Crusoe series.
    1.40 +	  - "Efficeon" for the Transmeta Efficeon series.
    1.41 +	  - "Winchip-C6" for original IDT Winchip.
    1.42 +	  - "Winchip-2" for IDT Winchip 2.
    1.43 +	  - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
    1.44 +	  - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
    1.45 +	  - "Geode GX/LX" For AMD Geode GX and LX processors.
    1.46 +	  - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
    1.47 +	  - "VIA C3-2 for VIA C3-2 "Nehemiah" (model 9 and above).
    1.48 +
    1.49 +	  If you don't know what to do, choose "386".
    1.50 +
    1.51 +config M486
    1.52 +	bool "486"
    1.53 +	help
    1.54 +	  Select this for a 486 series processor, either Intel or one of the
    1.55 +	  compatible processors from AMD, Cyrix, IBM, or Intel.  Includes DX,
    1.56 +	  DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
    1.57 +	  U5S.
    1.58 +
    1.59 +config M586
    1.60 +	bool "586/K5/5x86/6x86/6x86MX"
    1.61 +	help
    1.62 +	  Select this for an 586 or 686 series processor such as the AMD K5,
    1.63 +	  the Cyrix 5x86, 6x86 and 6x86MX.  This choice does not
    1.64 +	  assume the RDTSC (Read Time Stamp Counter) instruction.
    1.65 +
    1.66 +config M586TSC
    1.67 +	bool "Pentium-Classic"
    1.68 +	help
    1.69 +	  Select this for a Pentium Classic processor with the RDTSC (Read
    1.70 +	  Time Stamp Counter) instruction for benchmarking.
    1.71 +
    1.72 +config M586MMX
    1.73 +	bool "Pentium-MMX"
    1.74 +	help
    1.75 +	  Select this for a Pentium with the MMX graphics/multimedia
    1.76 +	  extended instructions.
    1.77 +
    1.78 +config M686
    1.79 +	bool "Pentium-Pro"
    1.80 +	help
    1.81 +	  Select this for Intel Pentium Pro chips.  This enables the use of
    1.82 +	  Pentium Pro extended instructions, and disables the init-time guard
    1.83 +	  against the f00f bug found in earlier Pentiums.
    1.84 +
    1.85 +config MPENTIUMII
    1.86 +	bool "Pentium-II/Celeron(pre-Coppermine)"
    1.87 +	help
    1.88 +	  Select this for Intel chips based on the Pentium-II and
    1.89 +	  pre-Coppermine Celeron core.  This option enables an unaligned
    1.90 +	  copy optimization, compiles the kernel with optimization flags
    1.91 +	  tailored for the chip, and applies any applicable Pentium Pro
    1.92 +	  optimizations.
    1.93 +
    1.94 +config MPENTIUMIII
    1.95 +	bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
    1.96 +	help
    1.97 +	  Select this for Intel chips based on the Pentium-III and
    1.98 +	  Celeron-Coppermine core.  This option enables use of some
    1.99 +	  extended prefetch instructions in addition to the Pentium II
   1.100 +	  extensions.
   1.101 +
   1.102 +config MPENTIUMM
   1.103 +	bool "Pentium M"
   1.104 +	help
   1.105 +	  Select this for Intel Pentium M (not Pentium-4 M)
   1.106 +	  notebook chips.
   1.107 +
   1.108 +config MPENTIUM4
   1.109 +	bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/Xeon"
   1.110 +	help
   1.111 +	  Select this for Intel Pentium 4 chips.  This includes the
   1.112 +	  Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
   1.113 +	  (not Pentium M) chips.  This option enables compile flags
   1.114 +	  optimized for the chip, uses the correct cache shift, and
   1.115 +	  applies any applicable Pentium III optimizations.
   1.116 +
   1.117 +config MK6
   1.118 +	bool "K6/K6-II/K6-III"
   1.119 +	help
   1.120 +	  Select this for an AMD K6-family processor.  Enables use of
   1.121 +	  some extended instructions, and passes appropriate optimization
   1.122 +	  flags to GCC.
   1.123 +
   1.124 +config MK7
   1.125 +	bool "Athlon/Duron/K7"
   1.126 +	help
   1.127 +	  Select this for an AMD Athlon K7-family processor.  Enables use of
   1.128 +	  some extended instructions, and passes appropriate optimization
   1.129 +	  flags to GCC.
   1.130 +
   1.131 +config MK8
   1.132 +	bool "Opteron/Athlon64/Hammer/K8"
   1.133 +	help
   1.134 +	  Select this for an AMD Opteron or Athlon64 Hammer-family processor.  Enables
   1.135 +	  use of some extended instructions, and passes appropriate optimization
   1.136 +	  flags to GCC.
   1.137 +
   1.138 +config MCRUSOE
   1.139 +	bool "Crusoe"
   1.140 +	help
   1.141 +	  Select this for a Transmeta Crusoe processor.  Treats the processor
   1.142 +	  like a 586 with TSC, and sets some GCC optimization flags (like a
   1.143 +	  Pentium Pro with no alignment requirements).
   1.144 +
   1.145 +config MEFFICEON
   1.146 +	bool "Efficeon"
   1.147 +	help
   1.148 +	  Select this for a Transmeta Efficeon processor.
   1.149 +
   1.150 +config MWINCHIPC6
   1.151 +	bool "Winchip-C6"
   1.152 +	help
   1.153 +	  Select this for an IDT Winchip C6 chip.  Linux and GCC
   1.154 +	  treat this chip as a 586TSC with some extended instructions
   1.155 +	  and alignment requirements.
   1.156 +
   1.157 +config MWINCHIP2
   1.158 +	bool "Winchip-2"
   1.159 +	help
   1.160 +	  Select this for an IDT Winchip-2.  Linux and GCC
   1.161 +	  treat this chip as a 586TSC with some extended instructions
   1.162 +	  and alignment requirements.
   1.163 +
   1.164 +config MWINCHIP3D
   1.165 +	bool "Winchip-2A/Winchip-3"
   1.166 +	help
   1.167 +	  Select this for an IDT Winchip-2A or 3.  Linux and GCC
   1.168 +	  treat this chip as a 586TSC with some extended instructions
   1.169 +	  and alignment reqirements.  Also enable out of order memory
   1.170 +	  stores for this CPU, which can increase performance of some
   1.171 +	  operations.
   1.172 +
   1.173 +config MGEODEGX1
   1.174 +	bool "GeodeGX1"
   1.175 +	help
   1.176 +	  Select this for a Geode GX1 (Cyrix MediaGX) chip.
   1.177 +
   1.178 +config MGEODE_LX
   1.179 +       bool "Geode GX/LX"
   1.180 +       help
   1.181 +         Select this for AMD Geode GX and LX processors.
   1.182 +
   1.183 +config MCYRIXIII
   1.184 +	bool "CyrixIII/VIA-C3"
   1.185 +	help
   1.186 +	  Select this for a Cyrix III or C3 chip.  Presently Linux and GCC
   1.187 +	  treat this chip as a generic 586. Whilst the CPU is 686 class,
   1.188 +	  it lacks the cmov extension which gcc assumes is present when
   1.189 +	  generating 686 code.
   1.190 +	  Note that Nehemiah (Model 9) and above will not boot with this
   1.191 +	  kernel due to them lacking the 3DNow! instructions used in earlier
   1.192 +	  incarnations of the CPU.
   1.193 +
   1.194 +config MVIAC3_2
   1.195 +	bool "VIA C3-2 (Nehemiah)"
   1.196 +	help
   1.197 +	  Select this for a VIA C3 "Nehemiah". Selecting this enables usage
   1.198 +	  of SSE and tells gcc to treat the CPU as a 686.
   1.199 +	  Note, this kernel will not boot on older (pre model 9) C3s.
   1.200 +
   1.201 +endchoice
   1.202 +
   1.203 +config X86_GENERIC
   1.204 +       bool "Generic x86 support"
   1.205 +       help
   1.206 +	  Instead of just including optimizations for the selected
   1.207 +	  x86 variant (e.g. PII, Crusoe or Athlon), include some more
   1.208 +	  generic optimizations as well. This will make the kernel
   1.209 +	  perform better on x86 CPUs other than that selected.
   1.210 +
   1.211 +	  This is really intended for distributors who need more
   1.212 +	  generic optimizations.
   1.213 +
   1.214 +endif
   1.215 +
   1.216 +#
   1.217 +# Define implied options from the CPU selection here
   1.218 +#
   1.219 +config X86_CMPXCHG
   1.220 +	bool
   1.221 +	depends on !M386
   1.222 +	default y
   1.223 +
   1.224 +config X86_XADD
   1.225 +	bool
   1.226 +	depends on !M386
   1.227 +	default y
   1.228 +
   1.229 +config X86_L1_CACHE_SHIFT
   1.230 +	int
   1.231 +	default "7" if MPENTIUM4 || X86_GENERIC
   1.232 +	default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
   1.233 +	default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
   1.234 +	default "6" if MK7 || MK8 || MPENTIUMM
   1.235 +
   1.236 +config RWSEM_GENERIC_SPINLOCK
   1.237 +	bool
   1.238 +	depends on M386
   1.239 +	default y
   1.240 +
   1.241 +config RWSEM_XCHGADD_ALGORITHM
   1.242 +	bool
   1.243 +	depends on !M386
   1.244 +	default y
   1.245 +
   1.246 +config GENERIC_CALIBRATE_DELAY
   1.247 +	bool
   1.248 +	default y
   1.249 +
   1.250 +config X86_PPRO_FENCE
   1.251 +	bool
   1.252 +	depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
   1.253 +	default y
   1.254 +
   1.255 +config X86_F00F_BUG
   1.256 +	bool
   1.257 +	depends on M586MMX || M586TSC || M586 || M486 || M386
   1.258 +	default y
   1.259 +
   1.260 +config X86_WP_WORKS_OK
   1.261 +	bool
   1.262 +	depends on !M386
   1.263 +	default y
   1.264 +
   1.265 +config X86_INVLPG
   1.266 +	bool
   1.267 +	depends on !M386
   1.268 +	default y
   1.269 +
   1.270 +config X86_BSWAP
   1.271 +	bool
   1.272 +	depends on !M386
   1.273 +	default y
   1.274 +
   1.275 +config X86_POPAD_OK
   1.276 +	bool
   1.277 +	depends on !M386
   1.278 +	default y
   1.279 +
   1.280 +config X86_CMPXCHG64
   1.281 +	bool
   1.282 +	depends on !M386 && !M486
   1.283 +	default y
   1.284 +
   1.285 +config X86_ALIGNMENT_16
   1.286 +	bool
   1.287 +	depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
   1.288 +	default y
   1.289 +
   1.290 +config X86_GOOD_APIC
   1.291 +	bool
   1.292 +	depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON
   1.293 +	default y
   1.294 +
   1.295 +config X86_INTEL_USERCOPY
   1.296 +	bool
   1.297 +	depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON
   1.298 +	default y
   1.299 +
   1.300 +config X86_USE_PPRO_CHECKSUM
   1.301 +	bool
   1.302 +	depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX
   1.303 +	default y
   1.304 +
   1.305 +config X86_USE_3DNOW
   1.306 +	bool
   1.307 +	depends on MCYRIXIII || MK7 || MGEODE_LX
   1.308 +	default y
   1.309 +
   1.310 +config X86_OOSTORE
   1.311 +	bool
   1.312 +	depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
   1.313 +	default y
   1.314 +
   1.315 +config X86_TSC
   1.316 +	bool
   1.317 +	depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MGEODEGX1) && !X86_NUMAQ
   1.318 +	default y