ia64/xen-unstable

changeset 11812:fd79ca20d91a

[IA64] tlbflush_clock

This patch introduces xen compile time option, xen_ia64_tlbflush_clock=y.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author awilliam@xenbuild.aw
date Tue Oct 17 14:16:19 2006 -0600 (2006-10-17)
parents 8b8c49d35d43
children de50245ad4e3
files xen/arch/ia64/Rules.mk xen/arch/ia64/linux-xen/tlb.c xen/arch/ia64/xen/Makefile xen/arch/ia64/xen/domain.c xen/arch/ia64/xen/flushtlb.c xen/arch/ia64/xen/vhpt.c xen/include/asm-ia64/domain.h xen/include/asm-ia64/flushtlb.h xen/include/asm-ia64/mm.h xen/include/asm-ia64/perfc_defn.h xen/include/asm-ia64/tlb_track.h xen/include/asm-ia64/tlbflush.h xen/include/asm-ia64/vhpt.h
line diff
     1.1 --- a/xen/arch/ia64/Rules.mk	Tue Oct 17 11:41:03 2006 -0600
     1.2 +++ b/xen/arch/ia64/Rules.mk	Tue Oct 17 14:16:19 2006 -0600
     1.3 @@ -9,6 +9,7 @@ xen_ia64_expose_p2m	?= y
     1.4  xen_ia64_pervcpu_vhpt	?= y
     1.5  xen_ia64_tlb_track	?= y
     1.6  xen_ia64_tlb_track_cnt	?= n
     1.7 +xen_ia64_tlbflush_clock	?= y
     1.8  
     1.9  ifneq ($(COMPILE_ARCH),$(TARGET_ARCH))
    1.10  CROSS_COMPILE ?= /usr/local/sp_env/v2.2.5/i686/bin/ia64-unknown-linux-
    1.11 @@ -52,6 +53,9 @@ endif
    1.12  ifeq ($(xen_ia64_tlb_track_cnt),y)
    1.13  CFLAGS	+= -DCONFIG_TLB_TRACK_CNT
    1.14  endif
    1.15 +ifeq ($(xen_ia64_tlbflush_clock),y)
    1.16 +CFLAGS += -DCONFIG_XEN_IA64_TLBFLUSH_CLOCK
    1.17 +endif
    1.18  ifeq ($(no_warns),y)
    1.19  CFLAGS	+= -Wa,--fatal-warnings -Werror -Wno-uninitialized
    1.20  endif
     2.1 --- a/xen/arch/ia64/linux-xen/tlb.c	Tue Oct 17 11:41:03 2006 -0600
     2.2 +++ b/xen/arch/ia64/linux-xen/tlb.c	Tue Oct 17 14:16:19 2006 -0600
     2.3 @@ -111,7 +111,10 @@ void
     2.4  local_flush_tlb_all (void)
     2.5  {
     2.6  	unsigned long i, j, flags, count0, count1, stride0, stride1, addr;
     2.7 -
     2.8 +#ifdef XEN
     2.9 +	/* increment flush clock before mTLB flush */
    2.10 +	u32 flush_time = tlbflush_clock_inc_and_return();
    2.11 +#endif
    2.12  	addr    = local_cpu_data->ptce_base;
    2.13  	count0  = local_cpu_data->ptce_count[0];
    2.14  	count1  = local_cpu_data->ptce_count[1];
    2.15 @@ -128,6 +131,10 @@ local_flush_tlb_all (void)
    2.16  	}
    2.17  	local_irq_restore(flags);
    2.18  	ia64_srlz_i();			/* srlz.i implies srlz.d */
    2.19 +#ifdef XEN
    2.20 +	/* update after mTLB flush. */
    2.21 +	tlbflush_update_time(&__get_cpu_var(tlbflush_time), flush_time);
    2.22 +#endif
    2.23  }
    2.24  EXPORT_SYMBOL(local_flush_tlb_all);
    2.25  
     3.1 --- a/xen/arch/ia64/xen/Makefile	Tue Oct 17 11:41:03 2006 -0600
     3.2 +++ b/xen/arch/ia64/xen/Makefile	Tue Oct 17 14:16:19 2006 -0600
     3.3 @@ -30,3 +30,4 @@ obj-y += xencomm.o
     3.4  
     3.5  obj-$(crash_debug) += gdbstub.o
     3.6  obj-$(xen_ia64_tlb_track) += tlb_track.o
     3.7 +obj-$(xen_ia64_tlbflush_clock) += flushtlb.o
     4.1 --- a/xen/arch/ia64/xen/domain.c	Tue Oct 17 11:41:03 2006 -0600
     4.2 +++ b/xen/arch/ia64/xen/domain.c	Tue Oct 17 14:16:19 2006 -0600
     4.3 @@ -79,35 +79,57 @@ ia64_disable_vhpt_walker(void)
     4.4  	ia64_set_pta(VHPT_SIZE_LOG2 << 2);
     4.5  }
     4.6  
     4.7 -static void flush_vtlb_for_context_switch(struct vcpu* vcpu)
     4.8 +static void flush_vtlb_for_context_switch(struct vcpu* prev, struct vcpu* next)
     4.9  {
    4.10  	int cpu = smp_processor_id();
    4.11 -	int last_vcpu_id = vcpu->domain->arch.last_vcpu[cpu].vcpu_id;
    4.12 -	int last_processor = vcpu->arch.last_processor;
    4.13 +	int last_vcpu_id, last_processor;
    4.14  
    4.15 -	if (is_idle_domain(vcpu->domain))
    4.16 +	if (!is_idle_domain(prev->domain))
    4.17 +		tlbflush_update_time
    4.18 +			(&prev->domain->arch.last_vcpu[cpu].tlbflush_timestamp,
    4.19 +			 tlbflush_current_time());
    4.20 +
    4.21 +	if (is_idle_domain(next->domain))
    4.22  		return;
    4.23 -	
    4.24 -	vcpu->domain->arch.last_vcpu[cpu].vcpu_id = vcpu->vcpu_id;
    4.25 -	vcpu->arch.last_processor = cpu;
    4.26  
    4.27 -	if ((last_vcpu_id != vcpu->vcpu_id &&
    4.28 +	last_vcpu_id = next->domain->arch.last_vcpu[cpu].vcpu_id;
    4.29 +	last_processor = next->arch.last_processor;
    4.30 +
    4.31 +	next->domain->arch.last_vcpu[cpu].vcpu_id = next->vcpu_id;
    4.32 +	next->arch.last_processor = cpu;
    4.33 +
    4.34 +	if ((last_vcpu_id != next->vcpu_id &&
    4.35  	     last_vcpu_id != INVALID_VCPU_ID) ||
    4.36 -	    (last_vcpu_id == vcpu->vcpu_id &&
    4.37 +	    (last_vcpu_id == next->vcpu_id &&
    4.38  	     last_processor != cpu &&
    4.39  	     last_processor != INVALID_PROCESSOR)) {
    4.40 +#ifdef CONFIG_XEN_IA64_TLBFLUSH_CLOCK
    4.41 +		u32 last_tlbflush_timestamp =
    4.42 +			next->domain->arch.last_vcpu[cpu].tlbflush_timestamp;
    4.43 +#endif
    4.44 +		int vhpt_is_flushed = 0;
    4.45  
    4.46  		// if the vTLB implementation was changed,
    4.47  		// the followings must be updated either.
    4.48 -		if (VMX_DOMAIN(vcpu)) {
    4.49 +		if (VMX_DOMAIN(next)) {
    4.50  			// currently vTLB for vt-i domian is per vcpu.
    4.51  			// so any flushing isn't needed.
    4.52 -		} else if (HAS_PERVCPU_VHPT(vcpu->domain)) {
    4.53 +		} else if (HAS_PERVCPU_VHPT(next->domain)) {
    4.54  			// nothing to do
    4.55  		} else {
    4.56 -			local_vhpt_flush();
    4.57 +			if (NEED_FLUSH(__get_cpu_var(vhpt_tlbflush_timestamp),
    4.58 +			               last_tlbflush_timestamp)) {
    4.59 +				local_vhpt_flush();
    4.60 +				vhpt_is_flushed = 1;
    4.61 +			}
    4.62  		}
    4.63 -		local_flush_tlb_all();
    4.64 +		if (vhpt_is_flushed || NEED_FLUSH(__get_cpu_var(tlbflush_time),
    4.65 +		                                  last_tlbflush_timestamp)) {
    4.66 +			local_flush_tlb_all();
    4.67 +			perfc_incrc(tlbflush_clock_cswitch_purge);
    4.68 +		} else {
    4.69 +			perfc_incrc(tlbflush_clock_cswitch_skip);
    4.70 +		}
    4.71  		perfc_incrc(flush_vtlb_for_context_switch);
    4.72  	}
    4.73  }
    4.74 @@ -133,7 +155,7 @@ void schedule_tail(struct vcpu *prev)
    4.75  		  (current->domain->arch.shared_info_va + XSI_PSR_IC_OFS);
    4.76  		migrate_timer(&current->arch.hlt_timer, current->processor);
    4.77  	}
    4.78 -	flush_vtlb_for_context_switch(current);
    4.79 +	flush_vtlb_for_context_switch(prev, current);
    4.80  }
    4.81  
    4.82  void context_switch(struct vcpu *prev, struct vcpu *next)
    4.83 @@ -197,7 +219,7 @@ void context_switch(struct vcpu *prev, s
    4.84          }
    4.85      }
    4.86      local_irq_restore(spsr);
    4.87 -    flush_vtlb_for_context_switch(current);
    4.88 +    flush_vtlb_for_context_switch(prev, current);
    4.89      context_saved(prev);
    4.90  }
    4.91  
    4.92 @@ -296,6 +318,9 @@ struct vcpu *alloc_vcpu_struct(struct do
    4.93  		for (i = 0; i < (1 << order); i++)
    4.94  		    share_xen_page_with_guest(virt_to_page(v->arch.privregs) +
    4.95  		                              i, d, XENSHARE_writable);
    4.96 +
    4.97 +		tlbflush_update_time(&v->arch.tlbflush_timestamp,
    4.98 +		                     tlbflush_current_time());
    4.99  	    }
   4.100  
   4.101  	    v->arch.metaphysical_rr0 = d->arch.metaphysical_rr0;
     5.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     5.2 +++ b/xen/arch/ia64/xen/flushtlb.c	Tue Oct 17 14:16:19 2006 -0600
     5.3 @@ -0,0 +1,117 @@
     5.4 +/******************************************************************************
     5.5 + * flushtlb.c
     5.6 + * based on x86 flushtlb.c
     5.7 + * 
     5.8 + * Copyright (c) 2006 Isaku Yamahata <yamahata at valinux co jp>
     5.9 + *                    VA Linux Systems Japan K.K.
    5.10 + *
    5.11 + * This program is free software; you can redistribute it and/or modify
    5.12 + * it under the terms of the GNU General Public License as published by
    5.13 + * the Free Software Foundation; either version 2 of the License, or
    5.14 + * (at your option) any later version.
    5.15 + *
    5.16 + * This program is distributed in the hope that it will be useful,
    5.17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    5.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    5.19 + * GNU General Public License for more details.
    5.20 + *
    5.21 + * You should have received a copy of the GNU General Public License
    5.22 + * along with this program; if not, write to the Free Software
    5.23 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    5.24 + *
    5.25 + */
    5.26 +
    5.27 +#include <xen/sched.h>
    5.28 +#include <xen/softirq.h>
    5.29 +#include <asm/vcpu.h>
    5.30 +#include <asm/vhpt.h>
    5.31 +#include <asm/flushtlb.h>
    5.32 +
    5.33 +/* Debug builds: Wrap frequently to stress-test the wrap logic. */
    5.34 +#ifdef NDEBUG
    5.35 +#define WRAP_MASK (0xFFFFFFFFU)
    5.36 +#else
    5.37 +#define WRAP_MASK (0x000003FFU)
    5.38 +#endif
    5.39 +
    5.40 +volatile u32 tlbflush_clock = 1U; /* 1 greater than tlbflush_time. */
    5.41 +DEFINE_PER_CPU(volatile u32, tlbflush_time);
    5.42 +
    5.43 +u32
    5.44 +tlbflush_clock_inc_and_return(void)
    5.45 +{
    5.46 +    u32 t, t1, t2;
    5.47 +
    5.48 +    t = tlbflush_clock;
    5.49 +    do {
    5.50 +        t1 = t2 = t;
    5.51 +        /* Clock wrapped: someone else is leading a global TLB shootdown. */
    5.52 +        if (unlikely(t1 == 0))
    5.53 +            return t2;
    5.54 +        t2 = (t + 1) & WRAP_MASK;
    5.55 +        t = ia64_cmpxchg(acq, &tlbflush_clock, t1, t2, sizeof(tlbflush_clock));
    5.56 +    } while (unlikely(t != t1));
    5.57 +
    5.58 +    /* Clock wrapped: we will lead a global TLB shootdown. */
    5.59 +    if (unlikely(t2 == 0))
    5.60 +        raise_softirq(NEW_TLBFLUSH_CLOCK_PERIOD_SOFTIRQ);
    5.61 +
    5.62 +    return t2;
    5.63 +}
    5.64 +
    5.65 +void
    5.66 +new_tlbflush_clock_period(void)
    5.67 +{
    5.68 +    /*
    5.69 +     *XXX TODO
    5.70 +     * If flushing all vcpu's vhpt takes too long, it can be done backgroundly.
    5.71 +     * In such case tlbflush time comparison is done using only 31bit
    5.72 +     * similar to linux jiffies comparison.
    5.73 +     * vhpt should be flushed gradually before wraping 31bits.
    5.74 +     *
    5.75 +     * Sample calculation.
    5.76 +     * Currently Xen/IA64 can create up to 64 domains at the same time.
    5.77 +     * Vhpt size is currently 64KB. (This might be changed later though)
    5.78 +     * Suppose each domains have 4 vcpus (or 16 vcpus).
    5.79 +     * then the memory size which must be flushed is 16MB (64MB).
    5.80 +     */    
    5.81 +    struct domain* d;
    5.82 +    struct vcpu* v;
    5.83 +    /* flush all vhpt of vcpu of all existing domain. */
    5.84 +    read_lock(&domlist_lock);
    5.85 +    for_each_domain(d) {
    5.86 +        for_each_vcpu(d, v) {
    5.87 +            vcpu_purge_tr_entry(&PSCBX(v,dtlb));
    5.88 +            vcpu_purge_tr_entry(&PSCBX(v,itlb));
    5.89 +        }
    5.90 +    }
    5.91 +    smp_mb();
    5.92 +    for_each_domain(d) {
    5.93 +        for_each_vcpu(d, v) {
    5.94 +            if (HAS_PERVCPU_VHPT(v->domain))
    5.95 +                vcpu_vhpt_flush(v);
    5.96 +        }
    5.97 +    }
    5.98 +    read_unlock(&domlist_lock);
    5.99 +    /* unlock has release semantics */
   5.100 +
   5.101 +    /* flush all vhpt of physical cpu and mTLB */
   5.102 +    on_each_cpu((void (*)(void *))local_flush_tlb_all, NULL, 1, 1);
   5.103 +
   5.104 +    /*
   5.105 +     * if global TLB shootdown is finished, increment tlbflush_time
   5.106 +     * atomic operation isn't necessary because we know that tlbflush_clock
   5.107 +     * stays 0.
   5.108 +     */
   5.109 +    tlbflush_clock++;
   5.110 +}
   5.111 +
   5.112 +/*
   5.113 + * Local variables:
   5.114 + * mode: C
   5.115 + * c-set-style: "BSD"
   5.116 + * c-basic-offset: 4
   5.117 + * tab-width: 4
   5.118 + * indent-tabs-mode: nil
   5.119 + * End:
   5.120 + */
     6.1 --- a/xen/arch/ia64/xen/vhpt.c	Tue Oct 17 11:41:03 2006 -0600
     6.2 +++ b/xen/arch/ia64/xen/vhpt.c	Tue Oct 17 14:16:19 2006 -0600
     6.3 @@ -28,6 +28,9 @@ extern long running_on_sim;
     6.4  
     6.5  DEFINE_PER_CPU (unsigned long, vhpt_paddr);
     6.6  DEFINE_PER_CPU (unsigned long, vhpt_pend);
     6.7 +#ifdef CONFIG_XEN_IA64_TLBFLUSH_CLOCK
     6.8 +DEFINE_PER_CPU(volatile u32, vhpt_tlbflush_timestamp);
     6.9 +#endif
    6.10  
    6.11  static void
    6.12  __vhpt_flush(unsigned long vhpt_maddr)
    6.13 @@ -42,14 +45,23 @@ static void
    6.14  void
    6.15  local_vhpt_flush(void)
    6.16  {
    6.17 +	/* increment flush clock before flush */
    6.18 +	u32 flush_time = tlbflush_clock_inc_and_return();
    6.19  	__vhpt_flush(__ia64_per_cpu_var(vhpt_paddr));
    6.20 +	/* this must be after flush */
    6.21 +	tlbflush_update_time(&__get_cpu_var(vhpt_tlbflush_timestamp),
    6.22 +	                     flush_time);
    6.23  	perfc_incrc(local_vhpt_flush);
    6.24  }
    6.25  
    6.26 -static void
    6.27 +void
    6.28  vcpu_vhpt_flush(struct vcpu* v)
    6.29  {
    6.30 +	/* increment flush clock before flush */
    6.31 +	u32 flush_time = tlbflush_clock_inc_and_return();
    6.32  	__vhpt_flush(vcpu_vhpt_maddr(v));
    6.33 +	/* this must be after flush */
    6.34 +	tlbflush_update_time(&v->arch.tlbflush_timestamp, flush_time);
    6.35  	perfc_incrc(vcpu_vhpt_flush);
    6.36  }
    6.37  
     7.1 --- a/xen/include/asm-ia64/domain.h	Tue Oct 17 11:41:03 2006 -0600
     7.2 +++ b/xen/include/asm-ia64/domain.h	Tue Oct 17 14:16:19 2006 -0600
     7.3 @@ -49,6 +49,9 @@ struct mm_struct {
     7.4  struct last_vcpu {
     7.5  #define INVALID_VCPU_ID INT_MAX
     7.6      int vcpu_id;
     7.7 +#ifdef CONFIG_XEN_IA64_TLBFLUSH_CLOCK
     7.8 +    u32 tlbflush_timestamp;
     7.9 +#endif
    7.10  } ____cacheline_aligned_in_smp;
    7.11  
    7.12  /* These are data in domain memory for SAL emulator.  */
    7.13 @@ -195,7 +198,9 @@ struct arch_vcpu {
    7.14      struct page_info*   vhpt_page;
    7.15      unsigned long       vhpt_entries;
    7.16  #endif
    7.17 -
    7.18 +#ifdef CONFIG_XEN_IA64_TLBFLUSH_CLOCK
    7.19 +    u32 tlbflush_timestamp;
    7.20 +#endif
    7.21  #define INVALID_PROCESSOR       INT_MAX
    7.22      int last_processor;
    7.23  };
     8.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     8.2 +++ b/xen/include/asm-ia64/flushtlb.h	Tue Oct 17 14:16:19 2006 -0600
     8.3 @@ -0,0 +1,89 @@
     8.4 +/******************************************************************************
     8.5 + * flushtlb.c
     8.6 + * based on x86 flushtlb.h
     8.7 + * 
     8.8 + * Copyright (c) 2006 Isaku Yamahata <yamahata at valinux co jp>
     8.9 + *                    VA Linux Systems Japan K.K.
    8.10 + *
    8.11 + * This program is free software; you can redistribute it and/or modify
    8.12 + * it under the terms of the GNU General Public License as published by
    8.13 + * the Free Software Foundation; either version 2 of the License, or
    8.14 + * (at your option) any later version.
    8.15 + *
    8.16 + * This program is distributed in the hope that it will be useful,
    8.17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
    8.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    8.19 + * GNU General Public License for more details.
    8.20 + *
    8.21 + * You should have received a copy of the GNU General Public License
    8.22 + * along with this program; if not, write to the Free Software
    8.23 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    8.24 + *
    8.25 + */
    8.26 +
    8.27 +#ifndef __ASM_FLUSHTLB_H__
    8.28 +#define __ASM_FLUSHTLB_H__
    8.29 +
    8.30 +#ifdef CONFIG_XEN_IA64_TLBFLUSH_CLOCK
    8.31 +
    8.32 +#include <xen/percpu.h>
    8.33 +
    8.34 +extern volatile u32 tlbflush_clock;
    8.35 +#define tlbflush_current_time() tlbflush_clock
    8.36 +
    8.37 +u32 tlbflush_clock_inc_and_return(void);
    8.38 +
    8.39 +static inline void
    8.40 +tlbflush_update_time(volatile u32* time, u32 timestamp)
    8.41 +{
    8.42 +    /*
    8.43 +     * this should be ld4.rel + st4.acq. but only have release semantcis.
    8.44 +     * so this function can't be considered as memory barrier.
    8.45 +     */
    8.46 +    *time = timestamp;
    8.47 +}
    8.48 +
    8.49 +/*
    8.50 + * taken from x86's NEED_FLUSH()
    8.51 + * obj_stamp: mTLB time stamp, per pcpu VHPT stamp, per vcpu VHPT stamp.
    8.52 + */
    8.53 +static inline int
    8.54 +NEED_FLUSH(u32 obj_stamp, u32 lastuse_stamp)
    8.55 +{
    8.56 +    u32 curr_time = tlbflush_current_time();
    8.57 +    /*
    8.58 +     * Two cases:
    8.59 +     *  1. During a wrap, the clock ticks over to 0 while CPUs catch up. For
    8.60 +     *     safety during this period, we force a flush if @curr_time == 0.
    8.61 +     *  2. Otherwise, we look to see if @cpu_stamp <= @lastuse_stamp.
    8.62 +     *     To detect false positives because @cpu_stamp has wrapped, we
    8.63 +     *     also check @curr_time. If less than @lastuse_stamp we definitely
    8.64 +     *     wrapped, so there's no need for a flush (one is forced every wrap).
    8.65 +     */
    8.66 +    return ((curr_time == 0) ||
    8.67 +            ((obj_stamp <= lastuse_stamp) && (lastuse_stamp <= curr_time)));
    8.68 +}
    8.69 +
    8.70 +DECLARE_PER_CPU(volatile u32, tlbflush_time);
    8.71 +DECLARE_PER_CPU(volatile u32, vhpt_tlbflush_timestamp);
    8.72 +
    8.73 +#else
    8.74 +
    8.75 +#define tlbflush_current_time()                 (0)
    8.76 +#define tlbflush_clock_inc_and_return()         (0)
    8.77 +#define tlbflush_update_time(time, timestamp)   do {(void)timestamp;} while (0)
    8.78 +#define NEED_FLUSH(obj_stamp, lastuse_stamp)    (1)
    8.79 +
    8.80 +#endif /* CONFIG_XEN_IA64_TLBFLUSH_CLOCK */
    8.81 +
    8.82 +#endif /* __ASM_FLUSHTLB_H__ */
    8.83 +
    8.84 +/*
    8.85 + * Local variables:
    8.86 + * mode: C
    8.87 + * c-set-style: "BSD"
    8.88 + * c-basic-offset: 4
    8.89 + * tab-width: 4
    8.90 + * indent-tabs-mode: nil
    8.91 + * End:
    8.92 + */
     9.1 --- a/xen/include/asm-ia64/mm.h	Tue Oct 17 11:41:03 2006 -0600
     9.2 +++ b/xen/include/asm-ia64/mm.h	Tue Oct 17 14:16:19 2006 -0600
     9.3 @@ -18,6 +18,7 @@
     9.4  #include <asm/processor.h>
     9.5  #include <asm/atomic.h>
     9.6  #include <asm/tlbflush.h>
     9.7 +#include <asm/flushtlb.h>
     9.8  #include <asm/io.h>
     9.9  
    9.10  #include <public/xen.h>
    10.1 --- a/xen/include/asm-ia64/perfc_defn.h	Tue Oct 17 11:41:03 2006 -0600
    10.2 +++ b/xen/include/asm-ia64/perfc_defn.h	Tue Oct 17 14:16:19 2006 -0600
    10.3 @@ -164,3 +164,9 @@ PERFCOUNTER_CPU(tlb_track_sar_many,     
    10.4  PERFCOUNTER_CPU(tlb_track_use_rr7,              "tlb_track_use_rr7")
    10.5  PERFCOUNTER_CPU(tlb_track_swap_rr0,             "tlb_track_swap_rr0")
    10.6  #endif
    10.7 +
    10.8 +// tlb flush clock
    10.9 +#ifdef CONFIG_XEN_IA64_TLBFLUSH_CLOCK
   10.10 +PERFCOUNTER_CPU(tlbflush_clock_cswitch_purge,  "tlbflush_clock_cswitch_purge")
   10.11 +PERFCOUNTER_CPU(tlbflush_clock_cswitch_skip,   "tlbflush_clock_cswitch_skip")
   10.12 +#endif
    11.1 --- a/xen/include/asm-ia64/tlb_track.h	Tue Oct 17 11:41:03 2006 -0600
    11.2 +++ b/xen/include/asm-ia64/tlb_track.h	Tue Oct 17 14:16:19 2006 -0600
    11.3 @@ -53,7 +53,6 @@ struct tlb_track_entry {
    11.4  
    11.5      cpumask_t           pcpu_dirty_mask;
    11.6      vcpumask_t          vcpu_dirty_mask;
    11.7 -    // tlbflush_timestamp;
    11.8  
    11.9  #ifdef CONFIG_TLB_TRACK_CNT
   11.10  #define TLB_TRACK_CNT_FORCE_MANY        256 /* XXX how many? */
   11.11 @@ -132,11 +131,15 @@ void
   11.12  #define tlb_track_entry_printf(entry)                       \
   11.13      __tlb_track_entry_printf(__func__, __LINE__, (entry))
   11.14  #else
   11.15 -
   11.16 -#define tlb_track_create(d)                                (0)
   11.17 -#define tlb_track_destroy(d)                               do { } while (0)
   11.18 -#define vcpu_tlb_track_insert_or_dirty(vcpu, vaddr, entry) do { } while (0)
   11.19 -
   11.20 +//define as nop
   11.21 +#define tlb_track_create(d)                     do { } while (0)
   11.22 +#define tlb_track_destroy(d)                    do { } while (0)
   11.23 +#define tlb_track_free_entry(tlb_track, entry)  do { } while (0)
   11.24 +#define vcpu_tlb_track_insert_or_dirty(vcpu, vaddr, entry)      \
   11.25 +                                                do { } while (0)
   11.26 +#define tlb_track_search_and_remove(tlb_track, ptep, old_pte, entryp)   \
   11.27 +                                                do { } while (0)
   11.28 +#define tlb_track_entry_printf(entry)           do { } while (0)
   11.29  #endif /* CONFIG_XEN_IA64_TLB_TRACK */
   11.30  
   11.31  #endif /* __TLB_TRACK_H__ */
    12.1 --- a/xen/include/asm-ia64/tlbflush.h	Tue Oct 17 11:41:03 2006 -0600
    12.2 +++ b/xen/include/asm-ia64/tlbflush.h	Tue Oct 17 14:16:19 2006 -0600
    12.3 @@ -40,7 +40,6 @@ void flush_tlb_mask(cpumask_t mask);
    12.4  /* Flush local machine TLB.  */
    12.5  void local_flush_tlb_all (void);
    12.6  
    12.7 -#define tlbflush_current_time() 0
    12.8  #define tlbflush_filter(x,y) ((void)0)
    12.9  
   12.10  #endif
    13.1 --- a/xen/include/asm-ia64/vhpt.h	Tue Oct 17 11:41:03 2006 -0600
    13.2 +++ b/xen/include/asm-ia64/vhpt.h	Tue Oct 17 14:16:19 2006 -0600
    13.3 @@ -42,6 +42,7 @@ extern void vhpt_multiple_insert(unsigne
    13.4  extern void vhpt_insert (unsigned long vadr, unsigned long pte,
    13.5  			 unsigned long logps);
    13.6  void local_vhpt_flush(void);
    13.7 +extern void vcpu_vhpt_flush(struct vcpu* v);
    13.8  
    13.9  /* Currently the VHPT is allocated per CPU.  */
   13.10  DECLARE_PER_CPU (unsigned long, vhpt_paddr);