ia64/xen-unstable

changeset 1141:f8e976295167

bitkeeper revision 1.760.1.1 (404471003RnBC9q2htrfw0GYFLORsQ)

Add 8139 driver from Mike Wray.
author iap10@tetris.cl.cam.ac.uk
date Tue Mar 02 11:33:20 2004 +0000 (2004-03-02)
parents 5b6243a7571b
children 44bba5181e2a
files .rootkeys BitKeeper/etc/ignore BitKeeper/etc/logging_ok xen/drivers/net/8139too.c
line diff
     1.1 --- a/.rootkeys	Mon Mar 01 17:04:00 2004 +0000
     1.2 +++ b/.rootkeys	Tue Mar 02 11:33:20 2004 +0000
     1.3 @@ -213,6 +213,7 @@ 3fcdb64fqClM55cDs-jlCSJ7fhqmqg xen/drive
     1.4  3fcdb64fTVgpQj9UQw5aHN_eUHlzGQ xen/drivers/message/fusion/mptscsih.h
     1.5  3fcdb64fl9djvIFAYQozgMVDUNPIkQ xen/drivers/message/fusion/scsi3.h
     1.6  3ddb79bfMlOcWUwjtg6oMYhGySHDDw xen/drivers/net/3c59x.c
     1.7 +404470fdR6z_nJ196-p-JE76DGEvvg xen/drivers/net/8139too.c
     1.8  3ddb79c0tWiE8xIFHszxipeVCGKTSA xen/drivers/net/Makefile
     1.9  3f0c4247730LYUgz3p5ziYqy-s_glw xen/drivers/net/SUPPORTED_CARDS
    1.10  3ddb79bfU-H1Hms4BuJEPPydjXUEaQ xen/drivers/net/Space.c
     2.1 --- a/BitKeeper/etc/ignore	Mon Mar 01 17:04:00 2004 +0000
     2.2 +++ b/BitKeeper/etc/ignore	Tue Mar 02 11:33:20 2004 +0000
     2.3 @@ -543,3 +543,8 @@ tools/xc/lib/xc_netbsd_build.o
     2.4  xen/arch/i386/pdb-stub.o
     2.5  xen/common/debug-linux.o
     2.6  xen/drivers/char/serial.o
     2.7 +tools/xend/xend.o
     2.8 +tools/xentrace/xentrace
     2.9 +tools/xc/lib/xc_evtchn.o
    2.10 +tools/xc/py/XenoUtil.pyc
    2.11 +tools/xend/xend
     3.1 --- a/BitKeeper/etc/logging_ok	Mon Mar 01 17:04:00 2004 +0000
     3.2 +++ b/BitKeeper/etc/logging_ok	Tue Mar 02 11:33:20 2004 +0000
     3.3 @@ -13,6 +13,7 @@ iap10@freefall.cl.cam.ac.uk
     3.4  iap10@labyrinth.cl.cam.ac.uk
     3.5  iap10@nidd.cl.cam.ac.uk
     3.6  iap10@striker.cl.cam.ac.uk
     3.7 +iap10@tetris.cl.cam.ac.uk
     3.8  jws22@gauntlet.cl.cam.ac.uk
     3.9  jws@cairnwell.research
    3.10  kaf24@labyrinth.cl.cam.ac.uk
     4.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     4.2 +++ b/xen/drivers/net/8139too.c	Tue Mar 02 11:33:20 2004 +0000
     4.3 @@ -0,0 +1,2719 @@
     4.4 +/*
     4.5 +
     4.6 +	8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
     4.7 +
     4.8 +	Maintained by Jeff Garzik <jgarzik@pobox.com>
     4.9 +	Copyright 2000-2002 Jeff Garzik
    4.10 +
    4.11 +	Much code comes from Donald Becker's rtl8139.c driver,
    4.12 +	versions 1.13 and older.  This driver was originally based
    4.13 +	on rtl8139.c version 1.07.  Header of rtl8139.c version 1.13:
    4.14 +
    4.15 +	-----<snip>-----
    4.16 +
    4.17 +        	Written 1997-2001 by Donald Becker.
    4.18 +		This software may be used and distributed according to the
    4.19 +		terms of the GNU General Public License (GPL), incorporated
    4.20 +		herein by reference.  Drivers based on or derived from this
    4.21 +		code fall under the GPL and must retain the authorship,
    4.22 +		copyright and license notice.  This file is not a complete
    4.23 +		program and may only be used when the entire operating
    4.24 +		system is licensed under the GPL.
    4.25 +
    4.26 +		This driver is for boards based on the RTL8129 and RTL8139
    4.27 +		PCI ethernet chips.
    4.28 +
    4.29 +		The author may be reached as becker@scyld.com, or C/O Scyld
    4.30 +		Computing Corporation 410 Severn Ave., Suite 210 Annapolis
    4.31 +		MD 21403
    4.32 +
    4.33 +		Support and updates available at
    4.34 +		http://www.scyld.com/network/rtl8139.html
    4.35 +
    4.36 +		Twister-tuning table provided by Kinston
    4.37 +		<shangh@realtek.com.tw>.
    4.38 +
    4.39 +	-----<snip>-----
    4.40 +
    4.41 +	This software may be used and distributed according to the terms
    4.42 +	of the GNU General Public License, incorporated herein by reference.
    4.43 +
    4.44 +	Contributors:
    4.45 +
    4.46 +		Donald Becker - he wrote the original driver, kudos to him!
    4.47 +		(but please don't e-mail him for support, this isn't his driver)
    4.48 +
    4.49 +		Tigran Aivazian - bug fixes, skbuff free cleanup
    4.50 +
    4.51 +		Martin Mares - suggestions for PCI cleanup
    4.52 +
    4.53 +		David S. Miller - PCI DMA and softnet updates
    4.54 +
    4.55 +		Ernst Gill - fixes ported from BSD driver
    4.56 +
    4.57 +		Daniel Kobras - identified specific locations of
    4.58 +			posted MMIO write bugginess
    4.59 +
    4.60 +		Gerard Sharp - bug fix, testing and feedback
    4.61 +
    4.62 +		David Ford - Rx ring wrap fix
    4.63 +
    4.64 +		Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
    4.65 +		to find and fix a crucial bug on older chipsets.
    4.66 +
    4.67 +		Donald Becker/Chris Butterworth/Marcus Westergren -
    4.68 +		Noticed various Rx packet size-related buglets.
    4.69 +
    4.70 +		Santiago Garcia Mantinan - testing and feedback
    4.71 +
    4.72 +		Jens David - 2.2.x kernel backports
    4.73 +
    4.74 +		Martin Dennett - incredibly helpful insight on undocumented
    4.75 +		features of the 8139 chips
    4.76 +
    4.77 +		Jean-Jacques Michel - bug fix
    4.78 +
    4.79 +		Tobias Ringström - Rx interrupt status checking suggestion
    4.80 +
    4.81 +		Andrew Morton - Clear blocked signals, avoid
    4.82 +		buffer overrun setting current->comm.
    4.83 +
    4.84 +		Kalle Olavi Niemitalo - Wake-on-LAN ioctls
    4.85 +
    4.86 +		Robert Kuebel - Save kernel thread from dying on any signal.
    4.87 +
    4.88 +	Submitting bug reports:
    4.89 +
    4.90 +		"rtl8139-diag -mmmaaavvveefN" output
    4.91 +		enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
    4.92 +
    4.93 +		See 8139too.txt for more details.
    4.94 +
    4.95 +*/
    4.96 +#define XEN
    4.97 +
    4.98 +#define DRV_NAME	"8139too"
    4.99 +#define DRV_VERSION	"0.9.26"
   4.100 +
   4.101 +
   4.102 +#include <linux/config.h>
   4.103 +#include <linux/module.h>
   4.104 +
   4.105 +#ifdef XEN
   4.106 +typedef int pid_t;
   4.107 +#include <linux/lib.h>
   4.108 +#endif
   4.109 +#include <linux/kernel.h>
   4.110 +#include <linux/compiler.h>
   4.111 +#include <linux/pci.h>
   4.112 +#include <linux/init.h>
   4.113 +#include <linux/ioport.h>
   4.114 +#include <linux/netdevice.h>
   4.115 +#include <linux/etherdevice.h>
   4.116 +#ifndef XEN
   4.117 +#include <linux/rtnetlink.h>
   4.118 +#endif
   4.119 +#include <linux/delay.h>
   4.120 +#include <linux/ethtool.h>
   4.121 +#include <linux/mii.h>
   4.122 +#ifndef XEN
   4.123 +#include <linux/completion.h>
   4.124 +#endif
   4.125 +#include <linux/crc32.h>
   4.126 +#include <asm/io.h>
   4.127 +#include <asm/uaccess.h>
   4.128 +
   4.129 +#define RTL8139_DRIVER_NAME   DRV_NAME " Fast Ethernet driver " DRV_VERSION
   4.130 +#define PFX DRV_NAME ": "
   4.131 +
   4.132 +
   4.133 +/* enable PIO instead of MMIO, if CONFIG_8139TOO_PIO is selected */
   4.134 +#ifdef CONFIG_8139TOO_PIO
   4.135 +#define USE_IO_OPS 1
   4.136 +#endif
   4.137 +
   4.138 +/* define to 1 to enable copious debugging info */
   4.139 +#undef RTL8139_DEBUG
   4.140 +
   4.141 +/* define to 1 to disable lightweight runtime debugging checks */
   4.142 +#undef RTL8139_NDEBUG
   4.143 +
   4.144 +#ifdef XEN
   4.145 +#define RTL8139_DEBUG 1
   4.146 +#define RTL8139_NDEBUG 1
   4.147 +#undef DPRINTK
   4.148 +#endif
   4.149 +
   4.150 +#ifdef RTL8139_DEBUG
   4.151 +/* note: prints function name for you */
   4.152 +#  define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args)
   4.153 +#else
   4.154 +#  define DPRINTK(fmt, args...)
   4.155 +#endif
   4.156 +
   4.157 +#ifdef RTL8139_NDEBUG
   4.158 +#  define assert(expr) do {} while (0)
   4.159 +#else
   4.160 +#  define assert(expr) \
   4.161 +        if(!(expr)) {					\
   4.162 +        printk( "Assertion failed! %s,%s,%s,line=%d\n",	\
   4.163 +        #expr,__FILE__,__FUNCTION__,__LINE__);		\
   4.164 +        }
   4.165 +#endif
   4.166 +
   4.167 +
   4.168 +/* A few user-configurable values. */
   4.169 +/* media options */
   4.170 +#define MAX_UNITS 8
   4.171 +static int media[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
   4.172 +static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
   4.173 +
   4.174 +/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
   4.175 +static int max_interrupt_work = 20;
   4.176 +
   4.177 +/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
   4.178 +   The RTL chips use a 64 element hash table based on the Ethernet CRC.  */
   4.179 +static int multicast_filter_limit = 32;
   4.180 +
   4.181 +#ifndef XEN
   4.182 +/* bitmapped message enable number */
   4.183 +static int debug = -1;
   4.184 +#endif
   4.185 +
   4.186 +/* Size of the in-memory receive ring. */
   4.187 +#define RX_BUF_LEN_IDX	2	/* 0==8K, 1==16K, 2==32K, 3==64K */
   4.188 +#define RX_BUF_LEN	(8192 << RX_BUF_LEN_IDX)
   4.189 +#define RX_BUF_PAD	16
   4.190 +#define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
   4.191 +#define RX_BUF_TOT_LEN	(RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
   4.192 +
   4.193 +/* Number of Tx descriptor registers. */
   4.194 +#define NUM_TX_DESC	4
   4.195 +
   4.196 +/* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
   4.197 +#define MAX_ETH_FRAME_SIZE	1536
   4.198 +
   4.199 +/* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
   4.200 +#define TX_BUF_SIZE	MAX_ETH_FRAME_SIZE
   4.201 +#define TX_BUF_TOT_LEN	(TX_BUF_SIZE * NUM_TX_DESC)
   4.202 +
   4.203 +/* PCI Tuning Parameters
   4.204 +   Threshold is bytes transferred to chip before transmission starts. */
   4.205 +#define TX_FIFO_THRESH 256	/* In bytes, rounded down to 32 byte units. */
   4.206 +
   4.207 +/* The following settings are log_2(bytes)-4:  0 == 16 bytes .. 6==1024, 7==end of packet. */
   4.208 +#define RX_FIFO_THRESH	7	/* Rx buffer level before first PCI xfer.  */
   4.209 +#define RX_DMA_BURST	7	/* Maximum PCI burst, '6' is 1024 */
   4.210 +#define TX_DMA_BURST	6	/* Maximum PCI burst, '6' is 1024 */
   4.211 +#define TX_RETRY	8	/* 0-15.  retries = 16 + (TX_RETRY * 16) */
   4.212 +
   4.213 +/* Operational parameters that usually are not changed. */
   4.214 +/* Time in jiffies before concluding the transmitter is hung. */
   4.215 +#define TX_TIMEOUT  (6*HZ)
   4.216 +
   4.217 +
   4.218 +enum {
   4.219 +	HAS_MII_XCVR = 0x010000,
   4.220 +	HAS_CHIP_XCVR = 0x020000,
   4.221 +	HAS_LNK_CHNG = 0x040000,
   4.222 +};
   4.223 +
   4.224 +#define RTL_NUM_STATS 4		/* number of ETHTOOL_GSTATS u64's */
   4.225 +#define RTL_REGS_VER 1		/* version of reg. data in ETHTOOL_GREGS */
   4.226 +#define RTL_MIN_IO_SIZE 0x80
   4.227 +#define RTL8139B_IO_SIZE 256
   4.228 +
   4.229 +#define RTL8129_CAPS	HAS_MII_XCVR
   4.230 +#define RTL8139_CAPS	HAS_CHIP_XCVR|HAS_LNK_CHNG
   4.231 +
   4.232 +typedef enum {
   4.233 +	RTL8139 = 0,
   4.234 +	RTL8139_CB,
   4.235 +	SMC1211TX,
   4.236 +	/*MPX5030,*/
   4.237 +	DELTA8139,
   4.238 +	ADDTRON8139,
   4.239 +	DFE538TX,
   4.240 +	DFE690TXD,
   4.241 +	FE2000VX,
   4.242 +	ALLIED8139,
   4.243 +	RTL8129,
   4.244 +	FNW3603TX,
   4.245 +	FNW3800TX,
   4.246 +} board_t;
   4.247 +
   4.248 +
   4.249 +/* indexed by board_t, above */
   4.250 +static struct {
   4.251 +	const char *name;
   4.252 +	u32 hw_flags;
   4.253 +} board_info[] __devinitdata = {
   4.254 +	{ "RealTek RTL8139 Fast Ethernet", RTL8139_CAPS },
   4.255 +	{ "RealTek RTL8139B PCI/CardBus", RTL8139_CAPS },
   4.256 +	{ "SMC1211TX EZCard 10/100 (RealTek RTL8139)", RTL8139_CAPS },
   4.257 +/*	{ MPX5030, "Accton MPX5030 (RealTek RTL8139)", RTL8139_CAPS },*/
   4.258 +	{ "Delta Electronics 8139 10/100BaseTX", RTL8139_CAPS },
   4.259 +	{ "Addtron Technolgy 8139 10/100BaseTX", RTL8139_CAPS },
   4.260 +	{ "D-Link DFE-538TX (RealTek RTL8139)", RTL8139_CAPS },
   4.261 +	{ "D-Link DFE-690TXD (RealTek RTL8139)", RTL8139_CAPS },
   4.262 +	{ "AboCom FE2000VX (RealTek RTL8139)", RTL8139_CAPS },
   4.263 +	{ "Allied Telesyn 8139 CardBus", RTL8139_CAPS },
   4.264 +	{ "RealTek RTL8129", RTL8129_CAPS },
   4.265 +	{ "Planex FNW-3603-TX 10/100 CardBus", RTL8139_CAPS },
   4.266 +	{ "Planex FNW-3800-TX 10/100 CardBus", RTL8139_CAPS },
   4.267 +};
   4.268 +
   4.269 +
   4.270 +static struct pci_device_id rtl8139_pci_tbl[] __devinitdata = {
   4.271 +	{0x10ec, 0x8139, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139 },
   4.272 +	{0x10ec, 0x8138, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8139_CB },
   4.273 +	{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, SMC1211TX },
   4.274 +/*	{0x1113, 0x1211, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MPX5030 },*/
   4.275 +	{0x1500, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DELTA8139 },
   4.276 +	{0x4033, 0x1360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ADDTRON8139 },
   4.277 +	{0x1186, 0x1300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DFE538TX },
   4.278 +	{0x1186, 0x1340, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DFE690TXD },
   4.279 +	{0x13d1, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, FE2000VX },
   4.280 +	{0x1259, 0xa117, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ALLIED8139 },
   4.281 +	{0x14ea, 0xab06, PCI_ANY_ID, PCI_ANY_ID, 0, 0, FNW3603TX },
   4.282 +	{0x14ea, 0xab07, PCI_ANY_ID, PCI_ANY_ID, 0, 0, FNW3800TX },
   4.283 +
   4.284 +#ifdef CONFIG_8139TOO_8129
   4.285 +	{0x10ec, 0x8129, PCI_ANY_ID, PCI_ANY_ID, 0, 0, RTL8129 },
   4.286 +#endif
   4.287 +
   4.288 +	/* some crazy cards report invalid vendor ids like
   4.289 +	 * 0x0001 here.  The other ids are valid and constant,
   4.290 +	 * so we simply don't match on the main vendor id.
   4.291 +	 */
   4.292 +	{PCI_ANY_ID, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139 },
   4.293 +	{PCI_ANY_ID, 0x8139, 0x1186, 0x1300, 0, 0, DFE538TX },
   4.294 +	{PCI_ANY_ID, 0x8139, 0x13d1, 0xab06, 0, 0, FE2000VX },
   4.295 +
   4.296 +	{0,}
   4.297 +};
   4.298 +MODULE_DEVICE_TABLE (pci, rtl8139_pci_tbl);
   4.299 +
   4.300 +#ifndef XEN
   4.301 +static struct {
   4.302 +	const char str[ETH_GSTRING_LEN];
   4.303 +} ethtool_stats_keys[] = {
   4.304 +	{ "early_rx" },
   4.305 +	{ "tx_buf_mapped" },
   4.306 +	{ "tx_timeouts" },
   4.307 +	{ "rx_lost_in_ring" },
   4.308 +};
   4.309 +#endif
   4.310 +
   4.311 +/* The rest of these values should never change. */
   4.312 +
   4.313 +/* Symbolic offsets to registers. */
   4.314 +enum RTL8139_registers {
   4.315 +	MAC0 = 0,		/* Ethernet hardware address. */
   4.316 +	MAR0 = 8,		/* Multicast filter. */
   4.317 +	TxStatus0 = 0x10,	/* Transmit status (Four 32bit registers). */
   4.318 +	TxAddr0 = 0x20,		/* Tx descriptors (also four 32bit). */
   4.319 +	RxBuf = 0x30,
   4.320 +	ChipCmd = 0x37,
   4.321 +	RxBufPtr = 0x38,
   4.322 +	RxBufAddr = 0x3A,
   4.323 +	IntrMask = 0x3C,
   4.324 +	IntrStatus = 0x3E,
   4.325 +	TxConfig = 0x40,
   4.326 +	ChipVersion = 0x43,
   4.327 +	RxConfig = 0x44,
   4.328 +	Timer = 0x48,		/* A general-purpose counter. */
   4.329 +	RxMissed = 0x4C,	/* 24 bits valid, write clears. */
   4.330 +	Cfg9346 = 0x50,
   4.331 +	Config0 = 0x51,
   4.332 +	Config1 = 0x52,
   4.333 +	FlashReg = 0x54,
   4.334 +	MediaStatus = 0x58,
   4.335 +	Config3 = 0x59,
   4.336 +	Config4 = 0x5A,		/* absent on RTL-8139A */
   4.337 +	HltClk = 0x5B,
   4.338 +	MultiIntr = 0x5C,
   4.339 +	TxSummary = 0x60,
   4.340 +	BasicModeCtrl = 0x62,
   4.341 +	BasicModeStatus = 0x64,
   4.342 +	NWayAdvert = 0x66,
   4.343 +	NWayLPAR = 0x68,
   4.344 +	NWayExpansion = 0x6A,
   4.345 +	/* Undocumented registers, but required for proper operation. */
   4.346 +	FIFOTMS = 0x70,		/* FIFO Control and test. */
   4.347 +	CSCR = 0x74,		/* Chip Status and Configuration Register. */
   4.348 +	PARA78 = 0x78,
   4.349 +	PARA7c = 0x7c,		/* Magic transceiver parameter register. */
   4.350 +	Config5 = 0xD8,		/* absent on RTL-8139A */
   4.351 +};
   4.352 +
   4.353 +enum ClearBitMasks {
   4.354 +	MultiIntrClear = 0xF000,
   4.355 +	ChipCmdClear = 0xE2,
   4.356 +	Config1Clear = (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
   4.357 +};
   4.358 +
   4.359 +enum ChipCmdBits {
   4.360 +	CmdReset = 0x10,
   4.361 +	CmdRxEnb = 0x08,
   4.362 +	CmdTxEnb = 0x04,
   4.363 +	RxBufEmpty = 0x01,
   4.364 +};
   4.365 +
   4.366 +/* Interrupt register bits, using my own meaningful names. */
   4.367 +enum IntrStatusBits {
   4.368 +	PCIErr = 0x8000,
   4.369 +	PCSTimeout = 0x4000,
   4.370 +	RxFIFOOver = 0x40,
   4.371 +	RxUnderrun = 0x20,
   4.372 +	RxOverflow = 0x10,
   4.373 +	TxErr = 0x08,
   4.374 +	TxOK = 0x04,
   4.375 +	RxErr = 0x02,
   4.376 +	RxOK = 0x01,
   4.377 +
   4.378 +	RxAckBits = RxFIFOOver | RxOverflow | RxOK,
   4.379 +};
   4.380 +
   4.381 +enum TxStatusBits {
   4.382 +	TxHostOwns = 0x2000,
   4.383 +	TxUnderrun = 0x4000,
   4.384 +	TxStatOK = 0x8000,
   4.385 +	TxOutOfWindow = 0x20000000,
   4.386 +	TxAborted = 0x40000000,
   4.387 +	TxCarrierLost = 0x80000000,
   4.388 +};
   4.389 +enum RxStatusBits {
   4.390 +	RxMulticast = 0x8000,
   4.391 +	RxPhysical = 0x4000,
   4.392 +	RxBroadcast = 0x2000,
   4.393 +	RxBadSymbol = 0x0020,
   4.394 +	RxRunt = 0x0010,
   4.395 +	RxTooLong = 0x0008,
   4.396 +	RxCRCErr = 0x0004,
   4.397 +	RxBadAlign = 0x0002,
   4.398 +	RxStatusOK = 0x0001,
   4.399 +};
   4.400 +
   4.401 +/* Bits in RxConfig. */
   4.402 +enum rx_mode_bits {
   4.403 +	AcceptErr = 0x20,
   4.404 +	AcceptRunt = 0x10,
   4.405 +	AcceptBroadcast = 0x08,
   4.406 +	AcceptMulticast = 0x04,
   4.407 +	AcceptMyPhys = 0x02,
   4.408 +	AcceptAllPhys = 0x01,
   4.409 +};
   4.410 +
   4.411 +/* Bits in TxConfig. */
   4.412 +enum tx_config_bits {
   4.413 +	TxIFG1 = (1 << 25),	/* Interframe Gap Time */
   4.414 +	TxIFG0 = (1 << 24),	/* Enabling these bits violates IEEE 802.3 */
   4.415 +	TxLoopBack = (1 << 18) | (1 << 17), /* enable loopback test mode */
   4.416 +	TxCRC = (1 << 16),	/* DISABLE appending CRC to end of Tx packets */
   4.417 +	TxClearAbt = (1 << 0),	/* Clear abort (WO) */
   4.418 +	TxDMAShift = 8,		/* DMA burst value (0-7) is shifted this many bits */
   4.419 +	TxRetryShift = 4,	/* TXRR value (0-15) is shifted this many bits */
   4.420 +
   4.421 +	TxVersionMask = 0x7C800000, /* mask out version bits 30-26, 23 */
   4.422 +};
   4.423 +
   4.424 +/* Bits in Config1 */
   4.425 +enum Config1Bits {
   4.426 +	Cfg1_PM_Enable = 0x01,
   4.427 +	Cfg1_VPD_Enable = 0x02,
   4.428 +	Cfg1_PIO = 0x04,
   4.429 +	Cfg1_MMIO = 0x08,
   4.430 +	LWAKE = 0x10,		/* not on 8139, 8139A */
   4.431 +	Cfg1_Driver_Load = 0x20,
   4.432 +	Cfg1_LED0 = 0x40,
   4.433 +	Cfg1_LED1 = 0x80,
   4.434 +	SLEEP = (1 << 1),	/* only on 8139, 8139A */
   4.435 +	PWRDN = (1 << 0),	/* only on 8139, 8139A */
   4.436 +};
   4.437 +
   4.438 +/* Bits in Config3 */
   4.439 +enum Config3Bits {
   4.440 +	Cfg3_FBtBEn    = (1 << 0), /* 1 = Fast Back to Back */
   4.441 +	Cfg3_FuncRegEn = (1 << 1), /* 1 = enable CardBus Function registers */
   4.442 +	Cfg3_CLKRUN_En = (1 << 2), /* 1 = enable CLKRUN */
   4.443 +	Cfg3_CardB_En  = (1 << 3), /* 1 = enable CardBus registers */
   4.444 +	Cfg3_LinkUp    = (1 << 4), /* 1 = wake up on link up */
   4.445 +	Cfg3_Magic     = (1 << 5), /* 1 = wake up on Magic Packet (tm) */
   4.446 +	Cfg3_PARM_En   = (1 << 6), /* 0 = software can set twister parameters */
   4.447 +	Cfg3_GNTSel    = (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */
   4.448 +};
   4.449 +
   4.450 +/* Bits in Config4 */
   4.451 +enum Config4Bits {
   4.452 +	LWPTN = (1 << 2),	/* not on 8139, 8139A */
   4.453 +};
   4.454 +
   4.455 +/* Bits in Config5 */
   4.456 +enum Config5Bits {
   4.457 +	Cfg5_PME_STS     = (1 << 0), /* 1 = PCI reset resets PME_Status */
   4.458 +	Cfg5_LANWake     = (1 << 1), /* 1 = enable LANWake signal */
   4.459 +	Cfg5_LDPS        = (1 << 2), /* 0 = save power when link is down */
   4.460 +	Cfg5_FIFOAddrPtr = (1 << 3), /* Realtek internal SRAM testing */
   4.461 +	Cfg5_UWF         = (1 << 4), /* 1 = accept unicast wakeup frame */
   4.462 +	Cfg5_MWF         = (1 << 5), /* 1 = accept multicast wakeup frame */
   4.463 +	Cfg5_BWF         = (1 << 6), /* 1 = accept broadcast wakeup frame */
   4.464 +};
   4.465 +
   4.466 +enum RxConfigBits {
   4.467 +	/* rx fifo threshold */
   4.468 +	RxCfgFIFOShift = 13,
   4.469 +	RxCfgFIFONone = (7 << RxCfgFIFOShift),
   4.470 +
   4.471 +	/* Max DMA burst */
   4.472 +	RxCfgDMAShift = 8,
   4.473 +	RxCfgDMAUnlimited = (7 << RxCfgDMAShift),
   4.474 +
   4.475 +	/* rx ring buffer length */
   4.476 +	RxCfgRcv8K = 0,
   4.477 +	RxCfgRcv16K = (1 << 11),
   4.478 +	RxCfgRcv32K = (1 << 12),
   4.479 +	RxCfgRcv64K = (1 << 11) | (1 << 12),
   4.480 +
   4.481 +	/* Disable packet wrap at end of Rx buffer */
   4.482 +	RxNoWrap = (1 << 7),
   4.483 +};
   4.484 +
   4.485 +
   4.486 +/* Twister tuning parameters from RealTek.
   4.487 +   Completely undocumented, but required to tune bad links on some boards. */
   4.488 +enum CSCRBits {
   4.489 +	CSCR_LinkOKBit = 0x0400,
   4.490 +	CSCR_LinkChangeBit = 0x0800,
   4.491 +	CSCR_LinkStatusBits = 0x0f000,
   4.492 +	CSCR_LinkDownOffCmd = 0x003c0,
   4.493 +	CSCR_LinkDownCmd = 0x0f3c0,
   4.494 +};
   4.495 +
   4.496 +
   4.497 +enum Cfg9346Bits {
   4.498 +	Cfg9346_Lock = 0x00,
   4.499 +	Cfg9346_Unlock = 0xC0,
   4.500 +};
   4.501 +
   4.502 +#ifdef CONFIG_8139TOO_TUNE_TWISTER
   4.503 +
   4.504 +enum TwisterParamVals {
   4.505 +	PARA78_default	= 0x78fa8388,
   4.506 +	PARA7c_default	= 0xcb38de43,	/* param[0][3] */
   4.507 +	PARA7c_xxx	= 0xcb38de43,
   4.508 +};
   4.509 +
   4.510 +static const unsigned long param[4][4] = {
   4.511 +	{0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
   4.512 +	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
   4.513 +	{0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
   4.514 +	{0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
   4.515 +};
   4.516 +
   4.517 +#endif /* CONFIG_8139TOO_TUNE_TWISTER */
   4.518 +
   4.519 +typedef enum {
   4.520 +	CH_8139 = 0,
   4.521 +	CH_8139_K,
   4.522 +	CH_8139A,
   4.523 +	CH_8139B,
   4.524 +	CH_8130,
   4.525 +	CH_8139C,
   4.526 +} chip_t;
   4.527 +
   4.528 +enum chip_flags {
   4.529 +	HasHltClk = (1 << 0),
   4.530 +	HasLWake = (1 << 1),
   4.531 +};
   4.532 +
   4.533 +
   4.534 +/* directly indexed by chip_t, above */
   4.535 +const static struct {
   4.536 +	const char *name;
   4.537 +	u8 version; /* from RTL8139C docs */
   4.538 +	u32 RxConfigMask; /* should clear the bits supported by this chip */
   4.539 +	u32 flags;
   4.540 +} rtl_chip_info[] = {
   4.541 +	{ "RTL-8139",
   4.542 +	  0x40,
   4.543 +	  0xf0fe0040, /* XXX copied from RTL8139A, verify */
   4.544 +	  HasHltClk,
   4.545 +	},
   4.546 +
   4.547 +	{ "RTL-8139 rev K",
   4.548 +	  0x60,
   4.549 +	  0xf0fe0040,
   4.550 +	  HasHltClk,
   4.551 +	},
   4.552 +
   4.553 +	{ "RTL-8139A",
   4.554 +	  0x70,
   4.555 +	  0xf0fe0040,
   4.556 +	  HasHltClk, /* XXX undocumented? */
   4.557 +	},
   4.558 +
   4.559 +	{ "RTL-8139B",
   4.560 +	  0x78,
   4.561 +	  0xf0fc0040,
   4.562 +	  HasLWake,
   4.563 +	},
   4.564 +
   4.565 +	{ "RTL-8130",
   4.566 +	  0x7C,
   4.567 +	  0xf0fe0040, /* XXX copied from RTL8139A, verify */
   4.568 +	  HasLWake,
   4.569 +	},
   4.570 +
   4.571 +	{ "RTL-8139C",
   4.572 +	  0x74,
   4.573 +	  0xf0fc0040, /* XXX copied from RTL8139B, verify */
   4.574 +	  HasLWake,
   4.575 +	},
   4.576 +
   4.577 +};
   4.578 +
   4.579 +struct rtl_extra_stats {
   4.580 +	unsigned long early_rx;
   4.581 +	unsigned long tx_buf_mapped;
   4.582 +	unsigned long tx_timeouts;
   4.583 +	unsigned long rx_lost_in_ring;
   4.584 +};
   4.585 +
   4.586 +struct rtl8139_private {
   4.587 +	void *mmio_addr;
   4.588 +	int drv_flags;
   4.589 +	struct pci_dev *pci_dev;
   4.590 +	struct net_device_stats stats;
   4.591 +	unsigned char *rx_ring;
   4.592 +	unsigned int cur_rx;	/* Index into the Rx buffer of next Rx pkt. */
   4.593 +	unsigned int tx_flag;
   4.594 +	unsigned long cur_tx;
   4.595 +	unsigned long dirty_tx;
   4.596 +	unsigned char *tx_buf[NUM_TX_DESC];	/* Tx bounce buffers */
   4.597 +	unsigned char *tx_bufs;	/* Tx bounce buffer region. */
   4.598 +	dma_addr_t rx_ring_dma;
   4.599 +	dma_addr_t tx_bufs_dma;
   4.600 +	signed char phys[4];		/* MII device addresses. */
   4.601 +	char twistie, twist_row, twist_col;	/* Twister tune state. */
   4.602 +	unsigned int default_port:4;	/* Last dev->if_port value. */
   4.603 +	spinlock_t lock;
   4.604 +	chip_t chipset;
   4.605 +	pid_t thr_pid;
   4.606 +#ifndef XEN
   4.607 +	wait_queue_head_t thr_wait;
   4.608 +	struct completion thr_exited;
   4.609 +#endif
   4.610 +	u32 rx_config;
   4.611 +	struct rtl_extra_stats xstats;
   4.612 +	int time_to_die;
   4.613 +	struct mii_if_info mii;
   4.614 +	unsigned int regs_len;
   4.615 +};
   4.616 +
   4.617 +MODULE_AUTHOR ("Jeff Garzik <jgarzik@pobox.com>");
   4.618 +MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");
   4.619 +MODULE_LICENSE("GPL");
   4.620 +
   4.621 +MODULE_PARM (multicast_filter_limit, "i");
   4.622 +MODULE_PARM (max_interrupt_work, "i");
   4.623 +MODULE_PARM (media, "1-" __MODULE_STRING(MAX_UNITS) "i");
   4.624 +MODULE_PARM (full_duplex, "1-" __MODULE_STRING(MAX_UNITS) "i");
   4.625 +MODULE_PARM (debug, "i");
   4.626 +MODULE_PARM_DESC (debug, "8139too bitmapped message enable number");
   4.627 +MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered multicast addresses");
   4.628 +MODULE_PARM_DESC (max_interrupt_work, "8139too maximum events handled per interrupt");
   4.629 +MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
   4.630 +MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)");
   4.631 +
   4.632 +static int read_eeprom (void *ioaddr, int location, int addr_len);
   4.633 +static int rtl8139_open (struct net_device *dev);
   4.634 +static int mdio_read (struct net_device *dev, int phy_id, int location);
   4.635 +static void mdio_write (struct net_device *dev, int phy_id, int location,
   4.636 +			int val);
   4.637 +#ifndef XEN
   4.638 +static int rtl8139_thread (void *data);
   4.639 +#endif
   4.640 +static void rtl8139_tx_timeout (struct net_device *dev);
   4.641 +static void rtl8139_init_ring (struct net_device *dev);
   4.642 +static int rtl8139_start_xmit (struct sk_buff *skb,
   4.643 +			       struct net_device *dev);
   4.644 +static void rtl8139_interrupt (int irq, void *dev_instance,
   4.645 +			       struct pt_regs *regs);
   4.646 +static int rtl8139_close (struct net_device *dev);
   4.647 +static int netdev_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
   4.648 +static struct net_device_stats *rtl8139_get_stats (struct net_device *dev);
   4.649 +static void rtl8139_set_rx_mode (struct net_device *dev);
   4.650 +static void __set_rx_mode (struct net_device *dev);
   4.651 +static void rtl8139_hw_start (struct net_device *dev);
   4.652 +
   4.653 +#ifdef USE_IO_OPS
   4.654 +
   4.655 +#define RTL_R8(reg)		inb (((unsigned long)ioaddr) + (reg))
   4.656 +#define RTL_R16(reg)		inw (((unsigned long)ioaddr) + (reg))
   4.657 +#define RTL_R32(reg)		((unsigned long) inl (((unsigned long)ioaddr) + (reg)))
   4.658 +#define RTL_W8(reg, val8)	outb ((val8), ((unsigned long)ioaddr) + (reg))
   4.659 +#define RTL_W16(reg, val16)	outw ((val16), ((unsigned long)ioaddr) + (reg))
   4.660 +#define RTL_W32(reg, val32)	outl ((val32), ((unsigned long)ioaddr) + (reg))
   4.661 +#define RTL_W8_F		RTL_W8
   4.662 +#define RTL_W16_F		RTL_W16
   4.663 +#define RTL_W32_F		RTL_W32
   4.664 +#undef readb
   4.665 +#undef readw
   4.666 +#undef readl
   4.667 +#undef writeb
   4.668 +#undef writew
   4.669 +#undef writel
   4.670 +#define readb(addr) inb((unsigned long)(addr))
   4.671 +#define readw(addr) inw((unsigned long)(addr))
   4.672 +#define readl(addr) inl((unsigned long)(addr))
   4.673 +#define writeb(val,addr) outb((val),(unsigned long)(addr))
   4.674 +#define writew(val,addr) outw((val),(unsigned long)(addr))
   4.675 +#define writel(val,addr) outl((val),(unsigned long)(addr))
   4.676 +
   4.677 +#else
   4.678 +
   4.679 +/* write MMIO register, with flush */
   4.680 +/* Flush avoids rtl8139 bug w/ posted MMIO writes */
   4.681 +#define RTL_W8_F(reg, val8)	do { writeb ((val8), ioaddr + (reg)); readb (ioaddr + (reg)); } while (0)
   4.682 +#define RTL_W16_F(reg, val16)	do { writew ((val16), ioaddr + (reg)); readw (ioaddr + (reg)); } while (0)
   4.683 +#define RTL_W32_F(reg, val32)	do { writel ((val32), ioaddr + (reg)); readl (ioaddr + (reg)); } while (0)
   4.684 +
   4.685 +
   4.686 +#define MMIO_FLUSH_AUDIT_COMPLETE 1
   4.687 +#if MMIO_FLUSH_AUDIT_COMPLETE
   4.688 +
   4.689 +/* write MMIO register */
   4.690 +#define RTL_W8(reg, val8)	writeb ((val8), ioaddr + (reg))
   4.691 +#define RTL_W16(reg, val16)	writew ((val16), ioaddr + (reg))
   4.692 +#define RTL_W32(reg, val32)	writel ((val32), ioaddr + (reg))
   4.693 +
   4.694 +#else
   4.695 +
   4.696 +/* write MMIO register, then flush */
   4.697 +#define RTL_W8		RTL_W8_F
   4.698 +#define RTL_W16		RTL_W16_F
   4.699 +#define RTL_W32		RTL_W32_F
   4.700 +
   4.701 +#endif /* MMIO_FLUSH_AUDIT_COMPLETE */
   4.702 +
   4.703 +/* read MMIO register */
   4.704 +#define RTL_R8(reg)		readb (ioaddr + (reg))
   4.705 +#define RTL_R16(reg)		readw (ioaddr + (reg))
   4.706 +#define RTL_R32(reg)		((unsigned long) readl (ioaddr + (reg)))
   4.707 +
   4.708 +#endif /* USE_IO_OPS */
   4.709 +
   4.710 +
   4.711 +static const u16 rtl8139_intr_mask =
   4.712 +	PCIErr | PCSTimeout | RxUnderrun | RxOverflow | RxFIFOOver |
   4.713 +	TxErr | TxOK | RxErr | RxOK;
   4.714 +
   4.715 +static const unsigned int rtl8139_rx_config =
   4.716 +	RxCfgRcv32K | RxNoWrap |
   4.717 +	(RX_FIFO_THRESH << RxCfgFIFOShift) |
   4.718 +	(RX_DMA_BURST << RxCfgDMAShift);
   4.719 +
   4.720 +static const unsigned int rtl8139_tx_config =
   4.721 +	(TX_DMA_BURST << TxDMAShift) | (TX_RETRY << TxRetryShift);
   4.722 +
   4.723 +static void __rtl8139_cleanup_dev (struct net_device *dev)
   4.724 +{
   4.725 +	struct rtl8139_private *tp;
   4.726 +	struct pci_dev *pdev;
   4.727 +
   4.728 +	assert (dev != NULL);
   4.729 +	assert (dev->priv != NULL);
   4.730 +
   4.731 +	tp = dev->priv;
   4.732 +	assert (tp->pci_dev != NULL);
   4.733 +	pdev = tp->pci_dev;
   4.734 +
   4.735 +#ifndef USE_IO_OPS
   4.736 +	if (tp->mmio_addr)
   4.737 +		iounmap (tp->mmio_addr);
   4.738 +#endif /* !USE_IO_OPS */
   4.739 +
   4.740 +	/* it's ok to call this even if we have no regions to free */
   4.741 +	pci_release_regions (pdev);
   4.742 +
   4.743 +#ifndef RTL8139_NDEBUG
   4.744 +	/* poison memory before freeing */
   4.745 +	memset (dev, 0xBC,
   4.746 +		sizeof (struct net_device) +
   4.747 +		sizeof (struct rtl8139_private));
   4.748 +#endif /* RTL8139_NDEBUG */
   4.749 +
   4.750 +	kfree (dev);
   4.751 +
   4.752 +	pci_set_drvdata (pdev, NULL);
   4.753 +}
   4.754 +
   4.755 +
   4.756 +static void rtl8139_chip_reset (void *ioaddr)
   4.757 +{
   4.758 +	int i;
   4.759 +
   4.760 +	/* Soft reset the chip. */
   4.761 +	RTL_W8 (ChipCmd, CmdReset);
   4.762 +
   4.763 +	/* Check that the chip has finished the reset. */
   4.764 +	for (i = 1000; i > 0; i--) {
   4.765 +		barrier();
   4.766 +		if ((RTL_R8 (ChipCmd) & CmdReset) == 0)
   4.767 +			break;
   4.768 +		udelay (10);
   4.769 +	}
   4.770 +}
   4.771 +
   4.772 +
   4.773 +static int __devinit rtl8139_init_board (struct pci_dev *pdev,
   4.774 +					 struct net_device **dev_out)
   4.775 +{
   4.776 +	void *ioaddr;
   4.777 +	struct net_device *dev;
   4.778 +	struct rtl8139_private *tp;
   4.779 +	u8 tmp8;
   4.780 +	int rc;
   4.781 +	unsigned int i;
   4.782 +	u32 pio_start, pio_end, pio_flags, pio_len;
   4.783 +	unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
   4.784 +	u32 tmp;
   4.785 +
   4.786 +#ifdef XEN
   4.787 +        DPRINTK(">\n");
   4.788 +#endif
   4.789 +	assert (pdev != NULL);
   4.790 +
   4.791 +	*dev_out = NULL;
   4.792 +
   4.793 +	/* dev and dev->priv zeroed in alloc_etherdev */
   4.794 +	dev = alloc_etherdev (sizeof (*tp));
   4.795 +	if (dev == NULL) {
   4.796 +		printk (KERN_ERR PFX "%s: Unable to alloc new net device\n", pdev->slot_name);
   4.797 +		return -ENOMEM;
   4.798 +	}
   4.799 +	SET_MODULE_OWNER(dev);
   4.800 +	tp = dev->priv;
   4.801 +	tp->pci_dev = pdev;
   4.802 +
   4.803 +	/* enable device (incl. PCI PM wakeup and hotplug setup) */
   4.804 +	rc = pci_enable_device (pdev);
   4.805 +	if (rc)
   4.806 +		goto err_out;
   4.807 +
   4.808 +	pio_start = pci_resource_start (pdev, 0);
   4.809 +	pio_end = pci_resource_end (pdev, 0);
   4.810 +	pio_flags = pci_resource_flags (pdev, 0);
   4.811 +	pio_len = pci_resource_len (pdev, 0);
   4.812 +
   4.813 +	mmio_start = pci_resource_start (pdev, 1);
   4.814 +	mmio_end = pci_resource_end (pdev, 1);
   4.815 +	mmio_flags = pci_resource_flags (pdev, 1);
   4.816 +	mmio_len = pci_resource_len (pdev, 1);
   4.817 +
   4.818 +	/* set this immediately, we need to know before
   4.819 +	 * we talk to the chip directly */
   4.820 +	DPRINTK("PIO region size == 0x%02X\n", pio_len);
   4.821 +	DPRINTK("MMIO region size == 0x%02lX\n", mmio_len);
   4.822 +
   4.823 +#ifdef USE_IO_OPS
   4.824 +	/* make sure PCI base addr 0 is PIO */
   4.825 +	if (!(pio_flags & IORESOURCE_IO)) {
   4.826 +		printk (KERN_ERR PFX "%s: region #0 not a PIO resource, aborting\n", pdev->slot_name);
   4.827 +		rc = -ENODEV;
   4.828 +		goto err_out;
   4.829 +	}
   4.830 +	/* check for weird/broken PCI region reporting */
   4.831 +	if (pio_len < RTL_MIN_IO_SIZE) {
   4.832 +		printk (KERN_ERR PFX "%s: Invalid PCI I/O region size(s), aborting\n", pdev->slot_name);
   4.833 +		rc = -ENODEV;
   4.834 +		goto err_out;
   4.835 +	}
   4.836 +#else
   4.837 +	/* make sure PCI base addr 1 is MMIO */
   4.838 +	if (!(mmio_flags & IORESOURCE_MEM)) {
   4.839 +		printk (KERN_ERR PFX "%s: region #1 not an MMIO resource, aborting\n", pdev->slot_name);
   4.840 +		rc = -ENODEV;
   4.841 +		goto err_out;
   4.842 +	}
   4.843 +	if (mmio_len < RTL_MIN_IO_SIZE) {
   4.844 +		printk (KERN_ERR PFX "%s: Invalid PCI mem region size(s), aborting\n", pdev->slot_name);
   4.845 +		rc = -ENODEV;
   4.846 +		goto err_out;
   4.847 +	}
   4.848 +#endif
   4.849 +
   4.850 +	rc = pci_request_regions (pdev, "8139too");
   4.851 +	if (rc)
   4.852 +		goto err_out;
   4.853 +
   4.854 +	/* enable PCI bus-mastering */
   4.855 +	pci_set_master (pdev);
   4.856 +
   4.857 +#ifdef USE_IO_OPS
   4.858 +	ioaddr = (void *) pio_start;
   4.859 +	dev->base_addr = pio_start;
   4.860 +	tp->mmio_addr = ioaddr;
   4.861 +	tp->regs_len = pio_len;
   4.862 +#else
   4.863 +	/* ioremap MMIO region */
   4.864 +	ioaddr = ioremap (mmio_start, mmio_len);
   4.865 +	if (ioaddr == NULL) {
   4.866 +		printk (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pdev->slot_name);
   4.867 +		rc = -EIO;
   4.868 +		goto err_out;
   4.869 +	}
   4.870 +	dev->base_addr = (long) ioaddr;
   4.871 +	tp->mmio_addr = ioaddr;
   4.872 +	tp->regs_len = mmio_len;
   4.873 +#endif /* USE_IO_OPS */
   4.874 +
   4.875 +	/* Bring old chips out of low-power mode. */
   4.876 +	RTL_W8 (HltClk, 'R');
   4.877 +
   4.878 +	/* check for missing/broken hardware */
   4.879 +	if (RTL_R32 (TxConfig) == 0xFFFFFFFF) {
   4.880 +		printk (KERN_ERR PFX "%s: Chip not responding, ignoring board\n",
   4.881 +			pdev->slot_name);
   4.882 +		rc = -EIO;
   4.883 +		goto err_out;
   4.884 +	}
   4.885 +
   4.886 +	/* identify chip attached to board */
   4.887 +	tmp = RTL_R8 (ChipVersion);
   4.888 +	for (i = 0; i < ARRAY_SIZE (rtl_chip_info); i++)
   4.889 +		if (tmp == rtl_chip_info[i].version) {
   4.890 +			tp->chipset = i;
   4.891 +			goto match;
   4.892 +		}
   4.893 +
   4.894 +	/* if unknown chip, assume array element #0, original RTL-8139 in this case */
   4.895 +	printk (KERN_DEBUG PFX "%s: unknown chip version, assuming RTL-8139\n",
   4.896 +		pdev->slot_name);
   4.897 +	printk (KERN_DEBUG PFX "%s: TxConfig = 0x%lx\n", pdev->slot_name, RTL_R32 (TxConfig));
   4.898 +	tp->chipset = 0;
   4.899 +
   4.900 +match:
   4.901 +	DPRINTK ("chipset id (%d) == index %d, '%s'\n",
   4.902 +		tmp,
   4.903 +		tp->chipset,
   4.904 +		rtl_chip_info[tp->chipset].name);
   4.905 +
   4.906 +	if (tp->chipset >= CH_8139B) {
   4.907 +		u8 new_tmp8 = tmp8 = RTL_R8 (Config1);
   4.908 +		DPRINTK("PCI PM wakeup\n");
   4.909 +		if ((rtl_chip_info[tp->chipset].flags & HasLWake) &&
   4.910 +		    (tmp8 & LWAKE))
   4.911 +			new_tmp8 &= ~LWAKE;
   4.912 +		new_tmp8 |= Cfg1_PM_Enable;
   4.913 +		if (new_tmp8 != tmp8) {
   4.914 +			RTL_W8 (Cfg9346, Cfg9346_Unlock);
   4.915 +			RTL_W8 (Config1, tmp8);
   4.916 +			RTL_W8 (Cfg9346, Cfg9346_Lock);
   4.917 +		}
   4.918 +		if (rtl_chip_info[tp->chipset].flags & HasLWake) {
   4.919 +			tmp8 = RTL_R8 (Config4);
   4.920 +			if (tmp8 & LWPTN)
   4.921 +				RTL_W8 (Config4, tmp8 & ~LWPTN);
   4.922 +		}
   4.923 +	} else {
   4.924 +		DPRINTK("Old chip wakeup\n");
   4.925 +		tmp8 = RTL_R8 (Config1);
   4.926 +		tmp8 &= ~(SLEEP | PWRDN);
   4.927 +		RTL_W8 (Config1, tmp8);
   4.928 +	}
   4.929 +
   4.930 +	rtl8139_chip_reset (ioaddr);
   4.931 +
   4.932 +	*dev_out = dev;
   4.933 +	return 0;
   4.934 +
   4.935 +err_out:
   4.936 +	__rtl8139_cleanup_dev (dev);
   4.937 +	return rc;
   4.938 +}
   4.939 +
   4.940 +
   4.941 +static int __devinit rtl8139_init_one (struct pci_dev *pdev,
   4.942 +				       const struct pci_device_id *ent)
   4.943 +{
   4.944 +	struct net_device *dev = NULL;
   4.945 +	struct rtl8139_private *tp;
   4.946 +	int i, addr_len, option;
   4.947 +	void *ioaddr;
   4.948 +	static int board_idx = -1;
   4.949 +	u8 pci_rev;
   4.950 +
   4.951 +#ifdef XEN
   4.952 +        DPRINTK("\n");
   4.953 +#endif
   4.954 +	assert (pdev != NULL);
   4.955 +	assert (ent != NULL);
   4.956 +
   4.957 +	board_idx++;
   4.958 +
   4.959 +	/* when we're built into the kernel, the driver version message
   4.960 +	 * is only printed if at least one 8139 board has been found
   4.961 +	 */
   4.962 +#ifndef MODULE
   4.963 +	{
   4.964 +		static int printed_version;
   4.965 +		if (!printed_version++)
   4.966 +			printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
   4.967 +	}
   4.968 +#endif
   4.969 +
   4.970 +	pci_read_config_byte(pdev, PCI_REVISION_ID, &pci_rev);
   4.971 +
   4.972 +	if (pdev->vendor == PCI_VENDOR_ID_REALTEK &&
   4.973 +	    pdev->device == PCI_DEVICE_ID_REALTEK_8139 && pci_rev >= 0x20) {
   4.974 +		printk(KERN_INFO PFX "pci dev %s (id %04x:%04x rev %02x) is an enhanced 8139C+ chip\n",
   4.975 +		       pdev->slot_name, pdev->vendor, pdev->device, pci_rev);
   4.976 +		printk(KERN_INFO PFX "Use the \"8139cp\" driver for improved performance and stability.\n");
   4.977 +	}
   4.978 +
   4.979 +	i = rtl8139_init_board (pdev, &dev);
   4.980 +	if (i < 0)
   4.981 +		return i;
   4.982 +
   4.983 +	tp = dev->priv;
   4.984 +	ioaddr = tp->mmio_addr;
   4.985 +
   4.986 +	assert (ioaddr != NULL);
   4.987 +	assert (dev != NULL);
   4.988 +	assert (tp != NULL);
   4.989 +
   4.990 +	addr_len = read_eeprom (ioaddr, 0, 8) == 0x8129 ? 8 : 6;
   4.991 +	for (i = 0; i < 3; i++)
   4.992 +		((u16 *) (dev->dev_addr))[i] =
   4.993 +		    le16_to_cpu (read_eeprom (ioaddr, i + 7, addr_len));
   4.994 +
   4.995 +	/* The Rtl8139-specific entries in the device structure. */
   4.996 +	dev->open = rtl8139_open;
   4.997 +	dev->hard_start_xmit = rtl8139_start_xmit;
   4.998 +	dev->stop = rtl8139_close;
   4.999 +	dev->get_stats = rtl8139_get_stats;
  4.1000 +	dev->set_multicast_list = rtl8139_set_rx_mode;
  4.1001 +	dev->do_ioctl = netdev_ioctl;
  4.1002 +	dev->tx_timeout = rtl8139_tx_timeout;
  4.1003 +	dev->watchdog_timeo = TX_TIMEOUT;
  4.1004 +
  4.1005 +	/* note: the hardware is not capable of sg/csum/highdma, however
  4.1006 +	 * through the use of skb_copy_and_csum_dev we enable these
  4.1007 +	 * features
  4.1008 +	 */
  4.1009 +#ifdef XEN
  4.1010 +#else
  4.1011 +	dev->features |= NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA;
  4.1012 +#endif
  4.1013 +
  4.1014 +	dev->irq = pdev->irq;
  4.1015 +
  4.1016 +	/* dev->priv/tp zeroed and aligned in alloc_etherdev */
  4.1017 +	tp = dev->priv;
  4.1018 +
  4.1019 +	/* note: tp->chipset set in rtl8139_init_board */
  4.1020 +	tp->drv_flags = board_info[ent->driver_data].hw_flags;
  4.1021 +	tp->mmio_addr = ioaddr;
  4.1022 +	spin_lock_init (&tp->lock);
  4.1023 +#ifndef XEN
  4.1024 +	init_waitqueue_head (&tp->thr_wait);
  4.1025 +	init_completion (&tp->thr_exited);
  4.1026 +#endif
  4.1027 +	tp->mii.dev = dev;
  4.1028 +	tp->mii.mdio_read = mdio_read;
  4.1029 +	tp->mii.mdio_write = mdio_write;
  4.1030 +	tp->mii.phy_id_mask = 0x3f;
  4.1031 +	tp->mii.reg_num_mask = 0x1f;
  4.1032 +
  4.1033 +	/* dev is fully set up and ready to use now */
  4.1034 +	DPRINTK("about to register device named %s (%p)...\n", dev->name, dev);
  4.1035 +	i = register_netdev (dev);
  4.1036 +	if (i) goto err_out;
  4.1037 +
  4.1038 +	pci_set_drvdata (pdev, dev);
  4.1039 +
  4.1040 +	printk (KERN_INFO "%s: %s at 0x%lx, "
  4.1041 +		"%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
  4.1042 +		"IRQ %d\n",
  4.1043 +		dev->name,
  4.1044 +		board_info[ent->driver_data].name,
  4.1045 +		dev->base_addr,
  4.1046 +		dev->dev_addr[0], dev->dev_addr[1],
  4.1047 +		dev->dev_addr[2], dev->dev_addr[3],
  4.1048 +		dev->dev_addr[4], dev->dev_addr[5],
  4.1049 +		dev->irq);
  4.1050 +
  4.1051 +	printk (KERN_DEBUG "%s:  Identified 8139 chip type '%s'\n",
  4.1052 +		dev->name, rtl_chip_info[tp->chipset].name);
  4.1053 +
  4.1054 +	/* Find the connected MII xcvrs.
  4.1055 +	   Doing this in open() would allow detecting external xcvrs later, but
  4.1056 +	   takes too much time. */
  4.1057 +#ifdef CONFIG_8139TOO_8129
  4.1058 +	if (tp->drv_flags & HAS_MII_XCVR) {
  4.1059 +		int phy, phy_idx = 0;
  4.1060 +		for (phy = 0; phy < 32 && phy_idx < sizeof(tp->phys); phy++) {
  4.1061 +			int mii_status = mdio_read(dev, phy, 1);
  4.1062 +			if (mii_status != 0xffff  &&  mii_status != 0x0000) {
  4.1063 +				u16 advertising = mdio_read(dev, phy, 4);
  4.1064 +				tp->phys[phy_idx++] = phy;
  4.1065 +				printk(KERN_INFO "%s: MII transceiver %d status 0x%4.4x "
  4.1066 +					   "advertising %4.4x.\n",
  4.1067 +					   dev->name, phy, mii_status, advertising);
  4.1068 +			}
  4.1069 +		}
  4.1070 +		if (phy_idx == 0) {
  4.1071 +			printk(KERN_INFO "%s: No MII transceivers found!  Assuming SYM "
  4.1072 +				   "transceiver.\n",
  4.1073 +				   dev->name);
  4.1074 +			tp->phys[0] = 32;
  4.1075 +		}
  4.1076 +	} else
  4.1077 +#endif
  4.1078 +		tp->phys[0] = 32;
  4.1079 +	tp->mii.phy_id = tp->phys[0];
  4.1080 +
  4.1081 +	/* The lower four bits are the media type. */
  4.1082 +	option = (board_idx >= MAX_UNITS) ? 0 : media[board_idx];
  4.1083 +	if (option > 0) {
  4.1084 +		tp->mii.full_duplex = (option & 0x210) ? 1 : 0;
  4.1085 +		tp->default_port = option & 0xFF;
  4.1086 +		if (tp->default_port)
  4.1087 +			tp->mii.force_media = 1;
  4.1088 +	}
  4.1089 +	if (board_idx < MAX_UNITS  &&  full_duplex[board_idx] > 0)
  4.1090 +		tp->mii.full_duplex = full_duplex[board_idx];
  4.1091 +	if (tp->mii.full_duplex) {
  4.1092 +		printk(KERN_INFO "%s: Media type forced to Full Duplex.\n", dev->name);
  4.1093 +		/* Changing the MII-advertised media because might prevent
  4.1094 +		   re-connection. */
  4.1095 +		tp->mii.force_media = 1;
  4.1096 +	}
  4.1097 +	if (tp->default_port) {
  4.1098 +		printk(KERN_INFO "  Forcing %dMbps %s-duplex operation.\n",
  4.1099 +			   (option & 0x20 ? 100 : 10),
  4.1100 +			   (option & 0x10 ? "full" : "half"));
  4.1101 +		mdio_write(dev, tp->phys[0], 0,
  4.1102 +				   ((option & 0x20) ? 0x2000 : 0) | 	/* 100Mbps? */
  4.1103 +				   ((option & 0x10) ? 0x0100 : 0)); /* Full duplex? */
  4.1104 +	}
  4.1105 +
  4.1106 +	/* Put the chip into low-power mode. */
  4.1107 +	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
  4.1108 +		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
  4.1109 +
  4.1110 +	return 0;
  4.1111 +
  4.1112 +err_out:
  4.1113 +	__rtl8139_cleanup_dev (dev);
  4.1114 +	return i;
  4.1115 +}
  4.1116 +
  4.1117 +
  4.1118 +static void __devexit rtl8139_remove_one (struct pci_dev *pdev)
  4.1119 +{
  4.1120 +	struct net_device *dev = pci_get_drvdata (pdev);
  4.1121 +	struct rtl8139_private *np;
  4.1122 +
  4.1123 +	assert (dev != NULL);
  4.1124 +	np = dev->priv;
  4.1125 +	assert (np != NULL);
  4.1126 +
  4.1127 +	unregister_netdev (dev);
  4.1128 +
  4.1129 +	__rtl8139_cleanup_dev (dev);
  4.1130 +}
  4.1131 +
  4.1132 +
  4.1133 +/* Serial EEPROM section. */
  4.1134 +
  4.1135 +/*  EEPROM_Ctrl bits. */
  4.1136 +#define EE_SHIFT_CLK	0x04	/* EEPROM shift clock. */
  4.1137 +#define EE_CS			0x08	/* EEPROM chip select. */
  4.1138 +#define EE_DATA_WRITE	0x02	/* EEPROM chip data in. */
  4.1139 +#define EE_WRITE_0		0x00
  4.1140 +#define EE_WRITE_1		0x02
  4.1141 +#define EE_DATA_READ	0x01	/* EEPROM chip data out. */
  4.1142 +#define EE_ENB			(0x80 | EE_CS)
  4.1143 +
  4.1144 +/* Delay between EEPROM clock transitions.
  4.1145 +   No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
  4.1146 + */
  4.1147 +
  4.1148 +#define eeprom_delay()	readl(ee_addr)
  4.1149 +
  4.1150 +/* The EEPROM commands include the alway-set leading bit. */
  4.1151 +#define EE_WRITE_CMD	(5)
  4.1152 +#define EE_READ_CMD		(6)
  4.1153 +#define EE_ERASE_CMD	(7)
  4.1154 +
  4.1155 +static int __devinit read_eeprom (void *ioaddr, int location, int addr_len)
  4.1156 +{
  4.1157 +	int i;
  4.1158 +	unsigned retval = 0;
  4.1159 +	void *ee_addr = ioaddr + Cfg9346;
  4.1160 +	int read_cmd = location | (EE_READ_CMD << addr_len);
  4.1161 +
  4.1162 +	writeb (EE_ENB & ~EE_CS, ee_addr);
  4.1163 +	writeb (EE_ENB, ee_addr);
  4.1164 +	eeprom_delay ();
  4.1165 +
  4.1166 +	/* Shift the read command bits out. */
  4.1167 +	for (i = 4 + addr_len; i >= 0; i--) {
  4.1168 +		int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
  4.1169 +		writeb (EE_ENB | dataval, ee_addr);
  4.1170 +		eeprom_delay ();
  4.1171 +		writeb (EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
  4.1172 +		eeprom_delay ();
  4.1173 +	}
  4.1174 +	writeb (EE_ENB, ee_addr);
  4.1175 +	eeprom_delay ();
  4.1176 +
  4.1177 +	for (i = 16; i > 0; i--) {
  4.1178 +		writeb (EE_ENB | EE_SHIFT_CLK, ee_addr);
  4.1179 +		eeprom_delay ();
  4.1180 +		retval =
  4.1181 +		    (retval << 1) | ((readb (ee_addr) & EE_DATA_READ) ? 1 :
  4.1182 +				     0);
  4.1183 +		writeb (EE_ENB, ee_addr);
  4.1184 +		eeprom_delay ();
  4.1185 +	}
  4.1186 +
  4.1187 +	/* Terminate the EEPROM access. */
  4.1188 +	writeb (~EE_CS, ee_addr);
  4.1189 +	eeprom_delay ();
  4.1190 +
  4.1191 +	return retval;
  4.1192 +}
  4.1193 +
  4.1194 +/* MII serial management: mostly bogus for now. */
  4.1195 +/* Read and write the MII management registers using software-generated
  4.1196 +   serial MDIO protocol.
  4.1197 +   The maximum data clock rate is 2.5 Mhz.  The minimum timing is usually
  4.1198 +   met by back-to-back PCI I/O cycles, but we insert a delay to avoid
  4.1199 +   "overclocking" issues. */
  4.1200 +#define MDIO_DIR		0x80
  4.1201 +#define MDIO_DATA_OUT	0x04
  4.1202 +#define MDIO_DATA_IN	0x02
  4.1203 +#define MDIO_CLK		0x01
  4.1204 +#define MDIO_WRITE0 (MDIO_DIR)
  4.1205 +#define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
  4.1206 +
  4.1207 +#define mdio_delay(mdio_addr)	readb(mdio_addr)
  4.1208 +
  4.1209 +
  4.1210 +static char mii_2_8139_map[8] = {
  4.1211 +	BasicModeCtrl,
  4.1212 +	BasicModeStatus,
  4.1213 +	0,
  4.1214 +	0,
  4.1215 +	NWayAdvert,
  4.1216 +	NWayLPAR,
  4.1217 +	NWayExpansion,
  4.1218 +	0
  4.1219 +};
  4.1220 +
  4.1221 +
  4.1222 +#ifdef CONFIG_8139TOO_8129
  4.1223 +/* Syncronize the MII management interface by shifting 32 one bits out. */
  4.1224 +static void mdio_sync (void *mdio_addr)
  4.1225 +{
  4.1226 +	int i;
  4.1227 +
  4.1228 +	for (i = 32; i >= 0; i--) {
  4.1229 +		writeb (MDIO_WRITE1, mdio_addr);
  4.1230 +		mdio_delay (mdio_addr);
  4.1231 +		writeb (MDIO_WRITE1 | MDIO_CLK, mdio_addr);
  4.1232 +		mdio_delay (mdio_addr);
  4.1233 +	}
  4.1234 +}
  4.1235 +#endif
  4.1236 +
  4.1237 +static int mdio_read (struct net_device *dev, int phy_id, int location)
  4.1238 +{
  4.1239 +	struct rtl8139_private *tp = dev->priv;
  4.1240 +	int retval = 0;
  4.1241 +#ifdef CONFIG_8139TOO_8129
  4.1242 +	void *mdio_addr = tp->mmio_addr + Config4;
  4.1243 +	int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location;
  4.1244 +	int i;
  4.1245 +#endif
  4.1246 +
  4.1247 +	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
  4.1248 +		return location < 8 && mii_2_8139_map[location] ?
  4.1249 +		    readw (tp->mmio_addr + mii_2_8139_map[location]) : 0;
  4.1250 +	}
  4.1251 +
  4.1252 +#ifdef CONFIG_8139TOO_8129
  4.1253 +	mdio_sync (mdio_addr);
  4.1254 +	/* Shift the read command bits out. */
  4.1255 +	for (i = 15; i >= 0; i--) {
  4.1256 +		int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0;
  4.1257 +
  4.1258 +		writeb (MDIO_DIR | dataval, mdio_addr);
  4.1259 +		mdio_delay (mdio_addr);
  4.1260 +		writeb (MDIO_DIR | dataval | MDIO_CLK, mdio_addr);
  4.1261 +		mdio_delay (mdio_addr);
  4.1262 +	}
  4.1263 +
  4.1264 +	/* Read the two transition, 16 data, and wire-idle bits. */
  4.1265 +	for (i = 19; i > 0; i--) {
  4.1266 +		writeb (0, mdio_addr);
  4.1267 +		mdio_delay (mdio_addr);
  4.1268 +		retval = (retval << 1) | ((readb (mdio_addr) & MDIO_DATA_IN) ? 1 : 0);
  4.1269 +		writeb (MDIO_CLK, mdio_addr);
  4.1270 +		mdio_delay (mdio_addr);
  4.1271 +	}
  4.1272 +#endif
  4.1273 +
  4.1274 +	return (retval >> 1) & 0xffff;
  4.1275 +}
  4.1276 +
  4.1277 +
  4.1278 +static void mdio_write (struct net_device *dev, int phy_id, int location,
  4.1279 +			int value)
  4.1280 +{
  4.1281 +	struct rtl8139_private *tp = dev->priv;
  4.1282 +#ifdef CONFIG_8139TOO_8129
  4.1283 +	void *mdio_addr = tp->mmio_addr + Config4;
  4.1284 +	int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value;
  4.1285 +	int i;
  4.1286 +#endif
  4.1287 +
  4.1288 +	if (phy_id > 31) {	/* Really a 8139.  Use internal registers. */
  4.1289 +		void *ioaddr = tp->mmio_addr;
  4.1290 +		if (location == 0) {
  4.1291 +			RTL_W8 (Cfg9346, Cfg9346_Unlock);
  4.1292 +			RTL_W16 (BasicModeCtrl, value);
  4.1293 +			RTL_W8 (Cfg9346, Cfg9346_Lock);
  4.1294 +		} else if (location < 8 && mii_2_8139_map[location])
  4.1295 +			RTL_W16 (mii_2_8139_map[location], value);
  4.1296 +		return;
  4.1297 +	}
  4.1298 +
  4.1299 +#ifdef CONFIG_8139TOO_8129
  4.1300 +	mdio_sync (mdio_addr);
  4.1301 +
  4.1302 +	/* Shift the command bits out. */
  4.1303 +	for (i = 31; i >= 0; i--) {
  4.1304 +		int dataval =
  4.1305 +		    (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0;
  4.1306 +		writeb (dataval, mdio_addr);
  4.1307 +		mdio_delay (mdio_addr);
  4.1308 +		writeb (dataval | MDIO_CLK, mdio_addr);
  4.1309 +		mdio_delay (mdio_addr);
  4.1310 +	}
  4.1311 +	/* Clear out extra bits. */
  4.1312 +	for (i = 2; i > 0; i--) {
  4.1313 +		writeb (0, mdio_addr);
  4.1314 +		mdio_delay (mdio_addr);
  4.1315 +		writeb (MDIO_CLK, mdio_addr);
  4.1316 +		mdio_delay (mdio_addr);
  4.1317 +	}
  4.1318 +#endif
  4.1319 +}
  4.1320 +
  4.1321 +
  4.1322 +static int rtl8139_open (struct net_device *dev)
  4.1323 +{
  4.1324 +	struct rtl8139_private *tp = dev->priv;
  4.1325 +	int retval;
  4.1326 +#ifdef RTL8139_DEBUG
  4.1327 +	void *ioaddr = tp->mmio_addr;
  4.1328 +#endif
  4.1329 +
  4.1330 +#ifdef XEN
  4.1331 +        DPRINTK(" open device\n");
  4.1332 +#endif
  4.1333 +	retval = request_irq (dev->irq, rtl8139_interrupt, SA_SHIRQ, dev->name, dev);
  4.1334 +	if (retval)
  4.1335 +		return retval;
  4.1336 +
  4.1337 +	tp->tx_bufs = pci_alloc_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
  4.1338 +					   &tp->tx_bufs_dma);
  4.1339 +	tp->rx_ring = pci_alloc_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
  4.1340 +					   &tp->rx_ring_dma);
  4.1341 +	if (tp->tx_bufs == NULL || tp->rx_ring == NULL) {
  4.1342 +		free_irq(dev->irq, dev);
  4.1343 +
  4.1344 +		if (tp->tx_bufs)
  4.1345 +			pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
  4.1346 +					    tp->tx_bufs, tp->tx_bufs_dma);
  4.1347 +		if (tp->rx_ring)
  4.1348 +			pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
  4.1349 +					    tp->rx_ring, tp->rx_ring_dma);
  4.1350 +
  4.1351 +		return -ENOMEM;
  4.1352 +
  4.1353 +	}
  4.1354 +
  4.1355 +	tp->mii.full_duplex = tp->mii.force_media;
  4.1356 +	tp->tx_flag = (TX_FIFO_THRESH << 11) & 0x003f0000;
  4.1357 +	tp->twistie = (tp->chipset == CH_8139_K) ? 1 : 0;
  4.1358 +	tp->time_to_die = 0;
  4.1359 +
  4.1360 +	rtl8139_init_ring (dev);
  4.1361 +	rtl8139_hw_start (dev);
  4.1362 +
  4.1363 +	DPRINTK ("%s: rtl8139_open() ioaddr %#lx IRQ %d"
  4.1364 +			" GP Pins %2.2x %s-duplex.\n",
  4.1365 +			dev->name, pci_resource_start (tp->pci_dev, 1),
  4.1366 +			dev->irq, RTL_R8 (MediaStatus),
  4.1367 +			tp->mii.full_duplex ? "full" : "half");
  4.1368 +
  4.1369 +#ifndef XEN
  4.1370 +	tp->thr_pid = kernel_thread (rtl8139_thread, dev, CLONE_FS | CLONE_FILES);
  4.1371 +	if (tp->thr_pid < 0)
  4.1372 +		printk (KERN_WARNING "%s: unable to start kernel thread\n",
  4.1373 +			dev->name);
  4.1374 +#endif
  4.1375 +
  4.1376 +	return 0;
  4.1377 +}
  4.1378 +
  4.1379 +
  4.1380 +static void rtl_check_media (struct net_device *dev)
  4.1381 +{
  4.1382 +	struct rtl8139_private *tp = dev->priv;
  4.1383 +
  4.1384 +#ifdef XEN
  4.1385 +        DPRINTK(">\n");
  4.1386 +#endif
  4.1387 +	if (tp->phys[0] >= 0) {
  4.1388 +		u16 mii_lpa = mdio_read(dev, tp->phys[0], MII_LPA);
  4.1389 +		if (mii_lpa == 0xffff)
  4.1390 +			;					/* Not there */
  4.1391 +		else if ((mii_lpa & LPA_100FULL) == LPA_100FULL
  4.1392 +				 || (mii_lpa & 0x00C0) == LPA_10FULL)
  4.1393 +			tp->mii.full_duplex = 1;
  4.1394 +
  4.1395 +		printk (KERN_INFO"%s: Setting %s%s-duplex based on"
  4.1396 +				" auto-negotiated partner ability %4.4x.\n",
  4.1397 +		        dev->name, mii_lpa == 0 ? "" :
  4.1398 +				(mii_lpa & 0x0180) ? "100mbps " : "10mbps ",
  4.1399 +			tp->mii.full_duplex ? "full" : "half", mii_lpa);
  4.1400 +	}
  4.1401 +}
  4.1402 +
  4.1403 +/* Start the hardware at open or resume. */
  4.1404 +static void rtl8139_hw_start (struct net_device *dev)
  4.1405 +{
  4.1406 +	struct rtl8139_private *tp = dev->priv;
  4.1407 +	void *ioaddr = tp->mmio_addr;
  4.1408 +	u32 i;
  4.1409 +	u8 tmp;
  4.1410 +
  4.1411 +#ifdef XEN
  4.1412 +        DPRINTK(">\n");
  4.1413 +#endif
  4.1414 +	/* Bring old chips out of low-power mode. */
  4.1415 +	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
  4.1416 +		RTL_W8 (HltClk, 'R');
  4.1417 +
  4.1418 +	rtl8139_chip_reset (ioaddr);
  4.1419 +
  4.1420 +	/* unlock Config[01234] and BMCR register writes */
  4.1421 +	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
  4.1422 +	/* Restore our idea of the MAC address. */
  4.1423 +	RTL_W32_F (MAC0 + 0, cpu_to_le32 (*(u32 *) (dev->dev_addr + 0)));
  4.1424 +	RTL_W32_F (MAC0 + 4, cpu_to_le32 (*(u32 *) (dev->dev_addr + 4)));
  4.1425 +
  4.1426 +	/* Must enable Tx/Rx before setting transfer thresholds! */
  4.1427 +	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
  4.1428 +
  4.1429 +	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
  4.1430 +	RTL_W32 (RxConfig, tp->rx_config);
  4.1431 +
  4.1432 +	/* Check this value: the documentation for IFG contradicts ifself. */
  4.1433 +	RTL_W32 (TxConfig, rtl8139_tx_config);
  4.1434 +
  4.1435 +	tp->cur_rx = 0;
  4.1436 +
  4.1437 +	rtl_check_media (dev);
  4.1438 +
  4.1439 +	if (tp->chipset >= CH_8139B) {
  4.1440 +		/* Disable magic packet scanning, which is enabled
  4.1441 +		 * when PM is enabled in Config1.  It can be reenabled
  4.1442 +		 * via ETHTOOL_SWOL if desired.  */
  4.1443 +		RTL_W8 (Config3, RTL_R8 (Config3) & ~Cfg3_Magic);
  4.1444 +	}
  4.1445 +
  4.1446 +	DPRINTK("init buffer addresses\n");
  4.1447 +
  4.1448 +	/* Lock Config[01234] and BMCR register writes */
  4.1449 +	RTL_W8 (Cfg9346, Cfg9346_Lock);
  4.1450 +
  4.1451 +	/* init Rx ring buffer DMA address */
  4.1452 +	RTL_W32_F (RxBuf, tp->rx_ring_dma);
  4.1453 +
  4.1454 +	/* init Tx buffer DMA addresses */
  4.1455 +	for (i = 0; i < NUM_TX_DESC; i++)
  4.1456 +		RTL_W32_F (TxAddr0 + (i * 4), tp->tx_bufs_dma + (tp->tx_buf[i] - tp->tx_bufs));
  4.1457 +
  4.1458 +	RTL_W32 (RxMissed, 0);
  4.1459 +
  4.1460 +	rtl8139_set_rx_mode (dev);
  4.1461 +
  4.1462 +	/* no early-rx interrupts */
  4.1463 +	RTL_W16 (MultiIntr, RTL_R16 (MultiIntr) & MultiIntrClear);
  4.1464 +
  4.1465 +	/* make sure RxTx has started */
  4.1466 +	tmp = RTL_R8 (ChipCmd);
  4.1467 +	if ((!(tmp & CmdRxEnb)) || (!(tmp & CmdTxEnb)))
  4.1468 +		RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
  4.1469 +
  4.1470 +	/* Enable all known interrupts by setting the interrupt mask. */
  4.1471 +	RTL_W16 (IntrMask, rtl8139_intr_mask);
  4.1472 +
  4.1473 +	netif_start_queue (dev);
  4.1474 +#ifdef XEN
  4.1475 +        DPRINTK("<\n");
  4.1476 +#endif
  4.1477 +}
  4.1478 +
  4.1479 +
  4.1480 +/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
  4.1481 +static void rtl8139_init_ring (struct net_device *dev)
  4.1482 +{
  4.1483 +	struct rtl8139_private *tp = dev->priv;
  4.1484 +	int i;
  4.1485 +
  4.1486 +#ifdef XEN
  4.1487 +        DPRINTK(">\n");
  4.1488 +#endif
  4.1489 +	tp->cur_rx = 0;
  4.1490 +	tp->cur_tx = 0;
  4.1491 +	tp->dirty_tx = 0;
  4.1492 +
  4.1493 +	for (i = 0; i < NUM_TX_DESC; i++)
  4.1494 +		tp->tx_buf[i] = &tp->tx_bufs[i * TX_BUF_SIZE];
  4.1495 +}
  4.1496 +
  4.1497 +
  4.1498 +/* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
  4.1499 +static int next_tick = 3 * HZ;
  4.1500 +
  4.1501 +#ifndef CONFIG_8139TOO_TUNE_TWISTER
  4.1502 +static inline void rtl8139_tune_twister (struct net_device *dev,
  4.1503 +				  struct rtl8139_private *tp) {}
  4.1504 +#else
  4.1505 +static void rtl8139_tune_twister (struct net_device *dev,
  4.1506 +				  struct rtl8139_private *tp)
  4.1507 +{
  4.1508 +	int linkcase;
  4.1509 +	void *ioaddr = tp->mmio_addr;
  4.1510 +
  4.1511 +	/* This is a complicated state machine to configure the "twister" for
  4.1512 +	   impedance/echos based on the cable length.
  4.1513 +	   All of this is magic and undocumented.
  4.1514 +	 */
  4.1515 +	switch (tp->twistie) {
  4.1516 +	case 1:
  4.1517 +		if (RTL_R16 (CSCR) & CSCR_LinkOKBit) {
  4.1518 +			/* We have link beat, let us tune the twister. */
  4.1519 +			RTL_W16 (CSCR, CSCR_LinkDownOffCmd);
  4.1520 +			tp->twistie = 2;	/* Change to state 2. */
  4.1521 +			next_tick = HZ / 10;
  4.1522 +		} else {
  4.1523 +			/* Just put in some reasonable defaults for when beat returns. */
  4.1524 +			RTL_W16 (CSCR, CSCR_LinkDownCmd);
  4.1525 +			RTL_W32 (FIFOTMS, 0x20);	/* Turn on cable test mode. */
  4.1526 +			RTL_W32 (PARA78, PARA78_default);
  4.1527 +			RTL_W32 (PARA7c, PARA7c_default);
  4.1528 +			tp->twistie = 0;	/* Bail from future actions. */
  4.1529 +		}
  4.1530 +		break;
  4.1531 +	case 2:
  4.1532 +		/* Read how long it took to hear the echo. */
  4.1533 +		linkcase = RTL_R16 (CSCR) & CSCR_LinkStatusBits;
  4.1534 +		if (linkcase == 0x7000)
  4.1535 +			tp->twist_row = 3;
  4.1536 +		else if (linkcase == 0x3000)
  4.1537 +			tp->twist_row = 2;
  4.1538 +		else if (linkcase == 0x1000)
  4.1539 +			tp->twist_row = 1;
  4.1540 +		else
  4.1541 +			tp->twist_row = 0;
  4.1542 +		tp->twist_col = 0;
  4.1543 +		tp->twistie = 3;	/* Change to state 2. */
  4.1544 +		next_tick = HZ / 10;
  4.1545 +		break;
  4.1546 +	case 3:
  4.1547 +		/* Put out four tuning parameters, one per 100msec. */
  4.1548 +		if (tp->twist_col == 0)
  4.1549 +			RTL_W16 (FIFOTMS, 0);
  4.1550 +		RTL_W32 (PARA7c, param[(int) tp->twist_row]
  4.1551 +			 [(int) tp->twist_col]);
  4.1552 +		next_tick = HZ / 10;
  4.1553 +		if (++tp->twist_col >= 4) {
  4.1554 +			/* For short cables we are done.
  4.1555 +			   For long cables (row == 3) check for mistune. */
  4.1556 +			tp->twistie =
  4.1557 +			    (tp->twist_row == 3) ? 4 : 0;
  4.1558 +		}
  4.1559 +		break;
  4.1560 +	case 4:
  4.1561 +		/* Special case for long cables: check for mistune. */
  4.1562 +		if ((RTL_R16 (CSCR) &
  4.1563 +		     CSCR_LinkStatusBits) == 0x7000) {
  4.1564 +			tp->twistie = 0;
  4.1565 +			break;
  4.1566 +		} else {
  4.1567 +			RTL_W32 (PARA7c, 0xfb38de03);
  4.1568 +			tp->twistie = 5;
  4.1569 +			next_tick = HZ / 10;
  4.1570 +		}
  4.1571 +		break;
  4.1572 +	case 5:
  4.1573 +		/* Retune for shorter cable (column 2). */
  4.1574 +		RTL_W32 (FIFOTMS, 0x20);
  4.1575 +		RTL_W32 (PARA78, PARA78_default);
  4.1576 +		RTL_W32 (PARA7c, PARA7c_default);
  4.1577 +		RTL_W32 (FIFOTMS, 0x00);
  4.1578 +		tp->twist_row = 2;
  4.1579 +		tp->twist_col = 0;
  4.1580 +		tp->twistie = 3;
  4.1581 +		next_tick = HZ / 10;
  4.1582 +		break;
  4.1583 +
  4.1584 +	default:
  4.1585 +		/* do nothing */
  4.1586 +		break;
  4.1587 +	}
  4.1588 +}
  4.1589 +#endif /* CONFIG_8139TOO_TUNE_TWISTER */
  4.1590 +
  4.1591 +
  4.1592 +static inline void rtl8139_thread_iter (struct net_device *dev,
  4.1593 +				 struct rtl8139_private *tp,
  4.1594 +				 void *ioaddr)
  4.1595 +{
  4.1596 +	int mii_lpa;
  4.1597 +
  4.1598 +	mii_lpa = mdio_read (dev, tp->phys[0], MII_LPA);
  4.1599 +
  4.1600 +	if (!tp->mii.force_media && mii_lpa != 0xffff) {
  4.1601 +		int duplex = (mii_lpa & LPA_100FULL)
  4.1602 +		    || (mii_lpa & 0x01C0) == 0x0040;
  4.1603 +		if (tp->mii.full_duplex != duplex) {
  4.1604 +			tp->mii.full_duplex = duplex;
  4.1605 +
  4.1606 +			if (mii_lpa) {
  4.1607 +				printk (KERN_INFO
  4.1608 +					"%s: Setting %s-duplex based on MII #%d link"
  4.1609 +					" partner ability of %4.4x.\n",
  4.1610 +					dev->name,
  4.1611 +					tp->mii.full_duplex ? "full" : "half",
  4.1612 +					tp->phys[0], mii_lpa);
  4.1613 +			} else {
  4.1614 +				printk(KERN_INFO"%s: media is unconnected, link down, or incompatible connection\n",
  4.1615 +				       dev->name);
  4.1616 +			}
  4.1617 +#if 0
  4.1618 +			RTL_W8 (Cfg9346, Cfg9346_Unlock);
  4.1619 +			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
  4.1620 +			RTL_W8 (Cfg9346, Cfg9346_Lock);
  4.1621 +#endif
  4.1622 +		}
  4.1623 +	}
  4.1624 +
  4.1625 +	next_tick = HZ * 60;
  4.1626 +
  4.1627 +	rtl8139_tune_twister (dev, tp);
  4.1628 +
  4.1629 +	DPRINTK ("%s: Media selection tick, Link partner %4.4x.\n",
  4.1630 +		 dev->name, RTL_R16 (NWayLPAR));
  4.1631 +	DPRINTK ("%s:  Other registers are IntMask %4.4x IntStatus %4.4x\n",
  4.1632 +		 dev->name, RTL_R16 (IntrMask), RTL_R16 (IntrStatus));
  4.1633 +	DPRINTK ("%s:  Chip config %2.2x %2.2x.\n",
  4.1634 +		 dev->name, RTL_R8 (Config0),
  4.1635 +		 RTL_R8 (Config1));
  4.1636 +}
  4.1637 +
  4.1638 +
  4.1639 +#ifndef XEN
  4.1640 +static int rtl8139_thread (void *data)
  4.1641 +{
  4.1642 +	struct net_device *dev = data;
  4.1643 +	struct rtl8139_private *tp = dev->priv;
  4.1644 +	unsigned long timeout;
  4.1645 +
  4.1646 +	daemonize ();
  4.1647 +	reparent_to_init();
  4.1648 +	spin_lock_irq(&current->sigmask_lock);
  4.1649 +	sigemptyset(&current->blocked);
  4.1650 +	recalc_sigpending(current);
  4.1651 +	spin_unlock_irq(&current->sigmask_lock);
  4.1652 +
  4.1653 +	strncpy (current->comm, dev->name, sizeof(current->comm) - 1);
  4.1654 +	current->comm[sizeof(current->comm) - 1] = '\0';
  4.1655 +
  4.1656 +	while (1) {
  4.1657 +		timeout = next_tick;
  4.1658 +		do {
  4.1659 +			timeout = interruptible_sleep_on_timeout (&tp->thr_wait, timeout);
  4.1660 +		} while (!signal_pending (current) && (timeout > 0));
  4.1661 +
  4.1662 +		if (signal_pending (current)) {
  4.1663 +			spin_lock_irq(&current->sigmask_lock);
  4.1664 +			flush_signals(current);
  4.1665 +			spin_unlock_irq(&current->sigmask_lock);
  4.1666 +		}
  4.1667 +
  4.1668 +		if (tp->time_to_die)
  4.1669 +			break;
  4.1670 +
  4.1671 +		rtnl_lock ();
  4.1672 +		rtl8139_thread_iter (dev, tp, tp->mmio_addr);
  4.1673 +		rtnl_unlock ();
  4.1674 +	}
  4.1675 +
  4.1676 +	complete_and_exit (&tp->thr_exited, 0);
  4.1677 +}
  4.1678 +#endif
  4.1679 +
  4.1680 +
  4.1681 +static void rtl8139_tx_clear (struct rtl8139_private *tp)
  4.1682 +{
  4.1683 +	tp->cur_tx = 0;
  4.1684 +	tp->dirty_tx = 0;
  4.1685 +
  4.1686 +	/* XXX account for unsent Tx packets in tp->stats.tx_dropped */
  4.1687 +}
  4.1688 +
  4.1689 +
  4.1690 +static void rtl8139_tx_timeout (struct net_device *dev)
  4.1691 +{
  4.1692 +	struct rtl8139_private *tp = dev->priv;
  4.1693 +	void *ioaddr = tp->mmio_addr;
  4.1694 +	int i;
  4.1695 +	u8 tmp8;
  4.1696 +	unsigned long flags;
  4.1697 +
  4.1698 +	DPRINTK ("%s: Transmit timeout, status %2.2x %4.4x "
  4.1699 +		 "media %2.2x.\n", dev->name,
  4.1700 +		 RTL_R8 (ChipCmd),
  4.1701 +		 RTL_R16 (IntrStatus),
  4.1702 +		 RTL_R8 (MediaStatus));
  4.1703 +
  4.1704 +	tp->xstats.tx_timeouts++;
  4.1705 +
  4.1706 +	/* disable Tx ASAP, if not already */
  4.1707 +	tmp8 = RTL_R8 (ChipCmd);
  4.1708 +	if (tmp8 & CmdTxEnb)
  4.1709 +		RTL_W8 (ChipCmd, CmdRxEnb);
  4.1710 +
  4.1711 +	/* Disable interrupts by clearing the interrupt mask. */
  4.1712 +	RTL_W16 (IntrMask, 0x0000);
  4.1713 +
  4.1714 +	/* Emit info to figure out what went wrong. */
  4.1715 +	printk (KERN_DEBUG "%s: Tx queue start entry %ld  dirty entry %ld.\n",
  4.1716 +		dev->name, tp->cur_tx, tp->dirty_tx);
  4.1717 +	for (i = 0; i < NUM_TX_DESC; i++)
  4.1718 +		printk (KERN_DEBUG "%s:  Tx descriptor %d is %8.8lx.%s\n",
  4.1719 +			dev->name, i, RTL_R32 (TxStatus0 + (i * 4)),
  4.1720 +			i == tp->dirty_tx % NUM_TX_DESC ?
  4.1721 +				" (queue head)" : "");
  4.1722 +
  4.1723 +	/* Stop a shared interrupt from scavenging while we are. */
  4.1724 +	spin_lock_irqsave (&tp->lock, flags);
  4.1725 +	rtl8139_tx_clear (tp);
  4.1726 +	spin_unlock_irqrestore (&tp->lock, flags);
  4.1727 +
  4.1728 +	/* ...and finally, reset everything */
  4.1729 +	rtl8139_hw_start (dev);
  4.1730 +
  4.1731 +	netif_wake_queue (dev);
  4.1732 +}
  4.1733 +
  4.1734 +
  4.1735 +#ifdef XEN
  4.1736 +void skb_copy_and_csum_dev(const struct sk_buff *skb, u8 *to)
  4.1737 +{
  4.1738 +    //unsigned short csum;
  4.1739 +    //long csstart;
  4.1740 +    //long csstuff;
  4.1741 +
  4.1742 +    DPRINTK(">\n");
  4.1743 +    DPRINTK("len=%d csum=%u ip_summed=%d\n", skb->len, skb->csum, skb->ip_summed);
  4.1744 +    DPRINTK("head=%p data=%p tail=%p end-%p\n", skb->head, skb->data, skb->tail, skb->end);
  4.1745 +
  4.1746 +    memcpy(to, skb->data, skb->len);
  4.1747 +
  4.1748 +    //csstart = skb->h.raw - skb->data;
  4.1749 +    //csum = compute_cksum(skb->data + csstart, skb->len - csstart);
  4.1750 +    //csstuff = csstart + skb->csum;
  4.1751 +    //*((unsigned short *)(to + csstuff)) = csum;
  4.1752 +    DPRINTK("<\n");
  4.1753 +}
  4.1754 +#endif
  4.1755 +
  4.1756 +static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev)
  4.1757 +{
  4.1758 +	struct rtl8139_private *tp = dev->priv;
  4.1759 +	void *ioaddr = tp->mmio_addr;
  4.1760 +	unsigned int entry;
  4.1761 +	unsigned int len = skb->len;
  4.1762 +
  4.1763 +	/* Calculate the next Tx descriptor entry. */
  4.1764 +	entry = tp->cur_tx % NUM_TX_DESC;
  4.1765 +
  4.1766 +	if (likely(len < TX_BUF_SIZE)) {
  4.1767 +		if (len < ETH_ZLEN)
  4.1768 +			memset(tp->tx_buf[entry], 0, ETH_ZLEN);
  4.1769 +		skb_copy_and_csum_dev(skb, tp->tx_buf[entry]);
  4.1770 +		dev_kfree_skb(skb);
  4.1771 +	} else {
  4.1772 +		dev_kfree_skb(skb);
  4.1773 +		tp->stats.tx_dropped++;
  4.1774 +		return 0;
  4.1775 +	}
  4.1776 +
  4.1777 +	/* Note: the chip doesn't have auto-pad! */
  4.1778 +	spin_lock_irq(&tp->lock);
  4.1779 +	RTL_W32_F (TxStatus0 + (entry * sizeof (u32)),
  4.1780 +		   tp->tx_flag | max(len, (unsigned int)ETH_ZLEN));
  4.1781 +
  4.1782 +	dev->trans_start = jiffies;
  4.1783 +
  4.1784 +	tp->cur_tx++;
  4.1785 +	wmb();
  4.1786 +
  4.1787 +	if ((tp->cur_tx - NUM_TX_DESC) == tp->dirty_tx)
  4.1788 +		netif_stop_queue (dev);
  4.1789 +	spin_unlock_irq(&tp->lock);
  4.1790 +
  4.1791 +	DPRINTK ("%s: Queued Tx packet size %u to slot %d.\n",
  4.1792 +		 dev->name, len, entry);
  4.1793 +
  4.1794 +	return 0;
  4.1795 +}
  4.1796 +
  4.1797 +
  4.1798 +static void rtl8139_tx_interrupt (struct net_device *dev,
  4.1799 +				  struct rtl8139_private *tp,
  4.1800 +				  void *ioaddr)
  4.1801 +{
  4.1802 +	unsigned long dirty_tx, tx_left;
  4.1803 +
  4.1804 +#ifdef XEN
  4.1805 +        DPRINTK(">\n");
  4.1806 +#endif
  4.1807 +	assert (dev != NULL);
  4.1808 +	assert (tp != NULL);
  4.1809 +	assert (ioaddr != NULL);
  4.1810 +
  4.1811 +	dirty_tx = tp->dirty_tx;
  4.1812 +	tx_left = tp->cur_tx - dirty_tx;
  4.1813 +	while (tx_left > 0) {
  4.1814 +		int entry = dirty_tx % NUM_TX_DESC;
  4.1815 +		int txstatus;
  4.1816 +
  4.1817 +		txstatus = RTL_R32 (TxStatus0 + (entry * sizeof (u32)));
  4.1818 +
  4.1819 +		if (!(txstatus & (TxStatOK | TxUnderrun | TxAborted)))
  4.1820 +			break;	/* It still hasn't been Txed */
  4.1821 +
  4.1822 +		/* Note: TxCarrierLost is always asserted at 100mbps. */
  4.1823 +		if (txstatus & (TxOutOfWindow | TxAborted)) {
  4.1824 +			/* There was an major error, log it. */
  4.1825 +			DPRINTK ("%s: Transmit error, Tx status %8.8x.\n",
  4.1826 +				 dev->name, txstatus);
  4.1827 +			tp->stats.tx_errors++;
  4.1828 +			if (txstatus & TxAborted) {
  4.1829 +				tp->stats.tx_aborted_errors++;
  4.1830 +				RTL_W32 (TxConfig, TxClearAbt);
  4.1831 +				RTL_W16 (IntrStatus, TxErr);
  4.1832 +				wmb();
  4.1833 +			}
  4.1834 +			if (txstatus & TxCarrierLost)
  4.1835 +				tp->stats.tx_carrier_errors++;
  4.1836 +			if (txstatus & TxOutOfWindow)
  4.1837 +				tp->stats.tx_window_errors++;
  4.1838 +		} else {
  4.1839 +			if (txstatus & TxUnderrun) {
  4.1840 +				/* Add 64 to the Tx FIFO threshold. */
  4.1841 +				if (tp->tx_flag < 0x00300000)
  4.1842 +					tp->tx_flag += 0x00020000;
  4.1843 +				tp->stats.tx_fifo_errors++;
  4.1844 +			}
  4.1845 +			tp->stats.collisions += (txstatus >> 24) & 15;
  4.1846 +			tp->stats.tx_bytes += txstatus & 0x7ff;
  4.1847 +			tp->stats.tx_packets++;
  4.1848 +		}
  4.1849 +
  4.1850 +		dirty_tx++;
  4.1851 +		tx_left--;
  4.1852 +	}
  4.1853 +
  4.1854 +#ifndef RTL8139_NDEBUG
  4.1855 +	if (tp->cur_tx - dirty_tx > NUM_TX_DESC) {
  4.1856 +		printk (KERN_ERR "%s: Out-of-sync dirty pointer, %ld vs. %ld.\n",
  4.1857 +		        dev->name, dirty_tx, tp->cur_tx);
  4.1858 +		dirty_tx += NUM_TX_DESC;
  4.1859 +	}
  4.1860 +#endif /* RTL8139_NDEBUG */
  4.1861 +
  4.1862 +	/* only wake the queue if we did work, and the queue is stopped */
  4.1863 +	if (tp->dirty_tx != dirty_tx) {
  4.1864 +		tp->dirty_tx = dirty_tx;
  4.1865 +		mb();
  4.1866 +		if (netif_queue_stopped (dev))
  4.1867 +			netif_wake_queue (dev);
  4.1868 +	}
  4.1869 +#ifdef XEN
  4.1870 +        DPRINTK("<\n");
  4.1871 +#endif
  4.1872 +}
  4.1873 +
  4.1874 +
  4.1875 +/* TODO: clean this up!  Rx reset need not be this intensive */
  4.1876 +static void rtl8139_rx_err (u32 rx_status, struct net_device *dev,
  4.1877 +			    struct rtl8139_private *tp, void *ioaddr)
  4.1878 +{
  4.1879 +	u8 tmp8;
  4.1880 +#ifdef CONFIG_8139_OLD_RX_RESET
  4.1881 +	int tmp_work;
  4.1882 +#endif
  4.1883 +
  4.1884 +	DPRINTK ("%s: Ethernet frame had errors, status %8.8x.\n",
  4.1885 +	         dev->name, rx_status);
  4.1886 +	tp->stats.rx_errors++;
  4.1887 +	if (!(rx_status & RxStatusOK)) {
  4.1888 +		if (rx_status & RxTooLong) {
  4.1889 +			DPRINTK ("%s: Oversized Ethernet frame, status %4.4x!\n",
  4.1890 +			 	dev->name, rx_status);
  4.1891 +			/* A.C.: The chip hangs here. */
  4.1892 +		}
  4.1893 +		if (rx_status & (RxBadSymbol | RxBadAlign))
  4.1894 +			tp->stats.rx_frame_errors++;
  4.1895 +		if (rx_status & (RxRunt | RxTooLong))
  4.1896 +			tp->stats.rx_length_errors++;
  4.1897 +		if (rx_status & RxCRCErr)
  4.1898 +			tp->stats.rx_crc_errors++;
  4.1899 +	} else {
  4.1900 +		tp->xstats.rx_lost_in_ring++;
  4.1901 +	}
  4.1902 +
  4.1903 +#ifndef CONFIG_8139_OLD_RX_RESET
  4.1904 +	tmp8 = RTL_R8 (ChipCmd);
  4.1905 +	RTL_W8 (ChipCmd, tmp8 & ~CmdRxEnb);
  4.1906 +	RTL_W8 (ChipCmd, tmp8);
  4.1907 +	RTL_W32 (RxConfig, tp->rx_config);
  4.1908 +	tp->cur_rx = 0;
  4.1909 +#else
  4.1910 +	/* Reset the receiver, based on RealTek recommendation. (Bug?) */
  4.1911 +
  4.1912 +	/* disable receive */
  4.1913 +	RTL_W8_F (ChipCmd, CmdTxEnb);
  4.1914 +	tmp_work = 200;
  4.1915 +	while (--tmp_work > 0) {
  4.1916 +		udelay(1);
  4.1917 +		tmp8 = RTL_R8 (ChipCmd);
  4.1918 +		if (!(tmp8 & CmdRxEnb))
  4.1919 +			break;
  4.1920 +	}
  4.1921 +	if (tmp_work <= 0)
  4.1922 +		printk (KERN_WARNING PFX "rx stop wait too long\n");
  4.1923 +	/* restart receive */
  4.1924 +	tmp_work = 200;
  4.1925 +	while (--tmp_work > 0) {
  4.1926 +		RTL_W8_F (ChipCmd, CmdRxEnb | CmdTxEnb);
  4.1927 +		udelay(1);
  4.1928 +		tmp8 = RTL_R8 (ChipCmd);
  4.1929 +		if ((tmp8 & CmdRxEnb) && (tmp8 & CmdTxEnb))
  4.1930 +			break;
  4.1931 +	}
  4.1932 +	if (tmp_work <= 0)
  4.1933 +		printk (KERN_WARNING PFX "tx/rx enable wait too long\n");
  4.1934 +
  4.1935 +	/* and reinitialize all rx related registers */
  4.1936 +	RTL_W8_F (Cfg9346, Cfg9346_Unlock);
  4.1937 +	/* Must enable Tx/Rx before setting transfer thresholds! */
  4.1938 +	RTL_W8 (ChipCmd, CmdRxEnb | CmdTxEnb);
  4.1939 +
  4.1940 +	tp->rx_config = rtl8139_rx_config | AcceptBroadcast | AcceptMyPhys;
  4.1941 +	RTL_W32 (RxConfig, tp->rx_config);
  4.1942 +	tp->cur_rx = 0;
  4.1943 +
  4.1944 +	DPRINTK("init buffer addresses\n");
  4.1945 +
  4.1946 +	/* Lock Config[01234] and BMCR register writes */
  4.1947 +	RTL_W8 (Cfg9346, Cfg9346_Lock);
  4.1948 +
  4.1949 +	/* init Rx ring buffer DMA address */
  4.1950 +	RTL_W32_F (RxBuf, tp->rx_ring_dma);
  4.1951 +
  4.1952 +	/* A.C.: Reset the multicast list. */
  4.1953 +	__set_rx_mode (dev);
  4.1954 +#endif
  4.1955 +}
  4.1956 +
  4.1957 +static void rtl8139_rx_interrupt (struct net_device *dev,
  4.1958 +				  struct rtl8139_private *tp, void *ioaddr)
  4.1959 +{
  4.1960 +	unsigned char *rx_ring;
  4.1961 +	u16 cur_rx;
  4.1962 +
  4.1963 +	assert (dev != NULL);
  4.1964 +	assert (tp != NULL);
  4.1965 +	assert (ioaddr != NULL);
  4.1966 +
  4.1967 +	rx_ring = tp->rx_ring;
  4.1968 +	cur_rx = tp->cur_rx;
  4.1969 +
  4.1970 +	DPRINTK ("%s: In rtl8139_rx(), current %4.4x BufAddr %4.4x,"
  4.1971 +		 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
  4.1972 +		 RTL_R16 (RxBufAddr),
  4.1973 +		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
  4.1974 +
  4.1975 +	while ((RTL_R8 (ChipCmd) & RxBufEmpty) == 0) {
  4.1976 +		int ring_offset = cur_rx % RX_BUF_LEN;
  4.1977 +		u32 rx_status;
  4.1978 +		unsigned int rx_size;
  4.1979 +		unsigned int pkt_size;
  4.1980 +		struct sk_buff *skb;
  4.1981 +
  4.1982 +		rmb();
  4.1983 +
  4.1984 +		/* read size+status of next frame from DMA ring buffer */
  4.1985 +		rx_status = le32_to_cpu (*(u32 *) (rx_ring + ring_offset));
  4.1986 +		rx_size = rx_status >> 16;
  4.1987 +		pkt_size = rx_size - 4;
  4.1988 +
  4.1989 +		DPRINTK ("%s:  rtl8139_rx() status %4.4x, size %4.4x,"
  4.1990 +			 " cur %4.4x.\n", dev->name, rx_status,
  4.1991 +			 rx_size, cur_rx);
  4.1992 +#if RTL8139_DEBUG > 2
  4.1993 +		{
  4.1994 +			int i;
  4.1995 +			DPRINTK ("%s: Frame contents ", dev->name);
  4.1996 +			for (i = 0; i < 70; i++)
  4.1997 +				printk (" %2.2x",
  4.1998 +					rx_ring[ring_offset + i]);
  4.1999 +			printk (".\n");
  4.2000 +		}
  4.2001 +#endif
  4.2002 +
  4.2003 +		/* Packet copy from FIFO still in progress.
  4.2004 +		 * Theoretically, this should never happen
  4.2005 +		 * since EarlyRx is disabled.
  4.2006 +		 */
  4.2007 +		if (rx_size == 0xfff0) {
  4.2008 +			tp->xstats.early_rx++;
  4.2009 +			break;
  4.2010 +		}
  4.2011 +
  4.2012 +		/* If Rx err or invalid rx_size/rx_status received
  4.2013 +		 * (which happens if we get lost in the ring),
  4.2014 +		 * Rx process gets reset, so we abort any further
  4.2015 +		 * Rx processing.
  4.2016 +		 */
  4.2017 +		if ((rx_size > (MAX_ETH_FRAME_SIZE+4)) ||
  4.2018 +		    (rx_size < 8) ||
  4.2019 +		    (!(rx_status & RxStatusOK))) {
  4.2020 +			rtl8139_rx_err (rx_status, dev, tp, ioaddr);
  4.2021 +			return;
  4.2022 +		}
  4.2023 +
  4.2024 +		/* Malloc up new buffer, compatible with net-2e. */
  4.2025 +		/* Omit the four octet CRC from the length. */
  4.2026 +
  4.2027 +		/* TODO: consider allocating skb's outside of
  4.2028 +		 * interrupt context, both to speed interrupt processing,
  4.2029 +		 * and also to reduce the chances of having to
  4.2030 +		 * drop packets here under memory pressure.
  4.2031 +		 */
  4.2032 +
  4.2033 +		skb = dev_alloc_skb (pkt_size + 2);
  4.2034 +		if (skb) {
  4.2035 +			skb->dev = dev;
  4.2036 +			skb_reserve (skb, 2);	/* 16 byte align the IP fields. */
  4.2037 +
  4.2038 +			eth_copy_and_sum (skb, &rx_ring[ring_offset + 4], pkt_size, 0);
  4.2039 +			skb_put (skb, pkt_size);
  4.2040 +
  4.2041 +			skb->protocol = eth_type_trans (skb, dev);
  4.2042 +			netif_rx (skb);
  4.2043 +			dev->last_rx = jiffies;
  4.2044 +			tp->stats.rx_bytes += pkt_size;
  4.2045 +			tp->stats.rx_packets++;
  4.2046 +		} else {
  4.2047 +			printk (KERN_WARNING
  4.2048 +				"%s: Memory squeeze, dropping packet.\n",
  4.2049 +				dev->name);
  4.2050 +			tp->stats.rx_dropped++;
  4.2051 +		}
  4.2052 +
  4.2053 +		cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
  4.2054 +		RTL_W16 (RxBufPtr, cur_rx - 16);
  4.2055 +
  4.2056 +		if (RTL_R16 (IntrStatus) & RxAckBits)
  4.2057 +			RTL_W16_F (IntrStatus, RxAckBits);
  4.2058 +	}
  4.2059 +
  4.2060 +	DPRINTK ("%s: Done rtl8139_rx(), current %4.4x BufAddr %4.4x,"
  4.2061 +		 " free to %4.4x, Cmd %2.2x.\n", dev->name, cur_rx,
  4.2062 +		 RTL_R16 (RxBufAddr),
  4.2063 +		 RTL_R16 (RxBufPtr), RTL_R8 (ChipCmd));
  4.2064 +
  4.2065 +	tp->cur_rx = cur_rx;
  4.2066 +}
  4.2067 +
  4.2068 +
  4.2069 +static void rtl8139_weird_interrupt (struct net_device *dev,
  4.2070 +				     struct rtl8139_private *tp,
  4.2071 +				     void *ioaddr,
  4.2072 +				     int status, int link_changed)
  4.2073 +{
  4.2074 +	DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n",
  4.2075 +		 dev->name, status);
  4.2076 +
  4.2077 +	assert (dev != NULL);
  4.2078 +	assert (tp != NULL);
  4.2079 +	assert (ioaddr != NULL);
  4.2080 +
  4.2081 +	/* Update the error count. */
  4.2082 +	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
  4.2083 +	RTL_W32 (RxMissed, 0);
  4.2084 +
  4.2085 +	if ((status & RxUnderrun) && link_changed &&
  4.2086 +	    (tp->drv_flags & HAS_LNK_CHNG)) {
  4.2087 +		/* Really link-change on new chips. */
  4.2088 +		int lpar = RTL_R16 (NWayLPAR);
  4.2089 +		int duplex = (lpar & LPA_100FULL) || (lpar & 0x01C0) == 0x0040
  4.2090 +				|| tp->mii.force_media;
  4.2091 +		if (tp->mii.full_duplex != duplex) {
  4.2092 +			tp->mii.full_duplex = duplex;
  4.2093 +#if 0
  4.2094 +			RTL_W8 (Cfg9346, Cfg9346_Unlock);
  4.2095 +			RTL_W8 (Config1, tp->mii.full_duplex ? 0x60 : 0x20);
  4.2096 +			RTL_W8 (Cfg9346, Cfg9346_Lock);
  4.2097 +#endif
  4.2098 +		}
  4.2099 +		status &= ~RxUnderrun;
  4.2100 +	}
  4.2101 +
  4.2102 +	/* XXX along with rtl8139_rx_err, are we double-counting errors? */
  4.2103 +	if (status &
  4.2104 +	    (RxUnderrun | RxOverflow | RxErr | RxFIFOOver))
  4.2105 +		tp->stats.rx_errors++;
  4.2106 +
  4.2107 +	if (status & PCSTimeout)
  4.2108 +		tp->stats.rx_length_errors++;
  4.2109 +	if (status & (RxUnderrun | RxFIFOOver))
  4.2110 +		tp->stats.rx_fifo_errors++;
  4.2111 +	if (status & PCIErr) {
  4.2112 +		u16 pci_cmd_status;
  4.2113 +		pci_read_config_word (tp->pci_dev, PCI_STATUS, &pci_cmd_status);
  4.2114 +		pci_write_config_word (tp->pci_dev, PCI_STATUS, pci_cmd_status);
  4.2115 +
  4.2116 +		printk (KERN_ERR "%s: PCI Bus error %4.4x.\n",
  4.2117 +			dev->name, pci_cmd_status);
  4.2118 +	}
  4.2119 +}
  4.2120 +
  4.2121 +
  4.2122 +/* The interrupt handler does all of the Rx thread work and cleans up
  4.2123 +   after the Tx thread. */
  4.2124 +static void rtl8139_interrupt (int irq, void *dev_instance,
  4.2125 +			       struct pt_regs *regs)
  4.2126 +{
  4.2127 +	struct net_device *dev = (struct net_device *) dev_instance;
  4.2128 +	struct rtl8139_private *tp = dev->priv;
  4.2129 +	int boguscnt = max_interrupt_work;
  4.2130 +	void *ioaddr = tp->mmio_addr;
  4.2131 +	int ackstat, status;
  4.2132 +	int link_changed = 0; /* avoid bogus "uninit" warning */
  4.2133 +
  4.2134 +#ifdef XEN
  4.2135 +        DPRINTK(" irq=%d\n", irq);
  4.2136 +#endif
  4.2137 +	spin_lock (&tp->lock);
  4.2138 +
  4.2139 +	do {
  4.2140 +		status = RTL_R16 (IntrStatus);
  4.2141 +
  4.2142 +		/* h/w no longer present (hotplug?) or major error, bail */
  4.2143 +		if (status == 0xFFFF)
  4.2144 +			break;
  4.2145 +
  4.2146 +		if ((status &
  4.2147 +		     (PCIErr | PCSTimeout | RxUnderrun | RxOverflow |
  4.2148 +		      RxFIFOOver | TxErr | TxOK | RxErr | RxOK)) == 0)
  4.2149 +			break;
  4.2150 +
  4.2151 +		/* Acknowledge all of the current interrupt sources ASAP, but
  4.2152 +		   an first get an additional status bit from CSCR. */
  4.2153 +		if (status & RxUnderrun)
  4.2154 +			link_changed = RTL_R16 (CSCR) & CSCR_LinkChangeBit;
  4.2155 +
  4.2156 +		/* The chip takes special action when we clear RxAckBits,
  4.2157 +		 * so we clear them later in rtl8139_rx_interrupt
  4.2158 +		 */
  4.2159 +		ackstat = status & ~(RxAckBits | TxErr);
  4.2160 +		RTL_W16 (IntrStatus, ackstat);
  4.2161 +
  4.2162 +		DPRINTK ("%s: interrupt  status=%#4.4x ackstat=%#4.4x new intstat=%#4.4x.\n",
  4.2163 +			 dev->name, status, ackstat, RTL_R16 (IntrStatus));
  4.2164 +
  4.2165 +		if (netif_running (dev) && (status & RxAckBits))
  4.2166 +			rtl8139_rx_interrupt (dev, tp, ioaddr);
  4.2167 +
  4.2168 +		/* Check uncommon events with one test. */
  4.2169 +		if (status & (PCIErr | PCSTimeout | RxUnderrun | RxOverflow |
  4.2170 +		  	      RxFIFOOver | RxErr))
  4.2171 +			rtl8139_weird_interrupt (dev, tp, ioaddr,
  4.2172 +						 status, link_changed);
  4.2173 +
  4.2174 +		if (netif_running (dev) && (status & (TxOK | TxErr))) {
  4.2175 +			rtl8139_tx_interrupt (dev, tp, ioaddr);
  4.2176 +			if (status & TxErr)
  4.2177 +				RTL_W16 (IntrStatus, TxErr);
  4.2178 +		}
  4.2179 +
  4.2180 +		boguscnt--;
  4.2181 +	} while (boguscnt > 0);
  4.2182 +
  4.2183 +	if (boguscnt <= 0) {
  4.2184 +		printk (KERN_WARNING "%s: Too much work at interrupt, "
  4.2185 +			"IntrStatus=0x%4.4x.\n", dev->name, status);
  4.2186 +
  4.2187 +		/* Clear all interrupt sources. */
  4.2188 +		RTL_W16 (IntrStatus, 0xffff);
  4.2189 +	}
  4.2190 +
  4.2191 +	spin_unlock (&tp->lock);
  4.2192 +
  4.2193 +	DPRINTK ("%s: exiting interrupt, intr_status=%#4.4x.\n",
  4.2194 +		 dev->name, RTL_R16 (IntrStatus));
  4.2195 +}
  4.2196 +
  4.2197 +
  4.2198 +static int rtl8139_close (struct net_device *dev)
  4.2199 +{
  4.2200 +	struct rtl8139_private *tp = dev->priv;
  4.2201 +	void *ioaddr = tp->mmio_addr;
  4.2202 +#ifndef XEN
  4.2203 +	int ret = 0;
  4.2204 +#endif
  4.2205 +	unsigned long flags;
  4.2206 +
  4.2207 +	netif_stop_queue (dev);
  4.2208 +
  4.2209 +#ifndef XEN
  4.2210 +	if (tp->thr_pid >= 0) {
  4.2211 +		tp->time_to_die = 1;
  4.2212 +		wmb();
  4.2213 +		ret = kill_proc (tp->thr_pid, SIGTERM, 1);
  4.2214 +		if (ret) {
  4.2215 +			printk (KERN_ERR "%s: unable to signal thread\n", dev->name);
  4.2216 +			return ret;
  4.2217 +		}
  4.2218 +		wait_for_completion (&tp->thr_exited);
  4.2219 +	}
  4.2220 +#endif
  4.2221 +
  4.2222 +	DPRINTK ("%s: Shutting down ethercard, status was 0x%4.4x.\n",
  4.2223 +			dev->name, RTL_R16 (IntrStatus));
  4.2224 +
  4.2225 +	spin_lock_irqsave (&tp->lock, flags);
  4.2226 +
  4.2227 +	/* Stop the chip's Tx and Rx DMA processes. */
  4.2228 +	RTL_W8 (ChipCmd, 0);
  4.2229 +
  4.2230 +	/* Disable interrupts by clearing the interrupt mask. */
  4.2231 +	RTL_W16 (IntrMask, 0);
  4.2232 +
  4.2233 +	/* Update the error counts. */
  4.2234 +	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
  4.2235 +	RTL_W32 (RxMissed, 0);
  4.2236 +
  4.2237 +	spin_unlock_irqrestore (&tp->lock, flags);
  4.2238 +
  4.2239 +	synchronize_irq ();		/* racy, but that's ok here */
  4.2240 +	free_irq (dev->irq, dev);
  4.2241 +
  4.2242 +	rtl8139_tx_clear (tp);
  4.2243 +
  4.2244 +	pci_free_consistent(tp->pci_dev, RX_BUF_TOT_LEN,
  4.2245 +			    tp->rx_ring, tp->rx_ring_dma);
  4.2246 +	pci_free_consistent(tp->pci_dev, TX_BUF_TOT_LEN,
  4.2247 +			    tp->tx_bufs, tp->tx_bufs_dma);
  4.2248 +	tp->rx_ring = NULL;
  4.2249 +	tp->tx_bufs = NULL;
  4.2250 +
  4.2251 +	/* Green! Put the chip in low-power mode. */
  4.2252 +	RTL_W8 (Cfg9346, Cfg9346_Unlock);
  4.2253 +
  4.2254 +	if (rtl_chip_info[tp->chipset].flags & HasHltClk)
  4.2255 +		RTL_W8 (HltClk, 'H');	/* 'R' would leave the clock running. */
  4.2256 +
  4.2257 +	return 0;
  4.2258 +}
  4.2259 +
  4.2260 +
  4.2261 +/* Get the ethtool Wake-on-LAN settings.  Assumes that wol points to
  4.2262 +   kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
  4.2263 +   other threads or interrupts aren't messing with the 8139.  */
  4.2264 +static void netdev_get_wol (struct net_device *dev, struct ethtool_wolinfo *wol)
  4.2265 +{
  4.2266 +	struct rtl8139_private *np = dev->priv;
  4.2267 +	void *ioaddr = np->mmio_addr;
  4.2268 +
  4.2269 +	if (rtl_chip_info[np->chipset].flags & HasLWake) {
  4.2270 +		u8 cfg3 = RTL_R8 (Config3);
  4.2271 +		u8 cfg5 = RTL_R8 (Config5);
  4.2272 +
  4.2273 +		wol->supported = WAKE_PHY | WAKE_MAGIC
  4.2274 +			| WAKE_UCAST | WAKE_MCAST | WAKE_BCAST;
  4.2275 +
  4.2276 +		wol->wolopts = 0;
  4.2277 +		if (cfg3 & Cfg3_LinkUp)
  4.2278 +			wol->wolopts |= WAKE_PHY;
  4.2279 +		if (cfg3 & Cfg3_Magic)
  4.2280 +			wol->wolopts |= WAKE_MAGIC;
  4.2281 +		/* (KON)FIXME: See how netdev_set_wol() handles the
  4.2282 +		   following constants.  */
  4.2283 +		if (cfg5 & Cfg5_UWF)
  4.2284 +			wol->wolopts |= WAKE_UCAST;
  4.2285 +		if (cfg5 & Cfg5_MWF)
  4.2286 +			wol->wolopts |= WAKE_MCAST;
  4.2287 +		if (cfg5 & Cfg5_BWF)
  4.2288 +			wol->wolopts |= WAKE_BCAST;
  4.2289 +	}
  4.2290 +}
  4.2291 +
  4.2292 +
  4.2293 +/* Set the ethtool Wake-on-LAN settings.  Return 0 or -errno.  Assumes
  4.2294 +   that wol points to kernel memory and other threads or interrupts
  4.2295 +   aren't messing with the 8139.  */
  4.2296 +static int netdev_set_wol (struct net_device *dev,
  4.2297 +			   const struct ethtool_wolinfo *wol)
  4.2298 +{
  4.2299 +	struct rtl8139_private *np = dev->priv;
  4.2300 +	void *ioaddr = np->mmio_addr;
  4.2301 +	u32 support;
  4.2302 +	u8 cfg3, cfg5;
  4.2303 +
  4.2304 +	support = ((rtl_chip_info[np->chipset].flags & HasLWake)
  4.2305 +		   ? (WAKE_PHY | WAKE_MAGIC
  4.2306 +		      | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)
  4.2307 +		   : 0);
  4.2308 +	if (wol->wolopts & ~support)
  4.2309 +		return -EINVAL;
  4.2310 +
  4.2311 +	cfg3 = RTL_R8 (Config3) & ~(Cfg3_LinkUp | Cfg3_Magic);
  4.2312 +	if (wol->wolopts & WAKE_PHY)
  4.2313 +		cfg3 |= Cfg3_LinkUp;
  4.2314 +	if (wol->wolopts & WAKE_MAGIC)
  4.2315 +		cfg3 |= Cfg3_Magic;
  4.2316 +	RTL_W8 (Cfg9346, Cfg9346_Unlock);
  4.2317 +	RTL_W8 (Config3, cfg3);
  4.2318 +	RTL_W8 (Cfg9346, Cfg9346_Lock);
  4.2319 +
  4.2320 +	cfg5 = RTL_R8 (Config5) & ~(Cfg5_UWF | Cfg5_MWF | Cfg5_BWF);
  4.2321 +	/* (KON)FIXME: These are untested.  We may have to set the
  4.2322 +	   CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
  4.2323 +	   documentation.  */
  4.2324 +	if (wol->wolopts & WAKE_UCAST)
  4.2325 +		cfg5 |= Cfg5_UWF;
  4.2326 +	if (wol->wolopts & WAKE_MCAST)
  4.2327 +		cfg5 |= Cfg5_MWF;
  4.2328 +	if (wol->wolopts & WAKE_BCAST)
  4.2329 +		cfg5 |= Cfg5_BWF;
  4.2330 +	RTL_W8 (Config5, cfg5);	/* need not unlock via Cfg9346 */
  4.2331 +
  4.2332 +	return 0;
  4.2333 +}
  4.2334 +
  4.2335 +#ifndef XEN
  4.2336 +static int netdev_ethtool_ioctl (struct net_device *dev, void *useraddr)
  4.2337 +{
  4.2338 +	struct rtl8139_private *np = dev->priv;
  4.2339 +	u32 ethcmd;
  4.2340 +
  4.2341 +	/* dev_ioctl() in ../../net/core/dev.c has already checked
  4.2342 +	   capable(CAP_NET_ADMIN), so don't bother with that here.  */
  4.2343 +
  4.2344 +	if (get_user(ethcmd, (u32 *)useraddr))
  4.2345 +		return -EFAULT;
  4.2346 +
  4.2347 +	switch (ethcmd) {
  4.2348 +
  4.2349 +	case ETHTOOL_GDRVINFO: {
  4.2350 +		struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
  4.2351 +		strcpy (info.driver, DRV_NAME);
  4.2352 +		strcpy (info.version, DRV_VERSION);
  4.2353 +		strcpy (info.bus_info, np->pci_dev->slot_name);
  4.2354 +		info.regdump_len = np->regs_len;
  4.2355 +		if (copy_to_user (useraddr, &info, sizeof (info)))
  4.2356 +			return -EFAULT;
  4.2357 +		return 0;
  4.2358 +	}
  4.2359 +
  4.2360 +	/* get settings */
  4.2361 +	case ETHTOOL_GSET: {
  4.2362 +		struct ethtool_cmd ecmd = { ETHTOOL_GSET };
  4.2363 +		spin_lock_irq(&np->lock);
  4.2364 +		mii_ethtool_gset(&np->mii, &ecmd);
  4.2365 +		spin_unlock_irq(&np->lock);
  4.2366 +		if (copy_to_user(useraddr, &ecmd, sizeof(ecmd)))
  4.2367 +			return -EFAULT;
  4.2368 +		return 0;
  4.2369 +	}
  4.2370 +	/* set settings */
  4.2371 +	case ETHTOOL_SSET: {
  4.2372 +		int r;
  4.2373 +		struct ethtool_cmd ecmd;
  4.2374 +		if (copy_from_user(&ecmd, useraddr, sizeof(ecmd)))
  4.2375 +			return -EFAULT;
  4.2376 +		spin_lock_irq(&np->lock);
  4.2377 +		r = mii_ethtool_sset(&np->mii, &ecmd);
  4.2378 +		spin_unlock_irq(&np->lock);
  4.2379 +		return r;
  4.2380 +	}
  4.2381 +	/* restart autonegotiation */
  4.2382 +	case ETHTOOL_NWAY_RST: {
  4.2383 +		return mii_nway_restart(&np->mii);
  4.2384 +	}
  4.2385 +	/* get link status */
  4.2386 +	case ETHTOOL_GLINK: {
  4.2387 +		struct ethtool_value edata = {ETHTOOL_GLINK};
  4.2388 +		edata.data = mii_link_ok(&np->mii);
  4.2389 +		if (copy_to_user(useraddr, &edata, sizeof(edata)))
  4.2390 +			return -EFAULT;
  4.2391 +		return 0;
  4.2392 +	}
  4.2393 +
  4.2394 +	/* get message-level */
  4.2395 +	case ETHTOOL_GMSGLVL: {
  4.2396 +		struct ethtool_value edata = {ETHTOOL_GMSGLVL};
  4.2397 +		edata.data = debug;
  4.2398 +		if (copy_to_user(useraddr, &edata, sizeof(edata)))
  4.2399 +			return -EFAULT;
  4.2400 +		return 0;
  4.2401 +	}
  4.2402 +	/* set message-level */
  4.2403 +	case ETHTOOL_SMSGLVL: {
  4.2404 +		struct ethtool_value edata;
  4.2405 +		if (copy_from_user(&edata, useraddr, sizeof(edata)))
  4.2406 +			return -EFAULT;
  4.2407 +		debug = edata.data;
  4.2408 +		return 0;
  4.2409 +	}
  4.2410 +
  4.2411 +	case ETHTOOL_GWOL:
  4.2412 +		{
  4.2413 +			struct ethtool_wolinfo wol = { ETHTOOL_GWOL };
  4.2414 +			spin_lock_irq (&np->lock);
  4.2415 +			netdev_get_wol (dev, &wol);
  4.2416 +			spin_unlock_irq (&np->lock);
  4.2417 +			if (copy_to_user (useraddr, &wol, sizeof (wol)))
  4.2418 +				return -EFAULT;
  4.2419 +			return 0;
  4.2420 +		}
  4.2421 +
  4.2422 +	case ETHTOOL_SWOL:
  4.2423 +		{
  4.2424 +			struct ethtool_wolinfo wol;
  4.2425 +			int rc;
  4.2426 +			if (copy_from_user (&wol, useraddr, sizeof (wol)))
  4.2427 +				return -EFAULT;
  4.2428 +			spin_lock_irq (&np->lock);
  4.2429 +			rc = netdev_set_wol (dev, &wol);
  4.2430 +			spin_unlock_irq (&np->lock);
  4.2431 +			return rc;
  4.2432 +		}
  4.2433 +
  4.2434 +/* TODO: we are too slack to do reg dumping for pio, for now */
  4.2435 +#ifndef CONFIG_8139TOO_PIO
  4.2436 +	/* NIC register dump */
  4.2437 +	case ETHTOOL_GREGS: {
  4.2438 +                struct ethtool_regs regs;
  4.2439 +		unsigned int regs_len = np->regs_len;
  4.2440 +                u8 *regbuf = kmalloc(regs_len, GFP_KERNEL);
  4.2441 +                int rc;
  4.2442 +
  4.2443 +		if (!regbuf)
  4.2444 +			return -ENOMEM;
  4.2445 +		memset(regbuf, 0, regs_len);
  4.2446 +
  4.2447 +                rc = copy_from_user(&regs, useraddr, sizeof(regs));
  4.2448 +		if (rc) {
  4.2449 +			rc = -EFAULT;
  4.2450 +			goto err_out_gregs;
  4.2451 +		}
  4.2452 +                
  4.2453 +                if (regs.len > regs_len)
  4.2454 +                        regs.len = regs_len;
  4.2455 +                if (regs.len < regs_len) {
  4.2456 +			rc = -EINVAL;
  4.2457 +			goto err_out_gregs;
  4.2458 +		}
  4.2459 +
  4.2460 +                regs.version = RTL_REGS_VER;
  4.2461 +                rc = copy_to_user(useraddr, &regs, sizeof(regs));
  4.2462 +		if (rc) {
  4.2463 +			rc = -EFAULT;
  4.2464 +			goto err_out_gregs;
  4.2465 +		}
  4.2466 +
  4.2467 +                useraddr += offsetof(struct ethtool_regs, data);
  4.2468 +
  4.2469 +                spin_lock_irq(&np->lock);
  4.2470 +                memcpy_fromio(regbuf, np->mmio_addr, regs_len);
  4.2471 +                spin_unlock_irq(&np->lock);
  4.2472 +
  4.2473 +                if (copy_to_user(useraddr, regbuf, regs_len))
  4.2474 +                        rc = -EFAULT;
  4.2475 +
  4.2476 +err_out_gregs:
  4.2477 +		kfree(regbuf);
  4.2478 +		return rc;
  4.2479 +	}
  4.2480 +#endif /* CONFIG_8139TOO_PIO */
  4.2481 +
  4.2482 +	/* get string list(s) */
  4.2483 +	case ETHTOOL_GSTRINGS: {
  4.2484 +		struct ethtool_gstrings estr = { ETHTOOL_GSTRINGS };
  4.2485 +
  4.2486 +		if (copy_from_user(&estr, useraddr, sizeof(estr)))
  4.2487 +			return -EFAULT;
  4.2488 +		if (estr.string_set != ETH_SS_STATS)
  4.2489 +			return -EINVAL;
  4.2490 +
  4.2491 +		estr.len = RTL_NUM_STATS;
  4.2492 +		if (copy_to_user(useraddr, &estr, sizeof(estr)))
  4.2493 +			return -EFAULT;
  4.2494 +		if (copy_to_user(useraddr + sizeof(estr),
  4.2495 +				 &ethtool_stats_keys,
  4.2496 +				 sizeof(ethtool_stats_keys)))
  4.2497 +			return -EFAULT;
  4.2498 +		return 0;
  4.2499 +	}
  4.2500 +
  4.2501 +	/* get NIC-specific statistics */
  4.2502 +	case ETHTOOL_GSTATS: {
  4.2503 +		struct ethtool_stats estats = { ETHTOOL_GSTATS };
  4.2504 +		u64 *tmp_stats;
  4.2505 +		const unsigned int sz = sizeof(u64) * RTL_NUM_STATS;
  4.2506 +		int i;
  4.2507 +
  4.2508 +		estats.n_stats = RTL_NUM_STATS;
  4.2509 +		if (copy_to_user(useraddr, &estats, sizeof(estats)))
  4.2510 +			return -EFAULT;
  4.2511 +
  4.2512 +		tmp_stats = kmalloc(sz, GFP_KERNEL);
  4.2513 +		if (!tmp_stats)
  4.2514 +			return -ENOMEM;
  4.2515 +		memset(tmp_stats, 0, sz);
  4.2516 +
  4.2517 +		i = 0;
  4.2518 +		tmp_stats[i++] = np->xstats.early_rx;
  4.2519 +		tmp_stats[i++] = np->xstats.tx_buf_mapped;
  4.2520 +		tmp_stats[i++] = np->xstats.tx_timeouts;
  4.2521 +		tmp_stats[i++] = np->xstats.rx_lost_in_ring;
  4.2522 +		if (i != RTL_NUM_STATS)
  4.2523 +			BUG();
  4.2524 +
  4.2525 +		i = copy_to_user(useraddr + sizeof(estats), tmp_stats, sz);
  4.2526 +		kfree(tmp_stats);
  4.2527 +
  4.2528 +		if (i)
  4.2529 +			return -EFAULT;
  4.2530 +		return 0;
  4.2531 +	}
  4.2532 +	default:
  4.2533 +		break;
  4.2534 +	}
  4.2535 +
  4.2536 +	return -EOPNOTSUPP;
  4.2537 +}
  4.2538 +#endif
  4.2539 +
  4.2540 +static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  4.2541 +{
  4.2542 +#ifdef XEN
  4.2543 +    DPRINTK("> cmd=%d\n", cmd);
  4.2544 +    return 0; //-ENOSYS;
  4.2545 +#else
  4.2546 +	struct rtl8139_private *np = dev->priv;
  4.2547 +	struct mii_ioctl_data *data = (struct mii_ioctl_data *) & rq->ifr_data;
  4.2548 +	int rc;
  4.2549 +
  4.2550 +	if (!netif_running(dev))
  4.2551 +		return -EINVAL;
  4.2552 +
  4.2553 +	if (cmd == SIOCETHTOOL)
  4.2554 +		rc = netdev_ethtool_ioctl(dev, (void *) rq->ifr_data);
  4.2555 +
  4.2556 +	else {
  4.2557 +		spin_lock_irq(&np->lock);
  4.2558 +		rc = generic_mii_ioctl(&np->mii, data, cmd, NULL);
  4.2559 +		spin_unlock_irq(&np->lock);
  4.2560 +	}
  4.2561 +
  4.2562 +	return rc;
  4.2563 +#endif
  4.2564 +}
  4.2565 +
  4.2566 +
  4.2567 +static struct net_device_stats *rtl8139_get_stats (struct net_device *dev)
  4.2568 +{
  4.2569 +	struct rtl8139_private *tp = dev->priv;
  4.2570 +	void *ioaddr = tp->mmio_addr;
  4.2571 +	unsigned long flags;
  4.2572 +
  4.2573 +#ifdef XEN
  4.2574 +        DPRINTK("\n");
  4.2575 +#endif
  4.2576 +	if (netif_running(dev)) {
  4.2577 +		spin_lock_irqsave (&tp->lock, flags);
  4.2578 +		tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
  4.2579 +		RTL_W32 (RxMissed, 0);
  4.2580 +		spin_unlock_irqrestore (&tp->lock, flags);
  4.2581 +	}
  4.2582 +
  4.2583 +	return &tp->stats;
  4.2584 +}
  4.2585 +
  4.2586 +/* Set or clear the multicast filter for this adaptor.
  4.2587 +   This routine is not state sensitive and need not be SMP locked. */
  4.2588 +
  4.2589 +static void __set_rx_mode (struct net_device *dev)
  4.2590 +{
  4.2591 +	struct rtl8139_private *tp = dev->priv;
  4.2592 +	void *ioaddr = tp->mmio_addr;
  4.2593 +	u32 mc_filter[2];	/* Multicast hash filter */
  4.2594 +	int i, rx_mode;
  4.2595 +	u32 tmp;
  4.2596 +
  4.2597 +	DPRINTK ("%s:   rtl8139_set_rx_mode(%4.4x) done -- Rx config %8.8lx.\n",
  4.2598 +			dev->name, dev->flags, RTL_R32 (RxConfig));
  4.2599 +
  4.2600 +	/* Note: do not reorder, GCC is clever about common statements. */
  4.2601 +	if (dev->flags & IFF_PROMISC) {
  4.2602 +		/* Unconditionally log net taps. */
  4.2603 +		printk (KERN_NOTICE "%s: Promiscuous mode enabled.\n",
  4.2604 +			dev->name);
  4.2605 +		rx_mode =
  4.2606 +		    AcceptBroadcast | AcceptMulticast | AcceptMyPhys |
  4.2607 +		    AcceptAllPhys;
  4.2608 +		mc_filter[1] = mc_filter[0] = 0xffffffff;
  4.2609 +	} else if ((dev->mc_count > multicast_filter_limit)
  4.2610 +		   || (dev->flags & IFF_ALLMULTI)) {
  4.2611 +		/* Too many to filter perfectly -- accept all multicasts. */
  4.2612 +		rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
  4.2613 +		mc_filter[1] = mc_filter[0] = 0xffffffff;
  4.2614 +	} else {
  4.2615 +		struct dev_mc_list *mclist;
  4.2616 +		rx_mode = AcceptBroadcast | AcceptMyPhys;
  4.2617 +		mc_filter[1] = mc_filter[0] = 0;
  4.2618 +		for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
  4.2619 +		     i++, mclist = mclist->next) {
  4.2620 +			int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
  4.2621 +
  4.2622 +			mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
  4.2623 +			rx_mode |= AcceptMulticast;
  4.2624 +		}
  4.2625 +	}
  4.2626 +
  4.2627 +	/* We can safely update without stopping the chip. */
  4.2628 +	tmp = rtl8139_rx_config | rx_mode;
  4.2629 +	if (tp->rx_config != tmp) {
  4.2630 +		RTL_W32_F (RxConfig, tmp);
  4.2631 +		tp->rx_config = tmp;
  4.2632 +	}
  4.2633 +	RTL_W32_F (MAR0 + 0, mc_filter[0]);
  4.2634 +	RTL_W32_F (MAR0 + 4, mc_filter[1]);
  4.2635 +}
  4.2636 +
  4.2637 +static void rtl8139_set_rx_mode (struct net_device *dev)
  4.2638 +{
  4.2639 +	unsigned long flags;
  4.2640 +	struct rtl8139_private *tp = dev->priv;
  4.2641 +
  4.2642 +	spin_lock_irqsave (&tp->lock, flags);
  4.2643 +	__set_rx_mode(dev);
  4.2644 +	spin_unlock_irqrestore (&tp->lock, flags);
  4.2645 +}
  4.2646 +
  4.2647 +#ifdef CONFIG_PM
  4.2648 +
  4.2649 +static int rtl8139_suspend (struct pci_dev *pdev, u32 state)
  4.2650 +{
  4.2651 +	struct net_device *dev = pci_get_drvdata (pdev);
  4.2652 +	struct rtl8139_private *tp = dev->priv;
  4.2653 +	void *ioaddr = tp->mmio_addr;
  4.2654 +	unsigned long flags;
  4.2655 +
  4.2656 +	if (!netif_running (dev))
  4.2657 +		return 0;
  4.2658 +
  4.2659 +	netif_device_detach (dev);
  4.2660 +
  4.2661 +	spin_lock_irqsave (&tp->lock, flags);
  4.2662 +
  4.2663 +	/* Disable interrupts, stop Tx and Rx. */
  4.2664 +	RTL_W16 (IntrMask, 0);
  4.2665 +	RTL_W8 (ChipCmd, 0);
  4.2666 +
  4.2667 +	/* Update the error counts. */
  4.2668 +	tp->stats.rx_missed_errors += RTL_R32 (RxMissed);
  4.2669 +	RTL_W32 (RxMissed, 0);
  4.2670 +
  4.2671 +	spin_unlock_irqrestore (&tp->lock, flags);
  4.2672 +	return 0;
  4.2673 +}
  4.2674 +
  4.2675 +
  4.2676 +static int rtl8139_resume (struct pci_dev *pdev)
  4.2677 +{
  4.2678 +	struct net_device *dev = pci_get_drvdata (pdev);
  4.2679 +
  4.2680 +	if (!netif_running (dev))
  4.2681 +		return 0;
  4.2682 +	netif_device_attach (dev);
  4.2683 +	rtl8139_hw_start (dev);
  4.2684 +	return 0;
  4.2685 +}
  4.2686 +
  4.2687 +#endif /* CONFIG_PM */
  4.2688 +
  4.2689 +
  4.2690 +static struct pci_driver rtl8139_pci_driver = {
  4.2691 +	.name		= DRV_NAME,
  4.2692 +	.id_table	= rtl8139_pci_tbl,
  4.2693 +	.probe		= rtl8139_init_one,
  4.2694 +	.remove		= __devexit_p(rtl8139_remove_one),
  4.2695 +#ifdef CONFIG_PM
  4.2696 +	.suspend	= rtl8139_suspend,
  4.2697 +	.resume		= rtl8139_resume,
  4.2698 +#endif /* CONFIG_PM */
  4.2699 +};
  4.2700 +
  4.2701 +
  4.2702 +static int __init rtl8139_init_module (void)
  4.2703 +{
  4.2704 +	/* when we're a module, we always print a version message,
  4.2705 +	 * even if no 8139 board is found.
  4.2706 +	 */
  4.2707 +#if defined(MODULE) || defined(XEN)
  4.2708 +	printk (KERN_INFO RTL8139_DRIVER_NAME "\n");
  4.2709 +#endif
  4.2710 +
  4.2711 +	return pci_module_init (&rtl8139_pci_driver);
  4.2712 +}
  4.2713 +
  4.2714 +
  4.2715 +static void __exit rtl8139_cleanup_module (void)
  4.2716 +{
  4.2717 +	pci_unregister_driver (&rtl8139_pci_driver);
  4.2718 +}
  4.2719 +
  4.2720 +
  4.2721 +module_init(rtl8139_init_module);
  4.2722 +module_exit(rtl8139_cleanup_module);