ia64/xen-unstable

changeset 10906:f5b9b8439012

[VMXASSIST] Fix GDTR accesses when paging mode enabled.

The gdtr information in oldctx is an address for guest, not for
vmxassist. When access descriptor on guest gdt, we need to go through
guest page table if guest enable paging. This error may happen if
guest enable PE/PG in one instruction.

Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>=20
Signed-off-by: Xin Li <xin.b.li@intel.com>
author kfraser@localhost.localdomain
date Wed Aug 02 10:03:04 2006 +0100 (2006-08-02)
parents 3aad3abca993
children 637b6d60e792
files tools/firmware/vmxassist/vm86.c
line diff
     1.1 --- a/tools/firmware/vmxassist/vm86.c	Wed Aug 02 09:58:06 2006 +0100
     1.2 +++ b/tools/firmware/vmxassist/vm86.c	Wed Aug 02 10:03:04 2006 +0100
     1.3 @@ -52,6 +52,31 @@ char *states[] = {
     1.4  static char *rnames[] = { "ax", "cx", "dx", "bx", "sp", "bp", "si", "di" };
     1.5  #endif /* DEBUG */
     1.6  
     1.7 +#define PT_ENTRY_PRESENT 0x1
     1.8 +
     1.9 +static unsigned
    1.10 +guest_linear_to_real(unsigned long base, unsigned off)
    1.11 +{
    1.12 +	unsigned int gcr3 = oldctx.cr3;
    1.13 +	unsigned int l1_mfn;
    1.14 +	unsigned int l0_mfn;
    1.15 +
    1.16 +	if (!(oldctx.cr0 & CR0_PG))
    1.17 +		return base + off;
    1.18 +
    1.19 +	l1_mfn = ((unsigned int *)gcr3)[(base >> 22) & 0x3ff ];
    1.20 +	if (!(l1_mfn & PT_ENTRY_PRESENT))
    1.21 +		panic("l2 entry not present\n");
    1.22 +	l1_mfn = l1_mfn & 0xfffff000 ;
    1.23 +
    1.24 +	l0_mfn = ((unsigned int *)l1_mfn)[(base >> 12) & 0x3ff];
    1.25 +	if (!(l0_mfn & PT_ENTRY_PRESENT))
    1.26 +		panic("l1 entry not present\n");
    1.27 +	l0_mfn = l0_mfn & 0xfffff000;
    1.28 +
    1.29 +	return l0_mfn + off + (base & 0xfff);
    1.30 +}
    1.31 +
    1.32  static unsigned
    1.33  address(struct regs *regs, unsigned seg, unsigned off)
    1.34  {
    1.35 @@ -70,7 +95,7 @@ address(struct regs *regs, unsigned seg,
    1.36  	    (mode == VM86_REAL_TO_PROTECTED && regs->cs == seg))
    1.37  		return ((seg & 0xFFFF) << 4) + off;
    1.38  
    1.39 -	entry = ((unsigned long long *) oldctx.gdtr_base)[seg >> 3];
    1.40 +	entry = ((unsigned long long *) guest_linear_to_real(oldctx.gdtr_base, 0))[seg >> 3];
    1.41  	entry_high = entry >> 32;
    1.42  	entry_low = entry & 0xFFFFFFFF;
    1.43  
    1.44 @@ -94,7 +119,7 @@ void
    1.45  trace(struct regs *regs, int adjust, char *fmt, ...)
    1.46  {
    1.47  	unsigned off = regs->eip - adjust;
    1.48 -        va_list ap;
    1.49 +	va_list ap;
    1.50  
    1.51  	if ((traceset & (1 << mode)) &&
    1.52  	   (mode == VM86_REAL_TO_PROTECTED || mode == VM86_REAL)) {
    1.53 @@ -755,7 +780,7 @@ load_seg(unsigned long sel, uint32_t *ba
    1.54  		return 1;
    1.55  	}
    1.56  
    1.57 -	entry =  ((unsigned long long *) oldctx.gdtr_base)[sel >> 3];
    1.58 +	entry = ((unsigned long long *) guest_linear_to_real(oldctx.gdtr_base, 0))[sel >> 3];
    1.59  
    1.60  	/* Check the P bit first */
    1.61  	if (!((entry >> (15+32)) & 0x1) && sel != 0)