ia64/xen-unstable

changeset 5157:f1ac5983d4d8

bitkeeper revision 1.1555 (4294b5f0B3iu-SnB9loIMnLXO0loTA)

Ported genapic to Xen: support for bigsmp and numa platforms such as
es7000.
Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Wed May 25 17:29:20 2005 +0000 (2005-05-25)
parents ce83bd80b6bd
children 519428a32f8d
files .rootkeys xen/arch/x86/Makefile xen/arch/x86/Rules.mk xen/arch/x86/apic.c xen/arch/x86/dmi_scan.c xen/arch/x86/genapic/bigsmp.c xen/arch/x86/genapic/default.c xen/arch/x86/genapic/es7000.c xen/arch/x86/genapic/es7000.h xen/arch/x86/genapic/es7000plat.c xen/arch/x86/genapic/probe.c xen/arch/x86/genapic/summit.c xen/arch/x86/mpparse.c xen/arch/x86/mtrr/generic.c xen/arch/x86/setup.c xen/arch/x86/smp.c xen/arch/x86/smpboot.c xen/common/kernel.c xen/include/asm-x86/apic.h xen/include/asm-x86/fixmap.h xen/include/asm-x86/genapic.h xen/include/asm-x86/mach-bigsmp/mach_apic.h xen/include/asm-x86/mach-bigsmp/mach_apicdef.h xen/include/asm-x86/mach-bigsmp/mach_ipi.h xen/include/asm-x86/mach-default/apm.h xen/include/asm-x86/mach-default/do_timer.h xen/include/asm-x86/mach-default/entry_arch.h xen/include/asm-x86/mach-default/irq_vectors_limits.h xen/include/asm-x86/mach-default/mach_mpspec.h xen/include/asm-x86/mach-default/mach_reboot.h xen/include/asm-x86/mach-default/mach_time.h xen/include/asm-x86/mach-default/mach_timer.h xen/include/asm-x86/mach-default/mach_traps.h xen/include/asm-x86/mach-default/pci-functions.h xen/include/asm-x86/mach-default/setup_arch_post.h xen/include/asm-x86/mach-default/setup_arch_pre.h xen/include/asm-x86/mach-es7000/mach_apic.h xen/include/asm-x86/mach-es7000/mach_apicdef.h xen/include/asm-x86/mach-es7000/mach_ipi.h xen/include/asm-x86/mach-es7000/mach_mpparse.h xen/include/asm-x86/mach-es7000/mach_wakecpu.h xen/include/asm-x86/mach-generic/mach_apic.h xen/include/asm-x86/mach-generic/mach_apicdef.h xen/include/asm-x86/mach-generic/mach_ipi.h xen/include/asm-x86/mach-generic/mach_mpparse.h xen/include/asm-x86/mach-generic/mach_mpspec.h xen/include/asm-x86/mach-summit/mach_apic.h xen/include/asm-x86/mach-summit/mach_apicdef.h xen/include/asm-x86/mach-summit/mach_ipi.h xen/include/asm-x86/mach-summit/mach_mpparse.h xen/include/asm-x86/page.h xen/include/asm-x86/shadow.h xen/include/asm-x86/system.h xen/include/xen/dmi.h
line diff
     1.1 --- a/.rootkeys	Wed May 25 17:19:19 2005 +0000
     1.2 +++ b/.rootkeys	Wed May 25 17:29:20 2005 +0000
     1.3 @@ -1131,12 +1131,20 @@ 3ddb79bcSC_LvnmFlX-T5iTgaR0SKg xen/arch/
     1.4  40e42bdbNu4MjI750THP_8J1S-Sa0g xen/arch/x86/boot/x86_64.S
     1.5  4107c15e-VmEcLsE-7JCXZaabI8C7A xen/arch/x86/cdb.c
     1.6  3ddb79bcUrk2EIaM5VsT6wUudH1kkg xen/arch/x86/delay.c
     1.7 +4294b5ee34eGSh5YNDKMSxBIOycluw xen/arch/x86/dmi_scan.c
     1.8  40e34414WiQO4h2m3tcpaCPn7SyYyg xen/arch/x86/dom0_ops.c
     1.9  3ddb79bc1_2bAt67x9MFCP4AZrQnvQ xen/arch/x86/domain.c
    1.10  4202391dkvdTZ8GhWXe3Gqf9EOgWXg xen/arch/x86/domain_build.c
    1.11  41d3eaae6GSDo3ZJDfK3nvQsJux-PQ xen/arch/x86/e820.c
    1.12  3ddb79bcY5zW7KhvI9gvfuPi3ZumEg xen/arch/x86/extable.c
    1.13  3fe443fdDDb0Sw6NQBCk4GQapayfTA xen/arch/x86/flushtlb.c
    1.14 +4294b5ee0qd8iX0Z4a6XpmbS-7r9CQ xen/arch/x86/genapic/bigsmp.c
    1.15 +4294b5eeRyEW29Ue9ykTGCgG4PD2OQ xen/arch/x86/genapic/default.c
    1.16 +4294b5eeGvaKRkeAfnvIbNqPn__sLA xen/arch/x86/genapic/es7000.c
    1.17 +4294b5eezzXwm3k_PG72kjEidxESjA xen/arch/x86/genapic/es7000.h
    1.18 +4294b5eeUsoC73al4Bsg2E1NKy0oYQ xen/arch/x86/genapic/es7000plat.c
    1.19 +4294b5ee8T56zBzx90toTSftqiKoVA xen/arch/x86/genapic/probe.c
    1.20 +4294b5ee2PhCf6SsLxck58bGLR8hYA xen/arch/x86/genapic/summit.c
    1.21  3ddb79bcesE5E-lS4QhRhlqXxqj9cA xen/arch/x86/i387.c
    1.22  3ddb79bcCAq6IpdkHueChoVTfXqEQQ xen/arch/x86/i8259.c
    1.23  3ddb79bcBit4xJXbwtX0kb1hh2uO1Q xen/arch/x86/idle0_task.c
    1.24 @@ -1289,6 +1297,7 @@ 41febc4bBKTKHhnAu_KPYwgNkHjFlg xen/inclu
    1.25  41d3eaaeIBzW621S1oa0c2yk7X43qQ xen/include/asm-x86/e820.h
    1.26  3ddb79c3NU8Zy40OTrq3D-i30Y3t4A xen/include/asm-x86/fixmap.h
    1.27  3e2d29944GI24gf7vOP_7x8EyuqxeA xen/include/asm-x86/flushtlb.h
    1.28 +4294b5eep4lWuDtYUR74gYwt-_FnHA xen/include/asm-x86/genapic.h
    1.29  3ddb79c39o75zPP0T1aQQ4mNrCAN2w xen/include/asm-x86/hardirq.h
    1.30  3ddb79c3TMDjkxVndKFKnGiwY0HzDg xen/include/asm-x86/i387.h
    1.31  4204e7acwXDo-5iAAiO2eQbtDeYZXA xen/include/asm-x86/init.h
    1.32 @@ -1296,10 +1305,10 @@ 3ddb79c3fQ_O3o5NHK2N8AJdk0Ea4Q xen/inclu
    1.33  3ddb79c2TKeScYHQZreTdHqYNLbehQ xen/include/asm-x86/io_apic.h
    1.34  3ddb79c2L7rTlFzazOLW1XuSZefpFw xen/include/asm-x86/irq.h
    1.35  404f1b93OjLO4bFfBXYNaJdIqlNz-Q xen/include/asm-x86/ldt.h
    1.36 -427fa2d0m8MOSSXT13zgb-q0fGA_Dw xen/include/asm-x86/mach-default/apm.h
    1.37 +4294b5eeeAE-U0umBauOpcfs9bOixw xen/include/asm-x86/mach-bigsmp/mach_apic.h
    1.38 +4294b5ee5qY2lHkA2hcNVFnZkHBVQw xen/include/asm-x86/mach-bigsmp/mach_apicdef.h
    1.39 +4294b5eeq6ore4EePanoutorWtvS1w xen/include/asm-x86/mach-bigsmp/mach_ipi.h
    1.40  427fa2d0suK9Av7vsAXhsQxZjqpc_Q xen/include/asm-x86/mach-default/bios_ebda.h
    1.41 -427fa2d0yC3KzLozoeK3Xa3uGVfIdw xen/include/asm-x86/mach-default/do_timer.h
    1.42 -427fa2d0bWQkR1mW5OBYxn07AN-bDw xen/include/asm-x86/mach-default/entry_arch.h
    1.43  427fa2d0-SWcuwbdSypo4953bc2JdQ xen/include/asm-x86/mach-default/io_ports.h
    1.44  427fa2d0eyAl7LAeO-SVV4IW7lZPGQ xen/include/asm-x86/mach-default/irq_vectors.h
    1.45  427fa2d0df7VWG4KKpnKbKR2Cbd1_w xen/include/asm-x86/mach-default/irq_vectors_limits.h
    1.46 @@ -1307,16 +1316,22 @@ 4260510aYPj2kr6rMbBfMxcvvmXndQ xen/inclu
    1.47  427fa2d0I3FWjE2tWdOhlEOJn7stcg xen/include/asm-x86/mach-default/mach_apicdef.h
    1.48  427fa2d093fDS2gOBLcl7Yndzl7HmA xen/include/asm-x86/mach-default/mach_ipi.h
    1.49  427fa2d0Y7bD35d-FvDAeiJDIdRw2A xen/include/asm-x86/mach-default/mach_mpparse.h
    1.50 -427fa2d0aLQgE9e1GY9ZP5jrMOC8pQ xen/include/asm-x86/mach-default/mach_mpspec.h
    1.51 -427fa2d0fJ5nNn5ydJuOaZIL6F2fjQ xen/include/asm-x86/mach-default/mach_reboot.h
    1.52 -427fa2d0VlN555TE68TjKMsrOoFXNA xen/include/asm-x86/mach-default/mach_time.h
    1.53 -427fa2d0C0jWTKYjy7WJjGKeujSpSg xen/include/asm-x86/mach-default/mach_timer.h
    1.54 -427fa2d0UXLiS1scpNrK26ZT6Oes3g xen/include/asm-x86/mach-default/mach_traps.h
    1.55  427fa2d0OfglYyfpDTD5DII4M0uZRw xen/include/asm-x86/mach-default/mach_wakecpu.h
    1.56 -427fa2d0_OBPxdi5Qo04JWgZhz7BFA xen/include/asm-x86/mach-default/pci-functions.h
    1.57 -427fa2d0mrTtXrliqDfLuJc5LLVXaA xen/include/asm-x86/mach-default/setup_arch_post.h
    1.58 -427fa2d0Uoo7gC61Kep6Yy7Os367Hg xen/include/asm-x86/mach-default/setup_arch_pre.h
    1.59  427fa2d1EKnA8zCq2QLHiGOUqOgszg xen/include/asm-x86/mach-default/smpboot_hooks.h
    1.60 +4294b5eeTwL8TeEI5pEzxvGD5obZsA xen/include/asm-x86/mach-es7000/mach_apic.h
    1.61 +4294b5efhhBHJ81dsuLfJxWuN9PcDQ xen/include/asm-x86/mach-es7000/mach_apicdef.h
    1.62 +4294b5efvb29X4mFAhUBdeGUPTFoBw xen/include/asm-x86/mach-es7000/mach_ipi.h
    1.63 +4294b5efLlV3WvmctnQsCPAte4Bf6A xen/include/asm-x86/mach-es7000/mach_mpparse.h
    1.64 +4294b5efC90I55FIDtKg8jyW8FVffA xen/include/asm-x86/mach-es7000/mach_wakecpu.h
    1.65 +4294b5efqI--HHz7d7QVcVOi635jgw xen/include/asm-x86/mach-generic/mach_apic.h
    1.66 +4294b5efHFX7nHDP4ch4NGAPmCsp_w xen/include/asm-x86/mach-generic/mach_apicdef.h
    1.67 +4294b5efaen_warQx_kSN54AgXgBtg xen/include/asm-x86/mach-generic/mach_ipi.h
    1.68 +4294b5efq7CDZzdxl-Rxu2K_6cIePQ xen/include/asm-x86/mach-generic/mach_mpparse.h
    1.69 +4294b5efsEtawAifmsBZAjFagr8Z6Q xen/include/asm-x86/mach-generic/mach_mpspec.h
    1.70 +4294b5efz5xMcRrYJfcH-wTylihXMA xen/include/asm-x86/mach-summit/mach_apic.h
    1.71 +4294b5efmKbMzT7YOGp4Jn-5xoB3Uw xen/include/asm-x86/mach-summit/mach_apicdef.h
    1.72 +4294b5efyUK3aZFqxp7BVF_GXCx56g xen/include/asm-x86/mach-summit/mach_ipi.h
    1.73 +4294b5efjw2vUbiP4dQX6S6xZvAmZA xen/include/asm-x86/mach-summit/mach_mpparse.h
    1.74  3ddb79c3I98vWcQR8xEo34JMJ4Ahyw xen/include/asm-x86/mc146818rtc.h
    1.75  40ec25fd7cSvbP7Biw91zaU_g0xsEQ xen/include/asm-x86/mm.h
    1.76  3ddb79c3n_UbPuxlkNxvvLycClIkxA xen/include/asm-x86/mpspec.h
    1.77 @@ -1388,6 +1403,7 @@ 3eb165e0eawr3R-p2ZQtSdLWtLRN_A xen/inclu
    1.78  427fa2d1bQCWgEQqTTh5MjG4MPEH9g xen/include/xen/cpumask.h
    1.79  3ddb79c1V44RD26YqCUm-kqIupM37A xen/include/xen/ctype.h
    1.80  3ddb79c05DdHQ0UxX_jKsXdR4QlMCA xen/include/xen/delay.h
    1.81 +4294b5efxcDdUVp4XMEE__IFw7nPow xen/include/xen/dmi.h
    1.82  40f2b4a2hC3HtChu-ArD8LyojxWMjg xen/include/xen/domain.h
    1.83  3ddb79c2O729EttZTYu1c8LcsUO_GQ xen/include/xen/elf.h
    1.84  3ddb79c0HIghfBF8zFUdmXhOU8i6hA xen/include/xen/errno.h
     2.1 --- a/xen/arch/x86/Makefile	Wed May 25 17:19:19 2005 +0000
     2.2 +++ b/xen/arch/x86/Makefile	Wed May 25 17:29:20 2005 +0000
     2.3 @@ -5,6 +5,7 @@ OBJS += $(patsubst %.S,%.o,$(wildcard $(
     2.4  OBJS += $(patsubst %.c,%.o,$(wildcard $(TARGET_SUBARCH)/*.c))
     2.5  OBJS += $(patsubst %.c,%.o,$(wildcard acpi/*.c))
     2.6  OBJS += $(patsubst %.c,%.o,$(wildcard mtrr/*.c))
     2.7 +OBJS += $(patsubst %.c,%.o,$(wildcard genapic/*.c))
     2.8  
     2.9  OBJS := $(subst $(TARGET_SUBARCH)/asm-offsets.o,,$(OBJS))
    2.10  
    2.11 @@ -36,6 +37,7 @@ clean:
    2.12  	rm -f x86_64/*.o x86_64/*~ x86_64/core
    2.13  	rm -f mtrr/*.o mtrr/*~ mtrr/core
    2.14  	rm -f acpi/*.o acpi/*~ acpi/core
    2.15 +	rm -f genapic/*.o genapic/*~ genapic/core
    2.16  
    2.17  delete-unfresh-files:
    2.18  	# nothing
     3.1 --- a/xen/arch/x86/Rules.mk	Wed May 25 17:19:19 2005 +0000
     3.2 +++ b/xen/arch/x86/Rules.mk	Wed May 25 17:29:20 2005 +0000
     3.3 @@ -3,7 +3,9 @@
     3.4  
     3.5  CFLAGS  += -nostdinc -fno-builtin -fno-common -fno-strict-aliasing
     3.6  CFLAGS  += -iwithprefix include -Wall -Werror -Wno-pointer-arith -pipe
     3.7 -CFLAGS  += -I$(BASEDIR)/include -I$(BASEDIR)/include/asm-x86/mach-default
     3.8 +CFLAGS  += -I$(BASEDIR)/include 
     3.9 +CFLAGS  += -I$(BASEDIR)/include/asm-x86/mach-generic
    3.10 +CFLAGS  += -I$(BASEDIR)/include/asm-x86/mach-default
    3.11  
    3.12  ifeq ($(optimize),y)
    3.13  CFLAGS  += -O3 -fomit-frame-pointer
     4.1 --- a/xen/arch/x86/apic.c	Wed May 25 17:19:19 2005 +0000
     4.2 +++ b/xen/arch/x86/apic.c	Wed May 25 17:29:20 2005 +0000
     4.3 @@ -454,9 +454,6 @@ static void __init apic_set_verbosity(ch
     4.4          apic_verbosity = APIC_DEBUG;
     4.5      else if (strcmp("verbose", str) == 0)
     4.6          apic_verbosity = APIC_VERBOSE;
     4.7 -    else
     4.8 -        printk(KERN_WARNING "APIC Verbosity level %s not recognised"
     4.9 -               " use apic=verbose or apic=debug", str);
    4.10  }
    4.11  custom_param("apic", apic_set_verbosity);
    4.12  
     5.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     5.2 +++ b/xen/arch/x86/dmi_scan.c	Wed May 25 17:29:20 2005 +0000
     5.3 @@ -0,0 +1,493 @@
     5.4 +#include <xen/config.h>
     5.5 +#include <xen/types.h>
     5.6 +#include <xen/kernel.h>
     5.7 +#include <xen/string.h>
     5.8 +#include <xen/init.h>
     5.9 +#include <xen/slab.h>
    5.10 +#include <xen/acpi.h>
    5.11 +#include <asm/io.h>
    5.12 +#include <asm/system.h>
    5.13 +#include <xen/dmi.h>
    5.14 +
    5.15 +#define bt_ioremap(b,l)  __acpi_map_table(b,l)
    5.16 +#define bt_iounmap(b,l)  ((void)0)
    5.17 +#define ioremap(b,l)     (__va(b))
    5.18 +#define memcpy_fromio    memcpy
    5.19 +#define alloc_bootmem(l) xmalloc_bytes(l)
    5.20 +
    5.21 +int es7000_plat = 0;
    5.22 +
    5.23 +struct dmi_header
    5.24 +{
    5.25 +	u8	type;
    5.26 +	u8	length;
    5.27 +	u16	handle;
    5.28 +};
    5.29 +
    5.30 +#undef DMI_DEBUG
    5.31 +
    5.32 +#ifdef DMI_DEBUG
    5.33 +#define dmi_printk(x) printk x
    5.34 +#else
    5.35 +#define dmi_printk(x)
    5.36 +#endif
    5.37 +
    5.38 +static char * __init dmi_string(struct dmi_header *dm, u8 s)
    5.39 +{
    5.40 +	u8 *bp=(u8 *)dm;
    5.41 +	bp+=dm->length;
    5.42 +	if(!s)
    5.43 +		return "";
    5.44 +	s--;
    5.45 +	while(s>0 && *bp)
    5.46 +	{
    5.47 +		bp+=strlen(bp);
    5.48 +		bp++;
    5.49 +		s--;
    5.50 +	}
    5.51 +	return bp;
    5.52 +}
    5.53 +
    5.54 +/*
    5.55 + *	We have to be cautious here. We have seen BIOSes with DMI pointers
    5.56 + *	pointing to completely the wrong place for example
    5.57 + */
    5.58 + 
    5.59 +static int __init dmi_table(u32 base, int len, int num, void (*decode)(struct dmi_header *))
    5.60 +{
    5.61 +	u8 *buf;
    5.62 +	struct dmi_header *dm;
    5.63 +	u8 *data;
    5.64 +	int i=0;
    5.65 +		
    5.66 +	buf = bt_ioremap(base, len);
    5.67 +	if(buf==NULL)
    5.68 +		return -1;
    5.69 +
    5.70 +	data = buf;
    5.71 +
    5.72 +	/*
    5.73 + 	 *	Stop when we see all the items the table claimed to have
    5.74 + 	 *	OR we run off the end of the table (also happens)
    5.75 + 	 */
    5.76 + 
    5.77 +	while(i<num && data-buf+sizeof(struct dmi_header)<=len)
    5.78 +	{
    5.79 +		dm=(struct dmi_header *)data;
    5.80 +		/*
    5.81 +		 *  We want to know the total length (formated area and strings)
    5.82 +		 *  before decoding to make sure we won't run off the table in
    5.83 +		 *  dmi_decode or dmi_string
    5.84 +		 */
    5.85 +		data+=dm->length;
    5.86 +		while(data-buf<len-1 && (data[0] || data[1]))
    5.87 +			data++;
    5.88 +		if(data-buf<len-1)
    5.89 +			decode(dm);
    5.90 +		data+=2;
    5.91 +		i++;
    5.92 +	}
    5.93 +	bt_iounmap(buf, len);
    5.94 +	return 0;
    5.95 +}
    5.96 +
    5.97 +
    5.98 +inline static int __init dmi_checksum(u8 *buf)
    5.99 +{
   5.100 +	u8 sum=0;
   5.101 +	int a;
   5.102 +	
   5.103 +	for(a=0; a<15; a++)
   5.104 +		sum+=buf[a];
   5.105 +	return (sum==0);
   5.106 +}
   5.107 +
   5.108 +static int __init dmi_iterate(void (*decode)(struct dmi_header *))
   5.109 +{
   5.110 +	u8 buf[15];
   5.111 +	char __iomem *p, *q;
   5.112 +
   5.113 +	/*
   5.114 +	 * no iounmap() for that ioremap(); it would be a no-op, but it's
   5.115 +	 * so early in setup that sucker gets confused into doing what
   5.116 +	 * it shouldn't if we actually call it.
   5.117 +	 */
   5.118 +	p = ioremap(0xF0000, 0x10000);
   5.119 +	if (p == NULL)
   5.120 +		return -1;
   5.121 +	for (q = p; q < p + 0x10000; q += 16) {
   5.122 +		memcpy_fromio(buf, q, 15);
   5.123 +		if(memcmp(buf, "_DMI_", 5)==0 && dmi_checksum(buf))
   5.124 +		{
   5.125 +			u16 num=buf[13]<<8|buf[12];
   5.126 +			u16 len=buf[7]<<8|buf[6];
   5.127 +			u32 base=buf[11]<<24|buf[10]<<16|buf[9]<<8|buf[8];
   5.128 +
   5.129 +			/*
   5.130 +			 * DMI version 0.0 means that the real version is taken from
   5.131 +			 * the SMBIOS version, which we don't know at this point.
   5.132 +			 */
   5.133 +			if(buf[14]!=0)
   5.134 +				printk(KERN_INFO "DMI %d.%d present.\n",
   5.135 +					buf[14]>>4, buf[14]&0x0F);
   5.136 +			else
   5.137 +				printk(KERN_INFO "DMI present.\n");
   5.138 +			dmi_printk((KERN_INFO "%d structures occupying %d bytes.\n",
   5.139 +				num, len));
   5.140 +			dmi_printk((KERN_INFO "DMI table at 0x%08X.\n",
   5.141 +				base));
   5.142 +			if(dmi_table(base,len, num, decode)==0)
   5.143 +				return 0;
   5.144 +		}
   5.145 +	}
   5.146 +	return -1;
   5.147 +}
   5.148 +
   5.149 +static char *dmi_ident[DMI_STRING_MAX];
   5.150 +
   5.151 +/*
   5.152 + *	Save a DMI string
   5.153 + */
   5.154 + 
   5.155 +static void __init dmi_save_ident(struct dmi_header *dm, int slot, int string)
   5.156 +{
   5.157 +	char *d = (char*)dm;
   5.158 +	char *p = dmi_string(dm, d[string]);
   5.159 +	if(p==NULL || *p == 0)
   5.160 +		return;
   5.161 +	if (dmi_ident[slot])
   5.162 +		return;
   5.163 +	dmi_ident[slot] = alloc_bootmem(strlen(p)+1);
   5.164 +	if(dmi_ident[slot])
   5.165 +		strcpy(dmi_ident[slot], p);
   5.166 +	else
   5.167 +		printk(KERN_ERR "dmi_save_ident: out of memory.\n");
   5.168 +}
   5.169 +
   5.170 +/*
   5.171 + * Ugly compatibility crap.
   5.172 + */
   5.173 +#define dmi_blacklist	dmi_system_id
   5.174 +#define NO_MATCH	{ DMI_NONE, NULL}
   5.175 +#define MATCH		DMI_MATCH
   5.176 +
   5.177 +/*
   5.178 + * Toshiba keyboard likes to repeat keys when they are not repeated.
   5.179 + */
   5.180 +
   5.181 +static __init int broken_toshiba_keyboard(struct dmi_blacklist *d)
   5.182 +{
   5.183 +	printk(KERN_WARNING "Toshiba with broken keyboard detected. If your keyboard sometimes generates 3 keypresses instead of one, see http://davyd.ucc.asn.au/projects/toshiba/README\n");
   5.184 +	return 0;
   5.185 +}
   5.186 +
   5.187 +
   5.188 +#ifdef CONFIG_ACPI_SLEEP
   5.189 +static __init int reset_videomode_after_s3(struct dmi_blacklist *d)
   5.190 +{
   5.191 +	/* See acpi_wakeup.S */
   5.192 +	extern long acpi_video_flags;
   5.193 +	acpi_video_flags |= 2;
   5.194 +	return 0;
   5.195 +}
   5.196 +#endif
   5.197 +
   5.198 +
   5.199 +#ifdef	CONFIG_ACPI_BOOT
   5.200 +extern int acpi_force;
   5.201 +
   5.202 +static __init __attribute__((unused)) int dmi_disable_acpi(struct dmi_blacklist *d) 
   5.203 +{ 
   5.204 +	if (!acpi_force) { 
   5.205 +		printk(KERN_NOTICE "%s detected: acpi off\n",d->ident); 
   5.206 +		disable_acpi();
   5.207 +	} else { 
   5.208 +		printk(KERN_NOTICE 
   5.209 +		       "Warning: DMI blacklist says broken, but acpi forced\n"); 
   5.210 +	}
   5.211 +	return 0;
   5.212 +} 
   5.213 +
   5.214 +/*
   5.215 + * Limit ACPI to CPU enumeration for HT
   5.216 + */
   5.217 +static __init __attribute__((unused)) int force_acpi_ht(struct dmi_blacklist *d) 
   5.218 +{ 
   5.219 +	if (!acpi_force) { 
   5.220 +		printk(KERN_NOTICE "%s detected: force use of acpi=ht\n", d->ident); 
   5.221 +		disable_acpi();
   5.222 +		acpi_ht = 1; 
   5.223 +	} else { 
   5.224 +		printk(KERN_NOTICE 
   5.225 +		       "Warning: acpi=force overrules DMI blacklist: acpi=ht\n"); 
   5.226 +	}
   5.227 +	return 0;
   5.228 +} 
   5.229 +#endif
   5.230 +
   5.231 +#ifdef	CONFIG_ACPI_PCI
   5.232 +static __init int disable_acpi_irq(struct dmi_blacklist *d) 
   5.233 +{
   5.234 +	if (!acpi_force) {
   5.235 +		printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n",
   5.236 +		       d->ident); 	
   5.237 +		acpi_noirq_set();
   5.238 +	}
   5.239 +	return 0;
   5.240 +}
   5.241 +static __init int disable_acpi_pci(struct dmi_blacklist *d) 
   5.242 +{
   5.243 +	if (!acpi_force) {
   5.244 +		printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n",
   5.245 +		       d->ident); 	
   5.246 +		acpi_disable_pci();
   5.247 +	}
   5.248 +	return 0;
   5.249 +}  
   5.250 +#endif
   5.251 +
   5.252 +/*
   5.253 + *	Process the DMI blacklists
   5.254 + */
   5.255 + 
   5.256 +
   5.257 +/*
   5.258 + *	This will be expanded over time to force things like the APM 
   5.259 + *	interrupt mask settings according to the laptop
   5.260 + */
   5.261 + 
   5.262 +static __initdata struct dmi_blacklist dmi_blacklist[]={
   5.263 +
   5.264 +	{ broken_toshiba_keyboard, "Toshiba Satellite 4030cdt", { /* Keyboard generates spurious repeats */
   5.265 +			MATCH(DMI_PRODUCT_NAME, "S4030CDT/4.3"),
   5.266 +			NO_MATCH, NO_MATCH, NO_MATCH
   5.267 +			} },
   5.268 +#ifdef CONFIG_ACPI_SLEEP
   5.269 +	{ reset_videomode_after_s3, "Toshiba Satellite 4030cdt", { /* Reset video mode after returning from ACPI S3 sleep */
   5.270 +			MATCH(DMI_PRODUCT_NAME, "S4030CDT/4.3"),
   5.271 +			NO_MATCH, NO_MATCH, NO_MATCH
   5.272 +			} },
   5.273 +#endif
   5.274 +
   5.275 +#ifdef	CONFIG_ACPI_BOOT
   5.276 +	/*
   5.277 +	 * If your system is blacklisted here, but you find that acpi=force
   5.278 +	 * works for you, please contact acpi-devel@sourceforge.net
   5.279 +	 */
   5.280 +
   5.281 +	/*
   5.282 +	 *	Boxes that need ACPI disabled
   5.283 +	 */
   5.284 +
   5.285 +	{ dmi_disable_acpi, "IBM Thinkpad", {
   5.286 +			MATCH(DMI_BOARD_VENDOR, "IBM"),
   5.287 +			MATCH(DMI_BOARD_NAME, "2629H1G"),
   5.288 +			NO_MATCH, NO_MATCH }},
   5.289 +
   5.290 +	/*
   5.291 +	 *	Boxes that need acpi=ht 
   5.292 +	 */
   5.293 +
   5.294 +	{ force_acpi_ht, "FSC Primergy T850", {
   5.295 +			MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
   5.296 +			MATCH(DMI_PRODUCT_NAME, "PRIMERGY T850"),
   5.297 +			NO_MATCH, NO_MATCH }},
   5.298 +
   5.299 +	{ force_acpi_ht, "DELL GX240", {
   5.300 +			MATCH(DMI_BOARD_VENDOR, "Dell Computer Corporation"),
   5.301 +			MATCH(DMI_BOARD_NAME, "OptiPlex GX240"),
   5.302 +			NO_MATCH, NO_MATCH }},
   5.303 +
   5.304 +	{ force_acpi_ht, "HP VISUALIZE NT Workstation", {
   5.305 +			MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
   5.306 +			MATCH(DMI_PRODUCT_NAME, "HP VISUALIZE NT Workstation"),
   5.307 +			NO_MATCH, NO_MATCH }},
   5.308 +
   5.309 +	{ force_acpi_ht, "Compaq Workstation W8000", {
   5.310 +			MATCH(DMI_SYS_VENDOR, "Compaq"),
   5.311 +			MATCH(DMI_PRODUCT_NAME, "Workstation W8000"),
   5.312 +			NO_MATCH, NO_MATCH }},
   5.313 +
   5.314 +	{ force_acpi_ht, "ASUS P4B266", {
   5.315 +			MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
   5.316 +			MATCH(DMI_BOARD_NAME, "P4B266"),
   5.317 +			NO_MATCH, NO_MATCH }},
   5.318 +
   5.319 +	{ force_acpi_ht, "ASUS P2B-DS", {
   5.320 +			MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
   5.321 +			MATCH(DMI_BOARD_NAME, "P2B-DS"),
   5.322 +			NO_MATCH, NO_MATCH }},
   5.323 +
   5.324 +	{ force_acpi_ht, "ASUS CUR-DLS", {
   5.325 +			MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
   5.326 +			MATCH(DMI_BOARD_NAME, "CUR-DLS"),
   5.327 +			NO_MATCH, NO_MATCH }},
   5.328 +
   5.329 +	{ force_acpi_ht, "ABIT i440BX-W83977", {
   5.330 +			MATCH(DMI_BOARD_VENDOR, "ABIT <http://www.abit.com>"),
   5.331 +			MATCH(DMI_BOARD_NAME, "i440BX-W83977 (BP6)"),
   5.332 +			NO_MATCH, NO_MATCH }},
   5.333 +
   5.334 +	{ force_acpi_ht, "IBM Bladecenter", {
   5.335 +			MATCH(DMI_BOARD_VENDOR, "IBM"),
   5.336 +			MATCH(DMI_BOARD_NAME, "IBM eServer BladeCenter HS20"),
   5.337 +			NO_MATCH, NO_MATCH }},
   5.338 +
   5.339 +	{ force_acpi_ht, "IBM eServer xSeries 360", {
   5.340 +			MATCH(DMI_BOARD_VENDOR, "IBM"),
   5.341 +			MATCH(DMI_BOARD_NAME, "eServer xSeries 360"),
   5.342 +			NO_MATCH, NO_MATCH }},
   5.343 +
   5.344 +	{ force_acpi_ht, "IBM eserver xSeries 330", {
   5.345 +			MATCH(DMI_BOARD_VENDOR, "IBM"),
   5.346 +			MATCH(DMI_BOARD_NAME, "eserver xSeries 330"),
   5.347 +			NO_MATCH, NO_MATCH }},
   5.348 +
   5.349 +	{ force_acpi_ht, "IBM eserver xSeries 440", {
   5.350 +			MATCH(DMI_BOARD_VENDOR, "IBM"),
   5.351 +			MATCH(DMI_PRODUCT_NAME, "eserver xSeries 440"),
   5.352 +			NO_MATCH, NO_MATCH }},
   5.353 +
   5.354 +#endif	// CONFIG_ACPI_BOOT
   5.355 +
   5.356 +#ifdef	CONFIG_ACPI_PCI
   5.357 +	/*
   5.358 +	 *	Boxes that need ACPI PCI IRQ routing disabled
   5.359 +	 */
   5.360 +
   5.361 +	{ disable_acpi_irq, "ASUS A7V", {
   5.362 +			MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"),
   5.363 +			MATCH(DMI_BOARD_NAME, "<A7V>"),
   5.364 +			/* newer BIOS, Revision 1011, does work */
   5.365 +			MATCH(DMI_BIOS_VERSION, "ASUS A7V ACPI BIOS Revision 1007"),
   5.366 +			NO_MATCH }},
   5.367 +
   5.368 +	/*
   5.369 +	 *	Boxes that need ACPI PCI IRQ routing and PCI scan disabled
   5.370 +	 */
   5.371 +	{ disable_acpi_pci, "ASUS PR-DLS", {	/* _BBN 0 bug */
   5.372 +			MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
   5.373 +			MATCH(DMI_BOARD_NAME, "PR-DLS"),
   5.374 +			MATCH(DMI_BIOS_VERSION, "ASUS PR-DLS ACPI BIOS Revision 1010"),
   5.375 +			MATCH(DMI_BIOS_DATE, "03/21/2003") }},
   5.376 +
   5.377 + 	{ disable_acpi_pci, "Acer TravelMate 36x Laptop", {
   5.378 + 			MATCH(DMI_SYS_VENDOR, "Acer"),
   5.379 + 			MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
   5.380 + 			NO_MATCH, NO_MATCH
   5.381 + 			} },
   5.382 +
   5.383 +#endif
   5.384 +
   5.385 +	{ NULL, }
   5.386 +};
   5.387 +
   5.388 +/*
   5.389 + *	Process a DMI table entry. Right now all we care about are the BIOS
   5.390 + *	and machine entries. For 2.5 we should pull the smbus controller info
   5.391 + *	out of here.
   5.392 + */
   5.393 +
   5.394 +static void __init dmi_decode(struct dmi_header *dm)
   5.395 +{
   5.396 +#ifdef DMI_DEBUG
   5.397 +	u8 *data = (u8 *)dm;
   5.398 +#endif
   5.399 +	
   5.400 +	switch(dm->type)
   5.401 +	{
   5.402 +		case  0:
   5.403 +			dmi_printk(("BIOS Vendor: %s\n",
   5.404 +				dmi_string(dm, data[4])));
   5.405 +			dmi_save_ident(dm, DMI_BIOS_VENDOR, 4);
   5.406 +			dmi_printk(("BIOS Version: %s\n", 
   5.407 +				dmi_string(dm, data[5])));
   5.408 +			dmi_save_ident(dm, DMI_BIOS_VERSION, 5);
   5.409 +			dmi_printk(("BIOS Release: %s\n",
   5.410 +				dmi_string(dm, data[8])));
   5.411 +			dmi_save_ident(dm, DMI_BIOS_DATE, 8);
   5.412 +			break;
   5.413 +		case 1:
   5.414 +			dmi_printk(("System Vendor: %s\n",
   5.415 +				dmi_string(dm, data[4])));
   5.416 +			dmi_save_ident(dm, DMI_SYS_VENDOR, 4);
   5.417 +			dmi_printk(("Product Name: %s\n",
   5.418 +				dmi_string(dm, data[5])));
   5.419 +			dmi_save_ident(dm, DMI_PRODUCT_NAME, 5);
   5.420 +			dmi_printk(("Version: %s\n",
   5.421 +				dmi_string(dm, data[6])));
   5.422 +			dmi_save_ident(dm, DMI_PRODUCT_VERSION, 6);
   5.423 +			dmi_printk(("Serial Number: %s\n",
   5.424 +				dmi_string(dm, data[7])));
   5.425 +			break;
   5.426 +		case 2:
   5.427 +			dmi_printk(("Board Vendor: %s\n",
   5.428 +				dmi_string(dm, data[4])));
   5.429 +			dmi_save_ident(dm, DMI_BOARD_VENDOR, 4);
   5.430 +			dmi_printk(("Board Name: %s\n",
   5.431 +				dmi_string(dm, data[5])));
   5.432 +			dmi_save_ident(dm, DMI_BOARD_NAME, 5);
   5.433 +			dmi_printk(("Board Version: %s\n",
   5.434 +				dmi_string(dm, data[6])));
   5.435 +			dmi_save_ident(dm, DMI_BOARD_VERSION, 6);
   5.436 +			break;
   5.437 +	}
   5.438 +}
   5.439 +
   5.440 +void __init dmi_scan_machine(void)
   5.441 +{
   5.442 +	int err = dmi_iterate(dmi_decode);
   5.443 +	if(err == 0)
   5.444 + 		dmi_check_system(dmi_blacklist);
   5.445 +	else
   5.446 +		printk(KERN_INFO "DMI not present.\n");
   5.447 +}
   5.448 +
   5.449 +
   5.450 +/**
   5.451 + *	dmi_check_system - check system DMI data
   5.452 + *	@list: array of dmi_system_id structures to match against
   5.453 + *
   5.454 + *	Walk the blacklist table running matching functions until someone
   5.455 + *	returns non zero or we hit the end. Callback function is called for
   5.456 + *	each successfull match. Returns the number of matches.
   5.457 + */
   5.458 +int dmi_check_system(struct dmi_system_id *list)
   5.459 +{
   5.460 +	int i, count = 0;
   5.461 +	struct dmi_system_id *d = list;
   5.462 +
   5.463 +	while (d->ident) {
   5.464 +		for (i = 0; i < ARRAY_SIZE(d->matches); i++) {
   5.465 +			int s = d->matches[i].slot;
   5.466 +			if (s == DMI_NONE)
   5.467 +				continue;
   5.468 +			if (dmi_ident[s] && strstr(dmi_ident[s], d->matches[i].substr))
   5.469 +				continue;
   5.470 +			/* No match */
   5.471 +			goto fail;
   5.472 +		}
   5.473 +		if (d->callback && d->callback(d))
   5.474 +			break;
   5.475 +		count++;
   5.476 +fail:		d++;
   5.477 +	}
   5.478 +
   5.479 +	return count;
   5.480 +}
   5.481 +
   5.482 +EXPORT_SYMBOL(dmi_check_system);
   5.483 +
   5.484 +/**
   5.485 + *	dmi_get_system_info - return DMI data value
   5.486 + *	@field: data index (see enum dmi_filed)
   5.487 + *
   5.488 + *	Returns one DMI data value, can be used to perform
   5.489 + *	complex DMI data checks.
   5.490 + */
   5.491 +char * dmi_get_system_info(int field)
   5.492 +{
   5.493 +	return dmi_ident[field];
   5.494 +}
   5.495 +
   5.496 +EXPORT_SYMBOL(dmi_get_system_info);
     6.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     6.2 +++ b/xen/arch/x86/genapic/bigsmp.c	Wed May 25 17:29:20 2005 +0000
     6.3 @@ -0,0 +1,51 @@
     6.4 +/* 
     6.5 + * APIC driver for "bigsmp" XAPIC machines with more than 8 virtual CPUs.
     6.6 + * Drives the local APIC in "clustered mode".
     6.7 + */
     6.8 +#define APIC_DEFINITION 1
     6.9 +#include <xen/config.h>
    6.10 +#include <xen/cpumask.h>
    6.11 +#include <asm/mpspec.h>
    6.12 +#include <asm/genapic.h>
    6.13 +#include <asm/fixmap.h>
    6.14 +#include <asm/apicdef.h>
    6.15 +#include <xen/kernel.h>
    6.16 +#include <xen/smp.h>
    6.17 +#include <xen/init.h>
    6.18 +#include <xen/dmi.h>
    6.19 +#include <asm/mach-bigsmp/mach_apic.h>
    6.20 +#include <asm/mach-bigsmp/mach_apicdef.h>
    6.21 +#include <asm/mach-bigsmp/mach_ipi.h>
    6.22 +#include <asm/mach-default/mach_mpparse.h>
    6.23 +
    6.24 +static int dmi_bigsmp; /* can be set by dmi scanners */
    6.25 +
    6.26 +static __init int hp_ht_bigsmp(struct dmi_system_id *d)
    6.27 +{
    6.28 +	printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
    6.29 +	dmi_bigsmp = 1;
    6.30 +	return 0;
    6.31 +}
    6.32 +
    6.33 +
    6.34 +static struct dmi_system_id __initdata bigsmp_dmi_table[] = {
    6.35 +	{ hp_ht_bigsmp, "HP ProLiant DL760 G2", {
    6.36 +		DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
    6.37 +		DMI_MATCH(DMI_BIOS_VERSION, "P44-"),
    6.38 +	}},
    6.39 +
    6.40 +	{ hp_ht_bigsmp, "HP ProLiant DL740", {
    6.41 +		DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
    6.42 +		DMI_MATCH(DMI_BIOS_VERSION, "P47-"),
    6.43 +	 }},
    6.44 +	 { }
    6.45 +};
    6.46 +
    6.47 +
    6.48 +static __init int probe_bigsmp(void)
    6.49 +{ 
    6.50 +	dmi_check_system(bigsmp_dmi_table);
    6.51 +	return dmi_bigsmp; 
    6.52 +} 
    6.53 +
    6.54 +struct genapic apic_bigsmp = APIC_INIT("bigsmp", probe_bigsmp); 
     7.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     7.2 +++ b/xen/arch/x86/genapic/default.c	Wed May 25 17:29:20 2005 +0000
     7.3 @@ -0,0 +1,26 @@
     7.4 +/* 
     7.5 + * Default generic APIC driver. This handles upto 8 CPUs.
     7.6 + */
     7.7 +#define APIC_DEFINITION 1
     7.8 +#include <xen/config.h>
     7.9 +#include <xen/cpumask.h>
    7.10 +#include <asm/mpspec.h>
    7.11 +#include <asm/mach-default/mach_apicdef.h>
    7.12 +#include <asm/genapic.h>
    7.13 +#include <asm/fixmap.h>
    7.14 +#include <asm/apicdef.h>
    7.15 +#include <xen/kernel.h>
    7.16 +#include <xen/string.h>
    7.17 +#include <xen/smp.h>
    7.18 +#include <xen/init.h>
    7.19 +#include <asm/mach-default/mach_apic.h>
    7.20 +#include <asm/mach-default/mach_ipi.h>
    7.21 +#include <asm/mach-default/mach_mpparse.h>
    7.22 +
    7.23 +/* should be called last. */
    7.24 +static __init int probe_default(void)
    7.25 +{ 
    7.26 +	return 1;
    7.27 +} 
    7.28 +
    7.29 +struct genapic apic_default = APIC_INIT("default", probe_default); 
     8.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     8.2 +++ b/xen/arch/x86/genapic/es7000.c	Wed May 25 17:29:20 2005 +0000
     8.3 @@ -0,0 +1,28 @@
     8.4 +/*
     8.5 + * APIC driver for the Unisys ES7000 chipset.
     8.6 + */
     8.7 +#define APIC_DEFINITION 1
     8.8 +#include <xen/config.h>
     8.9 +#include <xen/cpumask.h>
    8.10 +#include <asm/mpspec.h>
    8.11 +#include <asm/genapic.h>
    8.12 +#include <asm/fixmap.h>
    8.13 +#include <asm/apicdef.h>
    8.14 +#include <asm/atomic.h>
    8.15 +#include <xen/kernel.h>
    8.16 +#include <xen/string.h>
    8.17 +#include <xen/smp.h>
    8.18 +#include <xen/init.h>
    8.19 +#include <asm/mach-es7000/mach_apicdef.h>
    8.20 +#include <asm/mach-es7000/mach_apic.h>
    8.21 +#include <asm/mach-es7000/mach_ipi.h>
    8.22 +#include <asm/mach-es7000/mach_mpparse.h>
    8.23 +#include <asm/mach-es7000/mach_wakecpu.h>
    8.24 +
    8.25 +static __init int probe_es7000(void)
    8.26 +{
    8.27 +	/* probed later in mptable/ACPI hooks */
    8.28 +	return 0;
    8.29 +}
    8.30 +
    8.31 +struct genapic apic_es7000 = APIC_INIT("es7000", probe_es7000);
     9.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     9.2 +++ b/xen/arch/x86/genapic/es7000.h	Wed May 25 17:29:20 2005 +0000
     9.3 @@ -0,0 +1,110 @@
     9.4 +/*
     9.5 + * Written by: Garry Forsgren, Unisys Corporation
     9.6 + *             Natalie Protasevich, Unisys Corporation
     9.7 + * This file contains the code to configure and interface 
     9.8 + * with Unisys ES7000 series hardware system manager.
     9.9 + *
    9.10 + * Copyright (c) 2003 Unisys Corporation.  All Rights Reserved.
    9.11 + *
    9.12 + * This program is free software; you can redistribute it and/or modify it
    9.13 + * under the terms of version 2 of the GNU General Public License as
    9.14 + * published by the Free Software Foundation.
    9.15 + *
    9.16 + * This program is distributed in the hope that it would be useful, but
    9.17 + * WITHOUT ANY WARRANTY; without even the implied warranty of
    9.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
    9.19 + *
    9.20 + * You should have received a copy of the GNU General Public License along
    9.21 + * with this program; if not, write the Free Software Foundation, Inc., 59
    9.22 + * Temple Place - Suite 330, Boston MA 02111-1307, USA.
    9.23 + *
    9.24 + * Contact information: Unisys Corporation, Township Line & Union Meeting 
    9.25 + * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
    9.26 + *
    9.27 + * http://www.unisys.com
    9.28 + */
    9.29 +
    9.30 +#define	MIP_REG			1
    9.31 +#define	MIP_PSAI_REG		4
    9.32 +
    9.33 +#define	MIP_BUSY		1
    9.34 +#define	MIP_SPIN		0xf0000
    9.35 +#define	MIP_VALID		0x0100000000000000ULL
    9.36 +#define	MIP_PORT(VALUE)	((VALUE >> 32) & 0xffff)
    9.37 +
    9.38 +#define	MIP_RD_LO(VALUE)	(VALUE & 0xffffffff)   
    9.39 +
    9.40 +struct mip_reg_info {
    9.41 +	unsigned long long mip_info;
    9.42 +	unsigned long long delivery_info;
    9.43 +	unsigned long long host_reg;
    9.44 +	unsigned long long mip_reg;
    9.45 +};
    9.46 +
    9.47 +struct part_info {
    9.48 +	unsigned char type;   
    9.49 +	unsigned char length;
    9.50 +	unsigned char part_id;
    9.51 +	unsigned char apic_mode;
    9.52 +	unsigned long snum;    
    9.53 +	char ptype[16];
    9.54 +	char sname[64];
    9.55 +	char pname[64];
    9.56 +};
    9.57 +
    9.58 +struct psai {
    9.59 +	unsigned long long entry_type;
    9.60 +	unsigned long long addr;
    9.61 +	unsigned long long bep_addr;
    9.62 +};
    9.63 +
    9.64 +struct es7000_mem_info {
    9.65 +	unsigned char type;   
    9.66 +	unsigned char length;
    9.67 +	unsigned char resv[6];
    9.68 +	unsigned long long  start; 
    9.69 +	unsigned long long  size; 
    9.70 +};
    9.71 +
    9.72 +struct es7000_oem_table {
    9.73 +	unsigned long long hdr;
    9.74 +	struct mip_reg_info mip;
    9.75 +	struct part_info pif;
    9.76 +	struct es7000_mem_info shm;
    9.77 +	struct psai psai;
    9.78 +};
    9.79 +
    9.80 +struct acpi_table_sdt {
    9.81 +	unsigned long pa;
    9.82 +	unsigned long count;
    9.83 +	struct {
    9.84 +		unsigned long pa;
    9.85 +		enum acpi_table_id id;
    9.86 +		unsigned long size;
    9.87 +	}	entry[50];
    9.88 +};
    9.89 +
    9.90 +struct oem_table {
    9.91 +	struct acpi_table_header Header;
    9.92 +	u32 OEMTableAddr;
    9.93 +	u32 OEMTableSize;
    9.94 +};
    9.95 +
    9.96 +struct mip_reg {
    9.97 +	unsigned long long off_0;
    9.98 +	unsigned long long off_8;
    9.99 +	unsigned long long off_10;
   9.100 +	unsigned long long off_18;
   9.101 +	unsigned long long off_20;
   9.102 +	unsigned long long off_28;
   9.103 +	unsigned long long off_30;
   9.104 +	unsigned long long off_38;
   9.105 +};
   9.106 +
   9.107 +#define	MIP_SW_APIC		0x1020b
   9.108 +#define	MIP_FUNC(VALUE) 	(VALUE & 0xff)
   9.109 +
   9.110 +extern int parse_unisys_oem (char *oemptr, int oem_entries);
   9.111 +extern int find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length);
   9.112 +extern int es7000_start_cpu(int cpu, unsigned long eip);
   9.113 +extern void es7000_sw_apic(void);
    10.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    10.2 +++ b/xen/arch/x86/genapic/es7000plat.c	Wed May 25 17:29:20 2005 +0000
    10.3 @@ -0,0 +1,302 @@
    10.4 +/*
    10.5 + * Written by: Garry Forsgren, Unisys Corporation
    10.6 + *             Natalie Protasevich, Unisys Corporation
    10.7 + * This file contains the code to configure and interface
    10.8 + * with Unisys ES7000 series hardware system manager.
    10.9 + *
   10.10 + * Copyright (c) 2003 Unisys Corporation.  All Rights Reserved.
   10.11 + *
   10.12 + * This program is free software; you can redistribute it and/or modify it
   10.13 + * under the terms of version 2 of the GNU General Public License as
   10.14 + * published by the Free Software Foundation.
   10.15 + *
   10.16 + * This program is distributed in the hope that it would be useful, but
   10.17 + * WITHOUT ANY WARRANTY; without even the implied warranty of
   10.18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
   10.19 + *
   10.20 + * You should have received a copy of the GNU General Public License along
   10.21 + * with this program; if not, write the Free Software Foundation, Inc., 59
   10.22 + * Temple Place - Suite 330, Boston MA 02111-1307, USA.
   10.23 + *
   10.24 + * Contact information: Unisys Corporation, Township Line & Union Meeting
   10.25 + * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or:
   10.26 + *
   10.27 + * http://www.unisys.com
   10.28 + */
   10.29 +
   10.30 +#include <xen/config.h>
   10.31 +#include <xen/types.h>
   10.32 +#include <xen/kernel.h>
   10.33 +#include <xen/smp.h>
   10.34 +#include <xen/string.h>
   10.35 +#include <xen/spinlock.h>
   10.36 +#include <xen/errno.h>
   10.37 +#include <xen/reboot.h>
   10.38 +#include <xen/init.h>
   10.39 +#include <xen/acpi.h>
   10.40 +#include <asm/io.h>
   10.41 +#include <asm/smp.h>
   10.42 +#include <asm/apicdef.h>
   10.43 +#include "es7000.h"
   10.44 +
   10.45 +/*
   10.46 + * ES7000 Globals
   10.47 + */
   10.48 +
   10.49 +volatile unsigned long	*psai = NULL;
   10.50 +struct mip_reg		*mip_reg;
   10.51 +struct mip_reg		*host_reg;
   10.52 +int 			mip_port;
   10.53 +unsigned long		mip_addr, host_addr;
   10.54 +
   10.55 +#if defined(CONFIG_X86_IO_APIC) && (defined(CONFIG_ACPI_INTERPRETER) || defined(CONFIG_ACPI_BOOT))
   10.56 +
   10.57 +/*
   10.58 + * GSI override for ES7000 platforms.
   10.59 + */
   10.60 +
   10.61 +static unsigned int base;
   10.62 +
   10.63 +static int
   10.64 +es7000_rename_gsi(int ioapic, int gsi)
   10.65 +{
   10.66 +	if (!base) {
   10.67 +		int i;
   10.68 +		for (i = 0; i < nr_ioapics; i++)
   10.69 +			base += nr_ioapic_registers[i];
   10.70 +	}
   10.71 +
   10.72 +	if (!ioapic && (gsi < 16)) 
   10.73 +		gsi += base;
   10.74 +	return gsi;
   10.75 +}
   10.76 +
   10.77 +#endif // (CONFIG_X86_IO_APIC) && (CONFIG_ACPI_INTERPRETER || CONFIG_ACPI_BOOT)
   10.78 +
   10.79 +/*
   10.80 + * Parse the OEM Table
   10.81 + */
   10.82 +
   10.83 +int __init
   10.84 +parse_unisys_oem (char *oemptr, int oem_entries)
   10.85 +{
   10.86 +	int                     i;
   10.87 +	int 			success = 0;
   10.88 +	unsigned char           type, size;
   10.89 +	unsigned long           val;
   10.90 +	char                    *tp = NULL;
   10.91 +	struct psai             *psaip = NULL;
   10.92 +	struct mip_reg_info 	*mi;
   10.93 +	struct mip_reg		*host, *mip;
   10.94 +
   10.95 +	tp = oemptr;
   10.96 +
   10.97 +	tp += 8;
   10.98 +
   10.99 +	for (i=0; i <= oem_entries; i++) {
  10.100 +		type = *tp++;
  10.101 +		size = *tp++;
  10.102 +		tp -= 2;
  10.103 +		switch (type) {
  10.104 +		case MIP_REG:
  10.105 +			mi = (struct mip_reg_info *)tp;
  10.106 +			val = MIP_RD_LO(mi->host_reg);
  10.107 +			host_addr = val;
  10.108 +			host = (struct mip_reg *)val;
  10.109 +			host_reg = __va(host);
  10.110 +			val = MIP_RD_LO(mi->mip_reg);
  10.111 +			mip_port = MIP_PORT(mi->mip_info);
  10.112 +			mip_addr = val;
  10.113 +			mip = (struct mip_reg *)val;
  10.114 +			mip_reg = __va(mip);
  10.115 +			Dprintk("es7000_mipcfg: host_reg = 0x%lx \n",
  10.116 +				(unsigned long)host_reg);
  10.117 +			Dprintk("es7000_mipcfg: mip_reg = 0x%lx \n",
  10.118 +				(unsigned long)mip_reg);
  10.119 +			success++;
  10.120 +			break;
  10.121 +		case MIP_PSAI_REG:
  10.122 +			psaip = (struct psai *)tp;
  10.123 +			if (tp != NULL) {
  10.124 +				if (psaip->addr)
  10.125 +					psai = __va(psaip->addr);
  10.126 +				else
  10.127 +					psai = NULL;
  10.128 +				success++;
  10.129 +			}
  10.130 +			break;
  10.131 +		default:
  10.132 +			break;
  10.133 +		}
  10.134 +		if (i == 6) break;
  10.135 +		tp += size;
  10.136 +	}
  10.137 +
  10.138 +	if (success < 2) {
  10.139 +		es7000_plat = 0;
  10.140 +	} else {
  10.141 +		printk("\nEnabling ES7000 specific features...\n");
  10.142 +		es7000_plat = 1;
  10.143 +		ioapic_renumber_irq = es7000_rename_gsi;
  10.144 +	}
  10.145 +	return es7000_plat;
  10.146 +}
  10.147 +
  10.148 +int __init
  10.149 +find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length)
  10.150 +{
  10.151 +	struct acpi_table_rsdp		*rsdp = NULL;
  10.152 +	unsigned long			rsdp_phys = 0;
  10.153 +	struct acpi_table_header 	*header = NULL;
  10.154 +	int				i;
  10.155 +	struct acpi_table_sdt		sdt;
  10.156 +
  10.157 +	rsdp_phys = acpi_find_rsdp();
  10.158 +	rsdp = __va(rsdp_phys);
  10.159 +	if (rsdp->rsdt_address) {
  10.160 +		struct acpi_table_rsdt	*mapped_rsdt = NULL;
  10.161 +		sdt.pa = rsdp->rsdt_address;
  10.162 +
  10.163 +		header = (struct acpi_table_header *)
  10.164 +			__acpi_map_table(sdt.pa, sizeof(struct acpi_table_header));
  10.165 +		if (!header)
  10.166 +			return -ENODEV;
  10.167 +
  10.168 +		sdt.count = (header->length - sizeof(struct acpi_table_header)) >> 3;
  10.169 +		mapped_rsdt = (struct acpi_table_rsdt *)
  10.170 +			__acpi_map_table(sdt.pa, header->length);
  10.171 +		if (!mapped_rsdt)
  10.172 +			return -ENODEV;
  10.173 +
  10.174 +		header = &mapped_rsdt->header;
  10.175 +
  10.176 +		for (i = 0; i < sdt.count; i++)
  10.177 +			sdt.entry[i].pa = (unsigned long) mapped_rsdt->entry[i];
  10.178 +	};
  10.179 +	for (i = 0; i < sdt.count; i++) {
  10.180 +
  10.181 +		header = (struct acpi_table_header *)
  10.182 +			__acpi_map_table(sdt.entry[i].pa,
  10.183 +				sizeof(struct acpi_table_header));
  10.184 +		if (!header)
  10.185 +			continue;
  10.186 +		if (!strncmp((char *) &header->signature, "OEM1", 4)) {
  10.187 +			if (!strncmp((char *) &header->oem_id, "UNISYS", 6)) {
  10.188 +				void *addr;
  10.189 +				struct oem_table *t;
  10.190 +				acpi_table_print(header, sdt.entry[i].pa);
  10.191 +				t = (struct oem_table *) __acpi_map_table(sdt.entry[i].pa, header->length);
  10.192 +				addr = (void *) __acpi_map_table(t->OEMTableAddr, t->OEMTableSize);
  10.193 +				*length = header->length;
  10.194 +				*oem_addr = (unsigned long) addr;
  10.195 +				return 0;
  10.196 +			}
  10.197 +		}
  10.198 +	}
  10.199 +	Dprintk("ES7000: did not find Unisys ACPI OEM table!\n");
  10.200 +	return -1;
  10.201 +}
  10.202 +
  10.203 +static void
  10.204 +es7000_spin(int n)
  10.205 +{
  10.206 +	int i = 0;
  10.207 +
  10.208 +	while (i++ < n)
  10.209 +		rep_nop();
  10.210 +}
  10.211 +
  10.212 +static int __init
  10.213 +es7000_mip_write(struct mip_reg *mip_reg)
  10.214 +{
  10.215 +	int			status = 0;
  10.216 +	int			spin;
  10.217 +
  10.218 +	spin = MIP_SPIN;
  10.219 +	while (((unsigned long long)host_reg->off_38 &
  10.220 +		(unsigned long long)MIP_VALID) != 0) {
  10.221 +			if (--spin <= 0) {
  10.222 +				printk("es7000_mip_write: Timeout waiting for Host Valid Flag");
  10.223 +				return -1;
  10.224 +			}
  10.225 +		es7000_spin(MIP_SPIN);
  10.226 +	}
  10.227 +
  10.228 +	memcpy(host_reg, mip_reg, sizeof(struct mip_reg));
  10.229 +	outb(1, mip_port);
  10.230 +
  10.231 +	spin = MIP_SPIN;
  10.232 +
  10.233 +	while (((unsigned long long)mip_reg->off_38 &
  10.234 +		(unsigned long long)MIP_VALID) == 0) {
  10.235 +		if (--spin <= 0) {
  10.236 +			printk("es7000_mip_write: Timeout waiting for MIP Valid Flag");
  10.237 +			return -1;
  10.238 +		}
  10.239 +		es7000_spin(MIP_SPIN);
  10.240 +	}
  10.241 +
  10.242 +	status = ((unsigned long long)mip_reg->off_0 &
  10.243 +		(unsigned long long)0xffff0000000000ULL) >> 48;
  10.244 +	mip_reg->off_38 = ((unsigned long long)mip_reg->off_38 &
  10.245 +		(unsigned long long)~MIP_VALID);
  10.246 +	return status;
  10.247 +}
  10.248 +
  10.249 +int
  10.250 +es7000_start_cpu(int cpu, unsigned long eip)
  10.251 +{
  10.252 +	unsigned long vect = 0, psaival = 0;
  10.253 +
  10.254 +	if (psai == NULL)
  10.255 +		return -1;
  10.256 +
  10.257 +	vect = ((unsigned long)__pa(eip)/0x1000) << 16;
  10.258 +	psaival = (0x1000000 | vect | cpu);
  10.259 +
  10.260 +	while (*psai & 0x1000000)
  10.261 +                ;
  10.262 +
  10.263 +	*psai = psaival;
  10.264 +
  10.265 +	return 0;
  10.266 +
  10.267 +}
  10.268 +
  10.269 +int
  10.270 +es7000_stop_cpu(int cpu)
  10.271 +{
  10.272 +	int startup;
  10.273 +
  10.274 +	if (psai == NULL)
  10.275 +		return -1;
  10.276 +
  10.277 +	startup= (0x1000000 | cpu);
  10.278 +
  10.279 +	while ((*psai & 0xff00ffff) != startup)
  10.280 +		;
  10.281 +
  10.282 +	startup = (*psai & 0xff0000) >> 16;
  10.283 +	*psai &= 0xffffff;
  10.284 +
  10.285 +	return 0;
  10.286 +
  10.287 +}
  10.288 +
  10.289 +void __init
  10.290 +es7000_sw_apic()
  10.291 +{
  10.292 +	if (es7000_plat) {
  10.293 +		int mip_status;
  10.294 +		struct mip_reg es7000_mip_reg;
  10.295 +
  10.296 +		printk("ES7000: Enabling APIC mode.\n");
  10.297 +        	memset(&es7000_mip_reg, 0, sizeof(struct mip_reg));
  10.298 +        	es7000_mip_reg.off_0 = MIP_SW_APIC;
  10.299 +        	es7000_mip_reg.off_38 = (MIP_VALID);
  10.300 +        	while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0)
  10.301 +              		printk("es7000_sw_apic: command failed, status = %x\n",
  10.302 +				mip_status);
  10.303 +		return;
  10.304 +	}
  10.305 +}
    11.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    11.2 +++ b/xen/arch/x86/genapic/probe.c	Wed May 25 17:29:20 2005 +0000
    11.3 @@ -0,0 +1,101 @@
    11.4 +/* Copyright 2003 Andi Kleen, SuSE Labs. 
    11.5 + * Subject to the GNU Public License, v.2 
    11.6 + * 
    11.7 + * Generic x86 APIC driver probe layer.
    11.8 + */  
    11.9 +#include <xen/config.h>
   11.10 +#include <xen/cpumask.h>
   11.11 +#include <xen/string.h>
   11.12 +#include <xen/kernel.h>
   11.13 +#include <xen/ctype.h>
   11.14 +#include <xen/init.h>
   11.15 +#include <asm/fixmap.h>
   11.16 +#include <asm/mpspec.h>
   11.17 +#include <asm/apicdef.h>
   11.18 +#include <asm/genapic.h>
   11.19 +
   11.20 +extern struct genapic apic_summit;
   11.21 +extern struct genapic apic_bigsmp;
   11.22 +extern struct genapic apic_es7000;
   11.23 +extern struct genapic apic_default;
   11.24 +
   11.25 +struct genapic *genapic = &apic_default;
   11.26 +
   11.27 +struct genapic *apic_probe[] __initdata = { 
   11.28 +	&apic_summit,
   11.29 +	&apic_bigsmp, 
   11.30 +	&apic_es7000,
   11.31 +	&apic_default,	/* must be last */
   11.32 +	NULL,
   11.33 +};
   11.34 +
   11.35 +void __init generic_apic_probe(char *command_line) 
   11.36 +{ 
   11.37 +	char *s;
   11.38 +	int i;
   11.39 +	int changed = 0;
   11.40 +
   11.41 +	s = strstr(command_line, "apic=");
   11.42 +	if (s && (s == command_line || isspace(s[-1]))) { 
   11.43 +		char *p = strchr(s, ' '), old; 
   11.44 +		if (!p)
   11.45 +			p = strchr(s, '\0'); 
   11.46 +		old = *p; 
   11.47 +		*p = 0; 
   11.48 +		for (i = 0; !changed && apic_probe[i]; i++) {
   11.49 +			if (!strcmp(apic_probe[i]->name, s+5)) { 
   11.50 +				changed = 1;
   11.51 +				genapic = apic_probe[i];
   11.52 +			}
   11.53 +		}
   11.54 +		if (!changed)
   11.55 +			printk(KERN_ERR "Unknown genapic `%s' specified.\n", s);
   11.56 +		*p = old;
   11.57 +	} 
   11.58 +	for (i = 0; !changed && apic_probe[i]; i++) { 
   11.59 +		if (apic_probe[i]->probe()) {
   11.60 +			changed = 1;
   11.61 +			genapic = apic_probe[i]; 
   11.62 +		} 
   11.63 +	}
   11.64 +	/* Not visible without early console */ 
   11.65 +	if (!changed) 
   11.66 +		panic("Didn't find an APIC driver"); 
   11.67 +
   11.68 +	printk(KERN_INFO "Using APIC driver %s\n", genapic->name);
   11.69 +} 
   11.70 +
   11.71 +/* These functions can switch the APIC even after the initial ->probe() */
   11.72 +
   11.73 +int __init mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid)
   11.74 +{ 
   11.75 +	int i;
   11.76 +	for (i = 0; apic_probe[i]; ++i) { 
   11.77 +		if (apic_probe[i]->mps_oem_check(mpc,oem,productid)) { 
   11.78 +			genapic = apic_probe[i];
   11.79 +			printk(KERN_INFO "Switched to APIC driver `%s'.\n", 
   11.80 +			       genapic->name);
   11.81 +			return 1;
   11.82 +		} 
   11.83 +	} 
   11.84 +	return 0;
   11.85 +} 
   11.86 +
   11.87 +int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id)
   11.88 +{
   11.89 +	int i;
   11.90 +	for (i = 0; apic_probe[i]; ++i) { 
   11.91 +		if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { 
   11.92 +			genapic = apic_probe[i];
   11.93 +			printk(KERN_INFO "Switched to APIC driver `%s'.\n", 
   11.94 +			       genapic->name);
   11.95 +			return 1;
   11.96 +		} 
   11.97 +	} 
   11.98 +	return 0;	
   11.99 +}
  11.100 +
  11.101 +int hard_smp_processor_id(void)
  11.102 +{
  11.103 +	return genapic->get_apic_id(*(unsigned long *)(APIC_BASE+APIC_ID));
  11.104 +}
    12.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    12.2 +++ b/xen/arch/x86/genapic/summit.c	Wed May 25 17:29:20 2005 +0000
    12.3 @@ -0,0 +1,26 @@
    12.4 +/* 
    12.5 + * APIC driver for the IBM "Summit" chipset.
    12.6 + */
    12.7 +#define APIC_DEFINITION 1
    12.8 +#include <xen/config.h>
    12.9 +#include <xen/cpumask.h>
   12.10 +#include <asm/mpspec.h>
   12.11 +#include <asm/genapic.h>
   12.12 +#include <asm/fixmap.h>
   12.13 +#include <asm/apicdef.h>
   12.14 +#include <xen/kernel.h>
   12.15 +#include <xen/string.h>
   12.16 +#include <xen/smp.h>
   12.17 +#include <xen/init.h>
   12.18 +#include <asm/mach-summit/mach_apic.h>
   12.19 +#include <asm/mach-summit/mach_apicdef.h>
   12.20 +#include <asm/mach-summit/mach_ipi.h>
   12.21 +#include <asm/mach-summit/mach_mpparse.h>
   12.22 +
   12.23 +static __init int probe_summit(void)
   12.24 +{ 
   12.25 +	/* probed later in mptable/ACPI hooks */
   12.26 +	return 0;
   12.27 +} 
   12.28 +
   12.29 +struct genapic apic_summit = APIC_INIT("summit", probe_summit); 
    13.1 --- a/xen/arch/x86/mpparse.c	Wed May 25 17:19:19 2005 +0000
    13.2 +++ b/xen/arch/x86/mpparse.c	Wed May 25 17:29:20 2005 +0000
    13.3 @@ -33,8 +33,6 @@
    13.4  #include <mach_mpparse.h>
    13.5  #include <bios_ebda.h>
    13.6  
    13.7 -#define es7000_plat 0 /* XXX XEN */
    13.8 -
    13.9  /* Have we found an MP table */
   13.10  int smp_found_config;
   13.11  unsigned int __initdata maxcpus = NR_CPUS;
    14.1 --- a/xen/arch/x86/mtrr/generic.c	Wed May 25 17:19:19 2005 +0000
    14.2 +++ b/xen/arch/x86/mtrr/generic.c	Wed May 25 17:29:20 2005 +0000
    14.3 @@ -3,6 +3,7 @@
    14.4  #include <xen/init.h>
    14.5  #include <xen/mm.h>
    14.6  #include <xen/slab.h>
    14.7 +#include <asm/flushtlb.h>
    14.8  #include <asm/io.h>
    14.9  #include <asm/mtrr.h>
   14.10  #include <asm/msr.h>
    15.1 --- a/xen/arch/x86/setup.c	Wed May 25 17:19:19 2005 +0000
    15.2 +++ b/xen/arch/x86/setup.c	Wed May 25 17:29:20 2005 +0000
    15.3 @@ -20,6 +20,9 @@
    15.4  #include <asm/shadow.h>
    15.5  #include <asm/e820.h>
    15.6  
    15.7 +extern void dmi_scan_machine(void);
    15.8 +extern void generic_apic_probe(char *);
    15.9 +
   15.10  /*
   15.11   * opt_xenheap_megabytes: Size of Xen heap in megabytes, excluding the
   15.12   * pfn_info table and allocation bitmap.
   15.13 @@ -64,6 +67,8 @@ boolean_param("acpi_skip_timer_override"
   15.14  extern int skip_ioapic_setup;
   15.15  boolean_param("noapic", skip_ioapic_setup);
   15.16  
   15.17 +static char *xen_cmdline;
   15.18 +
   15.19  int early_boot = 1;
   15.20  
   15.21  int ht_per_core = 1;
   15.22 @@ -422,6 +427,11 @@ static void __init start_of_day(void)
   15.23  
   15.24      paging_init();
   15.25  
   15.26 +    dmi_scan_machine();
   15.27 +
   15.28 +    if ( xen_cmdline != NULL )
   15.29 +        generic_apic_probe(xen_cmdline);
   15.30 +
   15.31      acpi_boot_table_init();
   15.32      acpi_boot_init();
   15.33  
   15.34 @@ -488,7 +498,10 @@ void __init __start_xen(multiboot_info_t
   15.35  
   15.36      /* Parse the command-line options. */
   15.37      if ( (mbi->flags & MBI_CMDLINE) && (mbi->cmdline != 0) )
   15.38 -        cmdline_parse(__va(mbi->cmdline));
   15.39 +    {
   15.40 +        xen_cmdline = __va(mbi->cmdline);
   15.41 +        cmdline_parse(xen_cmdline);
   15.42 +    }
   15.43  
   15.44      /* Must do this early -- e.g., spinlocks rely on get_current(). */
   15.45      set_current(&idle0_exec_domain);
    16.1 --- a/xen/arch/x86/smp.c	Wed May 25 17:19:19 2005 +0000
    16.2 +++ b/xen/arch/x86/smp.c	Wed May 25 17:29:20 2005 +0000
    16.3 @@ -19,6 +19,7 @@
    16.4  #include <asm/flushtlb.h>
    16.5  #include <asm/smpboot.h>
    16.6  #include <asm/hardirq.h>
    16.7 +#include <mach_apic.h>
    16.8  
    16.9  /*
   16.10   *	Some notes on x86 processor bugs affecting SMP operation:
   16.11 @@ -72,7 +73,7 @@ static inline int __prepare_ICR2 (unsign
   16.12      return SET_APIC_DEST_FIELD(mask);
   16.13  }
   16.14  
   16.15 -static inline void __send_IPI_shortcut(unsigned int shortcut, int vector)
   16.16 +void __send_IPI_shortcut(unsigned int shortcut, int vector)
   16.17  {
   16.18      /*
   16.19       * Subtle. In the case of the 'never do double writes' workaround
   16.20 @@ -104,8 +105,12 @@ void send_IPI_self(int vector)
   16.21      __send_IPI_shortcut(APIC_DEST_SELF, vector);
   16.22  }
   16.23  
   16.24 -static inline void send_IPI_mask(int mask, int vector)
   16.25 +/*
   16.26 + * This is only used on smaller machines.
   16.27 + */
   16.28 +void send_IPI_mask_bitmask(cpumask_t cpumask, int vector)
   16.29  {
   16.30 +    unsigned long mask = cpus_addr(cpumask)[0];
   16.31      unsigned long cfg;
   16.32      unsigned long flags;
   16.33  
   16.34 @@ -115,38 +120,69 @@ static inline void send_IPI_mask(int mas
   16.35       * Wait for idle.
   16.36       */
   16.37      apic_wait_icr_idle();
   16.38 -
   16.39 +		
   16.40      /*
   16.41       * prepare target chip field
   16.42       */
   16.43      cfg = __prepare_ICR2(mask);
   16.44      apic_write_around(APIC_ICR2, cfg);
   16.45 -
   16.46 +		
   16.47      /*
   16.48 -     * program the ICR 
   16.49 +     * program the ICR
   16.50       */
   16.51      cfg = __prepare_ICR(0, vector);
   16.52 -
   16.53 +			
   16.54      /*
   16.55       * Send the IPI. The write to APIC_ICR fires this off.
   16.56       */
   16.57      apic_write_around(APIC_ICR, cfg);
   16.58 -
   16.59 +    
   16.60      local_irq_restore(flags);
   16.61  }
   16.62  
   16.63 -static inline void send_IPI_allbutself(int vector)
   16.64 +inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
   16.65  {
   16.66 +    unsigned long cfg, flags;
   16.67 +    unsigned int query_cpu;
   16.68 +
   16.69      /*
   16.70 -     * If there are no other CPUs in the system then we get an APIC send error 
   16.71 -     * if we try to broadcast. thus we have to avoid sending IPIs in this case.
   16.72 -     */
   16.73 -    if ( num_online_cpus() <= 1 )
   16.74 -        return;
   16.75 +     * Hack. The clustered APIC addressing mode doesn't allow us to send 
   16.76 +     * to an arbitrary mask, so I do a unicasts to each CPU instead. This 
   16.77 +     * should be modified to do 1 message per cluster ID - mbligh
   16.78 +     */ 
   16.79  
   16.80 -    __send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
   16.81 +    local_irq_save(flags);
   16.82 +
   16.83 +    for (query_cpu = 0; query_cpu < NR_CPUS; ++query_cpu) {
   16.84 +        if (cpu_isset(query_cpu, mask)) {
   16.85 +		
   16.86 +            /*
   16.87 +             * Wait for idle.
   16.88 +             */
   16.89 +            apic_wait_icr_idle();
   16.90 +		
   16.91 +            /*
   16.92 +             * prepare target chip field
   16.93 +             */
   16.94 +            cfg = __prepare_ICR2(cpu_to_logical_apicid(query_cpu));
   16.95 +            apic_write_around(APIC_ICR2, cfg);
   16.96 +		
   16.97 +            /*
   16.98 +             * program the ICR
   16.99 +             */
  16.100 +            cfg = __prepare_ICR(0, vector);
  16.101 +			
  16.102 +            /*
  16.103 +             * Send the IPI. The write to APIC_ICR fires this off.
  16.104 +             */
  16.105 +            apic_write_around(APIC_ICR, cfg);
  16.106 +        }
  16.107 +    }
  16.108 +    local_irq_restore(flags);
  16.109  }
  16.110  
  16.111 +#include <mach_ipi.h>
  16.112 +
  16.113  static spinlock_t flush_lock = SPIN_LOCK_UNLOCKED;
  16.114  static unsigned long flush_cpumask, flush_va;
  16.115  
  16.116 @@ -179,7 +215,11 @@ void __flush_tlb_mask(unsigned long mask
  16.117          spin_lock(&flush_lock);
  16.118          flush_cpumask = mask;
  16.119          flush_va      = va;
  16.120 -        send_IPI_mask(mask, INVALIDATE_TLB_VECTOR);
  16.121 +        {
  16.122 +            cpumask_t _mask;
  16.123 +            cpus_addr(_mask)[0] = mask;
  16.124 +            send_IPI_mask(_mask, INVALIDATE_TLB_VECTOR);
  16.125 +        }
  16.126          while ( flush_cpumask != 0 )
  16.127              cpu_relax();
  16.128          spin_unlock(&flush_lock);
  16.129 @@ -222,9 +262,11 @@ void flush_tlb_all_pge(void)
  16.130  
  16.131  void smp_send_event_check_mask(unsigned long cpu_mask)
  16.132  {
  16.133 +    cpumask_t mask;
  16.134      cpu_mask &= ~(1UL << smp_processor_id());
  16.135 +    cpus_addr(mask)[0] = cpu_mask;
  16.136      if ( cpu_mask != 0 )
  16.137 -        send_IPI_mask(cpu_mask, EVENT_CHECK_VECTOR);
  16.138 +        send_IPI_mask(mask, EVENT_CHECK_VECTOR);
  16.139  }
  16.140  
  16.141  /*
    17.1 --- a/xen/arch/x86/smpboot.c	Wed May 25 17:19:19 2005 +0000
    17.2 +++ b/xen/arch/x86/smpboot.c	Wed May 25 17:29:20 2005 +0000
    17.3 @@ -43,6 +43,7 @@
    17.4  #include <asm/mc146818rtc.h>
    17.5  #include <asm/desc.h>
    17.6  #include <asm/div64.h>
    17.7 +#include <asm/flushtlb.h>
    17.8  #include <asm/msr.h>
    17.9  #include <mach_apic.h>
   17.10  #include <mach_wakecpu.h>
    18.1 --- a/xen/common/kernel.c	Wed May 25 17:19:19 2005 +0000
    18.2 +++ b/xen/common/kernel.c	Wed May 25 17:29:20 2005 +0000
    18.3 @@ -16,55 +16,65 @@
    18.4  
    18.5  void cmdline_parse(char *cmdline)
    18.6  {
    18.7 -    char *opt_end, *opt;
    18.8 +    char opt[100], *optval, *p = cmdline, *q;
    18.9      struct kernel_param *param;
   18.10      
   18.11 -    if ( cmdline == NULL )
   18.12 +    if ( p == NULL )
   18.13          return;
   18.14  
   18.15 -    while ( *cmdline == ' ' )
   18.16 -        cmdline++;
   18.17 -    cmdline = strchr(cmdline, ' '); /* skip the image name */
   18.18 -    while ( cmdline != NULL )
   18.19 +    /* Skip whitespace and the image name. */
   18.20 +    while ( *p == ' ' )
   18.21 +        p++;
   18.22 +    if ( (p = strchr(p, ' ')) == NULL )
   18.23 +        return;
   18.24 +
   18.25 +    for ( ; ; )
   18.26      {
   18.27 -        while ( *cmdline == ' ' )
   18.28 -            cmdline++;
   18.29 -        if ( *cmdline == '\0' )
   18.30 +        /* Skip whitespace. */
   18.31 +        while ( *p == ' ' )
   18.32 +            p++;
   18.33 +        if ( *p == '\0' )
   18.34              break;
   18.35 -        opt_end = strchr(cmdline, ' ');
   18.36 -        if ( opt_end != NULL )
   18.37 -            *opt_end++ = '\0';
   18.38 -        opt = strchr(cmdline, '=');
   18.39 -        if ( opt != NULL )
   18.40 -            *opt++ = '\0';
   18.41 +
   18.42 +        /* Grab the next whitespace-delimited option. */
   18.43 +        q = opt;
   18.44 +        while ( (*p != ' ') && (*p != '\0') )
   18.45 +            *q++ = *p++;
   18.46 +        *q = '\0';
   18.47 +
   18.48 +        /* Search for value part of a key=value option. */
   18.49 +        optval = strchr(opt, '=');
   18.50 +        if ( optval != NULL )
   18.51 +            *optval++ = '\0';
   18.52 +
   18.53          for ( param = &__setup_start; param != &__setup_end; param++ )
   18.54          {
   18.55 -            if ( strcmp(param->name, cmdline ) != 0 )
   18.56 +            if ( strcmp(param->name, opt ) != 0 )
   18.57                  continue;
   18.58 +
   18.59              switch ( param->type )
   18.60              {
   18.61              case OPT_STR:
   18.62 -                if ( opt != NULL )
   18.63 +                if ( optval != NULL )
   18.64                  {
   18.65 -                    strncpy(param->var, opt, param->len);
   18.66 +                    strncpy(param->var, optval, param->len);
   18.67                      ((char *)param->var)[param->len-1] = '\0';
   18.68                  }
   18.69                  break;
   18.70              case OPT_UINT:
   18.71 -                if ( opt != NULL )
   18.72 +                if ( optval != NULL )
   18.73                      *(unsigned int *)param->var =
   18.74 -                        simple_strtol(opt, (char **)&opt, 0);
   18.75 +                        simple_strtol(optval, (char **)&optval, 0);
   18.76                  break;
   18.77              case OPT_BOOL:
   18.78                  *(int *)param->var = 1;
   18.79                  break;
   18.80              case OPT_CUSTOM:
   18.81 -                if ( opt != NULL )
   18.82 -                    ((void (*)(char *))param->var)(opt);
   18.83 +                if ( optval != NULL )
   18.84 +                    ((void (*)(char *))param->var)(optval);
   18.85                  break;
   18.86              }
   18.87          }
   18.88 -        cmdline = opt_end;
   18.89      }
   18.90  }
   18.91  
    19.1 --- a/xen/include/asm-x86/apic.h	Wed May 25 17:19:19 2005 +0000
    19.2 +++ b/xen/include/asm-x86/apic.h	Wed May 25 17:29:20 2005 +0000
    19.3 @@ -4,6 +4,7 @@
    19.4  #include <xen/config.h>
    19.5  #include <asm/fixmap.h>
    19.6  #include <asm/apicdef.h>
    19.7 +#include <asm/processor.h>
    19.8  #include <asm/system.h>
    19.9  
   19.10  #define Dprintk(x...)
    20.1 --- a/xen/include/asm-x86/fixmap.h	Wed May 25 17:19:19 2005 +0000
    20.2 +++ b/xen/include/asm-x86/fixmap.h	Wed May 25 17:29:20 2005 +0000
    20.3 @@ -13,9 +13,8 @@
    20.4  #define _ASM_FIXMAP_H
    20.5  
    20.6  #include <xen/config.h>
    20.7 -#include <xen/lib.h>
    20.8 +#include <asm/apicdef.h>
    20.9  #include <asm/acpi.h>
   20.10 -#include <asm/apicdef.h>
   20.11  #include <asm/page.h>
   20.12  
   20.13  /*
   20.14 @@ -26,17 +25,11 @@
   20.15   * from the end of virtual memory backwards.
   20.16   */
   20.17  enum fixed_addresses {
   20.18 -#ifdef CONFIG_X86_LOCAL_APIC
   20.19 -    FIX_APIC_BASE,	/* local (CPU) APIC -- required for SMP or not */
   20.20 -#endif
   20.21 -#ifdef CONFIG_X86_IO_APIC
   20.22 +    FIX_APIC_BASE,
   20.23      FIX_IO_APIC_BASE_0,
   20.24      FIX_IO_APIC_BASE_END = FIX_IO_APIC_BASE_0 + MAX_IO_APICS-1,
   20.25 -#endif
   20.26 -#ifdef CONFIG_ACPI_BOOT
   20.27      FIX_ACPI_BEGIN,
   20.28      FIX_ACPI_END = FIX_ACPI_BEGIN + FIX_ACPI_PAGES - 1,
   20.29 -#endif
   20.30      __end_of_fixed_addresses
   20.31  };
   20.32  
    21.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    21.2 +++ b/xen/include/asm-x86/genapic.h	Wed May 25 17:29:20 2005 +0000
    21.3 @@ -0,0 +1,115 @@
    21.4 +#ifndef _ASM_GENAPIC_H
    21.5 +#define _ASM_GENAPIC_H 1
    21.6 +
    21.7 +/*
    21.8 + * Generic APIC driver interface.
    21.9 + *
   21.10 + * An straight forward mapping of the APIC related parts of the
   21.11 + * x86 subarchitecture interface to a dynamic object.
   21.12 + *
   21.13 + * This is used by the "generic" x86 subarchitecture.
   21.14 + *
   21.15 + * Copyright 2003 Andi Kleen, SuSE Labs.
   21.16 + */
   21.17 +
   21.18 +struct mpc_config_translation;
   21.19 +struct mpc_config_bus;
   21.20 +struct mp_config_table;
   21.21 +struct mpc_config_processor;
   21.22 +
   21.23 +struct genapic { 
   21.24 +	char *name; 
   21.25 +	int (*probe)(void); 
   21.26 +
   21.27 +	int (*apic_id_registered)(void);
   21.28 +	cpumask_t (*target_cpus)(void);
   21.29 +	int int_delivery_mode;
   21.30 +	int int_dest_mode; 
   21.31 +	int ESR_DISABLE;
   21.32 +	int apic_destination_logical;
   21.33 +	unsigned long (*check_apicid_used)(physid_mask_t bitmap, int apicid);
   21.34 +	unsigned long (*check_apicid_present)(int apicid); 
   21.35 +	int no_balance_irq;
   21.36 +	int no_ioapic_check;
   21.37 +	void (*init_apic_ldr)(void);
   21.38 +	physid_mask_t (*ioapic_phys_id_map)(physid_mask_t map);
   21.39 +
   21.40 +	void (*clustered_apic_check)(void);
   21.41 +	int (*multi_timer_check)(int apic, int irq);
   21.42 +	int (*apicid_to_node)(int logical_apicid); 
   21.43 +	int (*cpu_to_logical_apicid)(int cpu);
   21.44 +	int (*cpu_present_to_apicid)(int mps_cpu);
   21.45 +	physid_mask_t (*apicid_to_cpu_present)(int phys_apicid);
   21.46 +	int (*mpc_apic_id)(struct mpc_config_processor *m, 
   21.47 +			   struct mpc_config_translation *t); 
   21.48 +	void (*setup_portio_remap)(void); 
   21.49 +	int (*check_phys_apicid_present)(int boot_cpu_physical_apicid);
   21.50 +	void (*enable_apic_mode)(void);
   21.51 +	u32 (*phys_pkg_id)(u32 cpuid_apic, int index_msb);
   21.52 +
   21.53 +	/* mpparse */
   21.54 +	void (*mpc_oem_bus_info)(struct mpc_config_bus *, char *, 
   21.55 +				 struct mpc_config_translation *);
   21.56 +	void (*mpc_oem_pci_bus)(struct mpc_config_bus *, 
   21.57 +				struct mpc_config_translation *); 
   21.58 +
   21.59 +	/* When one of the next two hooks returns 1 the genapic
   21.60 +	   is switched to this. Essentially they are additional probe 
   21.61 +	   functions. */
   21.62 +	int (*mps_oem_check)(struct mp_config_table *mpc, char *oem, 
   21.63 +			      char *productid);
   21.64 +	int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id);
   21.65 +
   21.66 +	unsigned (*get_apic_id)(unsigned long x);
   21.67 +	unsigned long apic_id_mask;
   21.68 +	unsigned int (*cpu_mask_to_apicid)(cpumask_t cpumask);
   21.69 +	
   21.70 +	/* ipi */
   21.71 +	void (*send_IPI_mask)(cpumask_t mask, int vector);
   21.72 +	void (*send_IPI_allbutself)(int vector);
   21.73 +	void (*send_IPI_all)(int vector);
   21.74 +}; 
   21.75 +
   21.76 +#define APICFUNC(x) .x = x
   21.77 +
   21.78 +#define APIC_INIT(aname, aprobe) { \
   21.79 +	.name = aname, \
   21.80 +	.probe = aprobe, \
   21.81 +	.int_delivery_mode = INT_DELIVERY_MODE, \
   21.82 +	.int_dest_mode = INT_DEST_MODE, \
   21.83 +	.no_balance_irq = NO_BALANCE_IRQ, \
   21.84 +	.no_ioapic_check = NO_IOAPIC_CHECK, \
   21.85 +	.ESR_DISABLE = esr_disable, \
   21.86 +	.apic_destination_logical = APIC_DEST_LOGICAL, \
   21.87 +	APICFUNC(apic_id_registered), \
   21.88 +	APICFUNC(target_cpus), \
   21.89 +	APICFUNC(check_apicid_used), \
   21.90 +	APICFUNC(check_apicid_present), \
   21.91 +	APICFUNC(init_apic_ldr), \
   21.92 +	APICFUNC(ioapic_phys_id_map), \
   21.93 +	APICFUNC(clustered_apic_check), \
   21.94 +	APICFUNC(multi_timer_check), \
   21.95 +	APICFUNC(apicid_to_node), \
   21.96 +	APICFUNC(cpu_to_logical_apicid), \
   21.97 +	APICFUNC(cpu_present_to_apicid), \
   21.98 +	APICFUNC(apicid_to_cpu_present), \
   21.99 +	APICFUNC(mpc_apic_id), \
  21.100 +	APICFUNC(setup_portio_remap), \
  21.101 +	APICFUNC(check_phys_apicid_present), \
  21.102 +	APICFUNC(mpc_oem_bus_info), \
  21.103 +	APICFUNC(mpc_oem_pci_bus), \
  21.104 +	APICFUNC(mps_oem_check), \
  21.105 +	APICFUNC(get_apic_id), \
  21.106 +	.apic_id_mask = APIC_ID_MASK, \
  21.107 +	APICFUNC(cpu_mask_to_apicid), \
  21.108 +	APICFUNC(acpi_madt_oem_check), \
  21.109 +	APICFUNC(send_IPI_mask), \
  21.110 +	APICFUNC(send_IPI_allbutself), \
  21.111 +	APICFUNC(send_IPI_all), \
  21.112 +	APICFUNC(enable_apic_mode), \
  21.113 +	APICFUNC(phys_pkg_id), \
  21.114 +	}
  21.115 +
  21.116 +extern struct genapic *genapic;
  21.117 +
  21.118 +#endif
    22.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    22.2 +++ b/xen/include/asm-x86/mach-bigsmp/mach_apic.h	Wed May 25 17:29:20 2005 +0000
    22.3 @@ -0,0 +1,167 @@
    22.4 +#ifndef __ASM_MACH_APIC_H
    22.5 +#define __ASM_MACH_APIC_H
    22.6 +#include <asm/smp.h>
    22.7 +
    22.8 +#define SEQUENTIAL_APICID
    22.9 +#ifdef SEQUENTIAL_APICID
   22.10 +#define xapic_phys_to_log_apicid(phys_apic) ( (1ul << ((phys_apic) & 0x3)) |\
   22.11 +		((phys_apic<<2) & (~0xf)) )
   22.12 +#elif CLUSTERED_APICID
   22.13 +#define xapic_phys_to_log_apicid(phys_apic) ( (1ul << ((phys_apic) & 0x3)) |\
   22.14 +		((phys_apic) & (~0xf)) )
   22.15 +#endif
   22.16 +
   22.17 +#define NO_BALANCE_IRQ (1)
   22.18 +#define esr_disable (1)
   22.19 +
   22.20 +#define NO_IOAPIC_CHECK (0)
   22.21 +
   22.22 +static inline int apic_id_registered(void)
   22.23 +{
   22.24 +	return (1);
   22.25 +}
   22.26 +
   22.27 +#define APIC_DFR_VALUE	(APIC_DFR_CLUSTER)
   22.28 +/* Round robin the irqs amoung the online cpus */
   22.29 +static inline cpumask_t target_cpus(void)
   22.30 +{ 
   22.31 +	static unsigned long cpu = NR_CPUS;
   22.32 +	do {
   22.33 +		if (cpu >= NR_CPUS)
   22.34 +			cpu = first_cpu(cpu_online_map);
   22.35 +		else
   22.36 +			cpu = next_cpu(cpu, cpu_online_map);
   22.37 +	} while (cpu >= NR_CPUS);
   22.38 +	return cpumask_of_cpu(cpu);
   22.39 +}
   22.40 +#define TARGET_CPUS	(target_cpus())
   22.41 +
   22.42 +#define INT_DELIVERY_MODE dest_Fixed
   22.43 +#define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
   22.44 +
   22.45 +static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
   22.46 +{
   22.47 +	return 0;
   22.48 +}
   22.49 +
   22.50 +/* we don't use the phys_cpu_present_map to indicate apicid presence */
   22.51 +static inline unsigned long check_apicid_present(int bit) 
   22.52 +{
   22.53 +	return 1;
   22.54 +}
   22.55 +
   22.56 +#define apicid_cluster(apicid) (apicid & 0xF0)
   22.57 +
   22.58 +static inline unsigned long calculate_ldr(unsigned long old)
   22.59 +{
   22.60 +	unsigned long id;
   22.61 +	id = xapic_phys_to_log_apicid(hard_smp_processor_id());
   22.62 +	return ((old & ~APIC_LDR_MASK) | SET_APIC_LOGICAL_ID(id));
   22.63 +}
   22.64 +
   22.65 +/*
   22.66 + * Set up the logical destination ID.
   22.67 + *
   22.68 + * Intel recommends to set DFR, LDR and TPR before enabling
   22.69 + * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
   22.70 + * document number 292116).  So here it goes...
   22.71 + */
   22.72 +static inline void init_apic_ldr(void)
   22.73 +{
   22.74 +	unsigned long val;
   22.75 +
   22.76 +	apic_write_around(APIC_DFR, APIC_DFR_VALUE);
   22.77 +	val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
   22.78 +	val = calculate_ldr(val);
   22.79 +	apic_write_around(APIC_LDR, val);
   22.80 +}
   22.81 +
   22.82 +static inline void clustered_apic_check(void)
   22.83 +{
   22.84 +	printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
   22.85 +		"Cluster", nr_ioapics);
   22.86 +}
   22.87 +
   22.88 +static inline int multi_timer_check(int apic, int irq)
   22.89 +{
   22.90 +	return 0;
   22.91 +}
   22.92 +
   22.93 +static inline int apicid_to_node(int logical_apicid)
   22.94 +{
   22.95 +	return 0;
   22.96 +}
   22.97 +
   22.98 +extern u8 bios_cpu_apicid[];
   22.99 +
  22.100 +static inline int cpu_present_to_apicid(int mps_cpu)
  22.101 +{
  22.102 +	if (mps_cpu < NR_CPUS)
  22.103 +		return (int)bios_cpu_apicid[mps_cpu];
  22.104 +	else
  22.105 +		return BAD_APICID;
  22.106 +}
  22.107 +
  22.108 +static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
  22.109 +{
  22.110 +	return physid_mask_of_physid(phys_apicid);
  22.111 +}
  22.112 +
  22.113 +extern u8 cpu_2_logical_apicid[];
  22.114 +/* Mapping from cpu number to logical apicid */
  22.115 +static inline int cpu_to_logical_apicid(int cpu)
  22.116 +{
  22.117 +       if (cpu >= NR_CPUS)
  22.118 +	       return BAD_APICID;
  22.119 +       return (int)cpu_2_logical_apicid[cpu];
  22.120 + }
  22.121 +
  22.122 +static inline int mpc_apic_id(struct mpc_config_processor *m,
  22.123 +			struct mpc_config_translation *translation_record)
  22.124 +{
  22.125 +	printk("Processor #%d %d:%d APIC version %d\n",
  22.126 +	        m->mpc_apicid,
  22.127 +	        (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
  22.128 +	        (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
  22.129 +	        m->mpc_apicver);
  22.130 +	return m->mpc_apicid;
  22.131 +}
  22.132 +
  22.133 +static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
  22.134 +{
  22.135 +	/* For clustered we don't have a good way to do this yet - hack */
  22.136 +	return physids_promote(0xFUL);
  22.137 +}
  22.138 +
  22.139 +#define WAKE_SECONDARY_VIA_INIT
  22.140 +
  22.141 +static inline void setup_portio_remap(void)
  22.142 +{
  22.143 +}
  22.144 +
  22.145 +static inline void enable_apic_mode(void)
  22.146 +{
  22.147 +}
  22.148 +
  22.149 +static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
  22.150 +{
  22.151 +	return (1);
  22.152 +}
  22.153 +
  22.154 +/* As we are using single CPU as destination, pick only one CPU here */
  22.155 +static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
  22.156 +{
  22.157 +	int cpu;
  22.158 +	int apicid;	
  22.159 +
  22.160 +	cpu = first_cpu(cpumask);
  22.161 +	apicid = cpu_to_logical_apicid(cpu);
  22.162 +	return apicid;
  22.163 +}
  22.164 +
  22.165 +static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
  22.166 +{
  22.167 +	return cpuid_apic >> index_msb;
  22.168 +}
  22.169 +
  22.170 +#endif /* __ASM_MACH_APIC_H */
    23.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    23.2 +++ b/xen/include/asm-x86/mach-bigsmp/mach_apicdef.h	Wed May 25 17:29:20 2005 +0000
    23.3 @@ -0,0 +1,13 @@
    23.4 +#ifndef __ASM_MACH_APICDEF_H
    23.5 +#define __ASM_MACH_APICDEF_H
    23.6 +
    23.7 +#define		APIC_ID_MASK		(0x0F<<24)
    23.8 +
    23.9 +static inline unsigned get_apic_id(unsigned long x) 
   23.10 +{ 
   23.11 +	return (((x)>>24)&0x0F);
   23.12 +} 
   23.13 +
   23.14 +#define		GET_APIC_ID(x)	get_apic_id(x)
   23.15 +
   23.16 +#endif
    24.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    24.2 +++ b/xen/include/asm-x86/mach-bigsmp/mach_ipi.h	Wed May 25 17:29:20 2005 +0000
    24.3 @@ -0,0 +1,25 @@
    24.4 +#ifndef __ASM_MACH_IPI_H
    24.5 +#define __ASM_MACH_IPI_H
    24.6 +
    24.7 +void send_IPI_mask_sequence(cpumask_t mask, int vector);
    24.8 +
    24.9 +static inline void send_IPI_mask(cpumask_t mask, int vector)
   24.10 +{
   24.11 +	send_IPI_mask_sequence(mask, vector);
   24.12 +}
   24.13 +
   24.14 +static inline void send_IPI_allbutself(int vector)
   24.15 +{
   24.16 +	cpumask_t mask = cpu_online_map;
   24.17 +	cpu_clear(smp_processor_id(), mask);
   24.18 +
   24.19 +	if (!cpus_empty(mask))
   24.20 +		send_IPI_mask(mask, vector);
   24.21 +}
   24.22 +
   24.23 +static inline void send_IPI_all(int vector)
   24.24 +{
   24.25 +	send_IPI_mask(cpu_online_map, vector);
   24.26 +}
   24.27 +
   24.28 +#endif /* __ASM_MACH_IPI_H */
    25.1 --- a/xen/include/asm-x86/mach-default/apm.h	Wed May 25 17:19:19 2005 +0000
    25.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    25.3 @@ -1,75 +0,0 @@
    25.4 -/*
    25.5 - *  include/asm-i386/mach-default/apm.h
    25.6 - *
    25.7 - *  Machine specific APM BIOS functions for generic.
    25.8 - *  Split out from apm.c by Osamu Tomita <tomita@cinet.co.jp>
    25.9 - */
   25.10 -
   25.11 -#ifndef _ASM_APM_H
   25.12 -#define _ASM_APM_H
   25.13 -
   25.14 -#ifdef APM_ZERO_SEGS
   25.15 -#	define APM_DO_ZERO_SEGS \
   25.16 -		"pushl %%ds\n\t" \
   25.17 -		"pushl %%es\n\t" \
   25.18 -		"xorl %%edx, %%edx\n\t" \
   25.19 -		"mov %%dx, %%ds\n\t" \
   25.20 -		"mov %%dx, %%es\n\t" \
   25.21 -		"mov %%dx, %%fs\n\t" \
   25.22 -		"mov %%dx, %%gs\n\t"
   25.23 -#	define APM_DO_POP_SEGS \
   25.24 -		"popl %%es\n\t" \
   25.25 -		"popl %%ds\n\t"
   25.26 -#else
   25.27 -#	define APM_DO_ZERO_SEGS
   25.28 -#	define APM_DO_POP_SEGS
   25.29 -#endif
   25.30 -
   25.31 -static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in,
   25.32 -					u32 *eax, u32 *ebx, u32 *ecx,
   25.33 -					u32 *edx, u32 *esi)
   25.34 -{
   25.35 -	/*
   25.36 -	 * N.B. We do NOT need a cld after the BIOS call
   25.37 -	 * because we always save and restore the flags.
   25.38 -	 */
   25.39 -	__asm__ __volatile__(APM_DO_ZERO_SEGS
   25.40 -		"pushl %%edi\n\t"
   25.41 -		"pushl %%ebp\n\t"
   25.42 -		"lcall *%%cs:apm_bios_entry\n\t"
   25.43 -		"setc %%al\n\t"
   25.44 -		"popl %%ebp\n\t"
   25.45 -		"popl %%edi\n\t"
   25.46 -		APM_DO_POP_SEGS
   25.47 -		: "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx),
   25.48 -		  "=S" (*esi)
   25.49 -		: "a" (func), "b" (ebx_in), "c" (ecx_in)
   25.50 -		: "memory", "cc");
   25.51 -}
   25.52 -
   25.53 -static inline u8 apm_bios_call_simple_asm(u32 func, u32 ebx_in,
   25.54 -						u32 ecx_in, u32 *eax)
   25.55 -{
   25.56 -	int	cx, dx, si;
   25.57 -	u8	error;
   25.58 -
   25.59 -	/*
   25.60 -	 * N.B. We do NOT need a cld after the BIOS call
   25.61 -	 * because we always save and restore the flags.
   25.62 -	 */
   25.63 -	__asm__ __volatile__(APM_DO_ZERO_SEGS
   25.64 -		"pushl %%edi\n\t"
   25.65 -		"pushl %%ebp\n\t"
   25.66 -		"lcall *%%cs:apm_bios_entry\n\t"
   25.67 -		"setc %%bl\n\t"
   25.68 -		"popl %%ebp\n\t"
   25.69 -		"popl %%edi\n\t"
   25.70 -		APM_DO_POP_SEGS
   25.71 -		: "=a" (*eax), "=b" (error), "=c" (cx), "=d" (dx),
   25.72 -		  "=S" (si)
   25.73 -		: "a" (func), "b" (ebx_in), "c" (ecx_in)
   25.74 -		: "memory", "cc");
   25.75 -	return error;
   25.76 -}
   25.77 -
   25.78 -#endif /* _ASM_APM_H */
    26.1 --- a/xen/include/asm-x86/mach-default/do_timer.h	Wed May 25 17:19:19 2005 +0000
    26.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    26.3 @@ -1,85 +0,0 @@
    26.4 -/* defines for inline arch setup functions */
    26.5 -
    26.6 -#include <asm/apic.h>
    26.7 -
    26.8 -/**
    26.9 - * do_timer_interrupt_hook - hook into timer tick
   26.10 - * @regs:	standard registers from interrupt
   26.11 - *
   26.12 - * Description:
   26.13 - *	This hook is called immediately after the timer interrupt is ack'd.
   26.14 - *	It's primary purpose is to allow architectures that don't possess
   26.15 - *	individual per CPU clocks (like the CPU APICs supply) to broadcast the
   26.16 - *	timer interrupt as a means of triggering reschedules etc.
   26.17 - **/
   26.18 -
   26.19 -static inline void do_timer_interrupt_hook(struct pt_regs *regs)
   26.20 -{
   26.21 -	do_timer(regs);
   26.22 -#ifndef CONFIG_SMP
   26.23 -	update_process_times(user_mode(regs));
   26.24 -#endif
   26.25 -/*
   26.26 - * In the SMP case we use the local APIC timer interrupt to do the
   26.27 - * profiling, except when we simulate SMP mode on a uniprocessor
   26.28 - * system, in that case we have to call the local interrupt handler.
   26.29 - */
   26.30 -#ifndef CONFIG_X86_LOCAL_APIC
   26.31 -	profile_tick(CPU_PROFILING, regs);
   26.32 -#else
   26.33 -	if (!using_apic_timer)
   26.34 -		smp_local_timer_interrupt(regs);
   26.35 -#endif
   26.36 -}
   26.37 -
   26.38 -
   26.39 -/* you can safely undefine this if you don't have the Neptune chipset */
   26.40 -
   26.41 -#define BUGGY_NEPTUN_TIMER
   26.42 -
   26.43 -/**
   26.44 - * do_timer_overflow - process a detected timer overflow condition
   26.45 - * @count:	hardware timer interrupt count on overflow
   26.46 - *
   26.47 - * Description:
   26.48 - *	This call is invoked when the jiffies count has not incremented but
   26.49 - *	the hardware timer interrupt has.  It means that a timer tick interrupt
   26.50 - *	came along while the previous one was pending, thus a tick was missed
   26.51 - **/
   26.52 -static inline int do_timer_overflow(int count)
   26.53 -{
   26.54 -	int i;
   26.55 -
   26.56 -	spin_lock(&i8259A_lock);
   26.57 -	/*
   26.58 -	 * This is tricky when I/O APICs are used;
   26.59 -	 * see do_timer_interrupt().
   26.60 -	 */
   26.61 -	i = inb(0x20);
   26.62 -	spin_unlock(&i8259A_lock);
   26.63 -	
   26.64 -	/* assumption about timer being IRQ0 */
   26.65 -	if (i & 0x01) {
   26.66 -		/*
   26.67 -		 * We cannot detect lost timer interrupts ... 
   26.68 -		 * well, that's why we call them lost, don't we? :)
   26.69 -		 * [hmm, on the Pentium and Alpha we can ... sort of]
   26.70 -		 */
   26.71 -		count -= LATCH;
   26.72 -	} else {
   26.73 -#ifdef BUGGY_NEPTUN_TIMER
   26.74 -		/*
   26.75 -		 * for the Neptun bug we know that the 'latch'
   26.76 -		 * command doesn't latch the high and low value
   26.77 -		 * of the counter atomically. Thus we have to 
   26.78 -		 * substract 256 from the counter 
   26.79 -		 * ... funny, isnt it? :)
   26.80 -		 */
   26.81 -		
   26.82 -		count -= 256;
   26.83 -#else
   26.84 -		printk("do_slow_gettimeoffset(): hardware timer problem?\n");
   26.85 -#endif
   26.86 -	}
   26.87 -	return count;
   26.88 -}
    27.1 --- a/xen/include/asm-x86/mach-default/entry_arch.h	Wed May 25 17:19:19 2005 +0000
    27.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    27.3 @@ -1,34 +0,0 @@
    27.4 -/*
    27.5 - * This file is designed to contain the BUILD_INTERRUPT specifications for
    27.6 - * all of the extra named interrupt vectors used by the architecture.
    27.7 - * Usually this is the Inter Process Interrupts (IPIs)
    27.8 - */
    27.9 -
   27.10 -/*
   27.11 - * The following vectors are part of the Linux architecture, there
   27.12 - * is no hardware IRQ pin equivalent for them, they are triggered
   27.13 - * through the ICC by us (IPIs)
   27.14 - */
   27.15 -#ifdef CONFIG_X86_SMP
   27.16 -BUILD_INTERRUPT(reschedule_interrupt,RESCHEDULE_VECTOR)
   27.17 -BUILD_INTERRUPT(invalidate_interrupt,INVALIDATE_TLB_VECTOR)
   27.18 -BUILD_INTERRUPT(call_function_interrupt,CALL_FUNCTION_VECTOR)
   27.19 -#endif
   27.20 -
   27.21 -/*
   27.22 - * every pentium local APIC has two 'local interrupts', with a
   27.23 - * soft-definable vector attached to both interrupts, one of
   27.24 - * which is a timer interrupt, the other one is error counter
   27.25 - * overflow. Linux uses the local APIC timer interrupt to get
   27.26 - * a much simpler SMP time architecture:
   27.27 - */
   27.28 -#ifdef CONFIG_X86_LOCAL_APIC
   27.29 -BUILD_INTERRUPT(apic_timer_interrupt,LOCAL_TIMER_VECTOR)
   27.30 -BUILD_INTERRUPT(error_interrupt,ERROR_APIC_VECTOR)
   27.31 -BUILD_INTERRUPT(spurious_interrupt,SPURIOUS_APIC_VECTOR)
   27.32 -
   27.33 -#ifdef CONFIG_X86_MCE_P4THERMAL
   27.34 -BUILD_INTERRUPT(thermal_interrupt,THERMAL_APIC_VECTOR)
   27.35 -#endif
   27.36 -
   27.37 -#endif
    28.1 --- a/xen/include/asm-x86/mach-default/irq_vectors_limits.h	Wed May 25 17:19:19 2005 +0000
    28.2 +++ b/xen/include/asm-x86/mach-default/irq_vectors_limits.h	Wed May 25 17:29:20 2005 +0000
    28.3 @@ -1,21 +1,7 @@
    28.4  #ifndef _ASM_IRQ_VECTORS_LIMITS_H
    28.5  #define _ASM_IRQ_VECTORS_LIMITS_H
    28.6  
    28.7 -#ifdef CONFIG_PCI_MSI
    28.8 -#define NR_IRQS FIRST_SYSTEM_VECTOR
    28.9 +#define NR_IRQS        224
   28.10  #define NR_IRQ_VECTORS NR_IRQS
   28.11 -#else
   28.12 -#ifdef CONFIG_X86_IO_APIC
   28.13 -#define NR_IRQS 224
   28.14 -# if (224 >= 32 * NR_CPUS)
   28.15 -# define NR_IRQ_VECTORS NR_IRQS
   28.16 -# else
   28.17 -# define NR_IRQ_VECTORS (32 * NR_CPUS)
   28.18 -# endif
   28.19 -#else
   28.20 -#define NR_IRQS 16
   28.21 -#define NR_IRQ_VECTORS NR_IRQS
   28.22 -#endif
   28.23 -#endif
   28.24  
   28.25  #endif /* _ASM_IRQ_VECTORS_LIMITS_H */
    29.1 --- a/xen/include/asm-x86/mach-default/mach_mpspec.h	Wed May 25 17:19:19 2005 +0000
    29.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    29.3 @@ -1,8 +0,0 @@
    29.4 -#ifndef __ASM_MACH_MPSPEC_H
    29.5 -#define __ASM_MACH_MPSPEC_H
    29.6 -
    29.7 -#define MAX_IRQ_SOURCES 256
    29.8 -
    29.9 -#define MAX_MP_BUSSES 32
   29.10 -
   29.11 -#endif /* __ASM_MACH_MPSPEC_H */
    30.1 --- a/xen/include/asm-x86/mach-default/mach_reboot.h	Wed May 25 17:19:19 2005 +0000
    30.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    30.3 @@ -1,30 +0,0 @@
    30.4 -/*
    30.5 - *  arch/i386/mach-generic/mach_reboot.h
    30.6 - *
    30.7 - *  Machine specific reboot functions for generic.
    30.8 - *  Split out from reboot.c by Osamu Tomita <tomita@cinet.co.jp>
    30.9 - */
   30.10 -#ifndef _MACH_REBOOT_H
   30.11 -#define _MACH_REBOOT_H
   30.12 -
   30.13 -static inline void kb_wait(void)
   30.14 -{
   30.15 -	int i;
   30.16 -
   30.17 -	for (i = 0; i < 0x10000; i++)
   30.18 -		if ((inb_p(0x64) & 0x02) == 0)
   30.19 -			break;
   30.20 -}
   30.21 -
   30.22 -static inline void mach_reboot(void)
   30.23 -{
   30.24 -	int i;
   30.25 -	for (i = 0; i < 100; i++) {
   30.26 -		kb_wait();
   30.27 -		udelay(50);
   30.28 -		outb(0xfe, 0x64);         /* pulse reset low */
   30.29 -		udelay(50);
   30.30 -	}
   30.31 -}
   30.32 -
   30.33 -#endif /* !_MACH_REBOOT_H */
    31.1 --- a/xen/include/asm-x86/mach-default/mach_time.h	Wed May 25 17:19:19 2005 +0000
    31.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    31.3 @@ -1,122 +0,0 @@
    31.4 -/*
    31.5 - *  include/asm-i386/mach-default/mach_time.h
    31.6 - *
    31.7 - *  Machine specific set RTC function for generic.
    31.8 - *  Split out from time.c by Osamu Tomita <tomita@cinet.co.jp>
    31.9 - */
   31.10 -#ifndef _MACH_TIME_H
   31.11 -#define _MACH_TIME_H
   31.12 -
   31.13 -#include <linux/mc146818rtc.h>
   31.14 -
   31.15 -/* for check timing call set_rtc_mmss() 500ms     */
   31.16 -/* used in arch/i386/time.c::do_timer_interrupt() */
   31.17 -#define USEC_AFTER	500000
   31.18 -#define USEC_BEFORE	500000
   31.19 -
   31.20 -/*
   31.21 - * In order to set the CMOS clock precisely, set_rtc_mmss has to be
   31.22 - * called 500 ms after the second nowtime has started, because when
   31.23 - * nowtime is written into the registers of the CMOS clock, it will
   31.24 - * jump to the next second precisely 500 ms later. Check the Motorola
   31.25 - * MC146818A or Dallas DS12887 data sheet for details.
   31.26 - *
   31.27 - * BUG: This routine does not handle hour overflow properly; it just
   31.28 - *      sets the minutes. Usually you'll only notice that after reboot!
   31.29 - */
   31.30 -static inline int mach_set_rtc_mmss(unsigned long nowtime)
   31.31 -{
   31.32 -	int retval = 0;
   31.33 -	int real_seconds, real_minutes, cmos_minutes;
   31.34 -	unsigned char save_control, save_freq_select;
   31.35 -
   31.36 -	save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
   31.37 -	CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
   31.38 -
   31.39 -	save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
   31.40 -	CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
   31.41 -
   31.42 -	cmos_minutes = CMOS_READ(RTC_MINUTES);
   31.43 -	if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
   31.44 -		BCD_TO_BIN(cmos_minutes);
   31.45 -
   31.46 -	/*
   31.47 -	 * since we're only adjusting minutes and seconds,
   31.48 -	 * don't interfere with hour overflow. This avoids
   31.49 -	 * messing with unknown time zones but requires your
   31.50 -	 * RTC not to be off by more than 15 minutes
   31.51 -	 */
   31.52 -	real_seconds = nowtime % 60;
   31.53 -	real_minutes = nowtime / 60;
   31.54 -	if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
   31.55 -		real_minutes += 30;		/* correct for half hour time zone */
   31.56 -	real_minutes %= 60;
   31.57 -
   31.58 -	if (abs(real_minutes - cmos_minutes) < 30) {
   31.59 -		if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
   31.60 -			BIN_TO_BCD(real_seconds);
   31.61 -			BIN_TO_BCD(real_minutes);
   31.62 -		}
   31.63 -		CMOS_WRITE(real_seconds,RTC_SECONDS);
   31.64 -		CMOS_WRITE(real_minutes,RTC_MINUTES);
   31.65 -	} else {
   31.66 -		printk(KERN_WARNING
   31.67 -		       "set_rtc_mmss: can't update from %d to %d\n",
   31.68 -		       cmos_minutes, real_minutes);
   31.69 -		retval = -1;
   31.70 -	}
   31.71 -
   31.72 -	/* The following flags have to be released exactly in this order,
   31.73 -	 * otherwise the DS12887 (popular MC146818A clone with integrated
   31.74 -	 * battery and quartz) will not reset the oscillator and will not
   31.75 -	 * update precisely 500 ms later. You won't find this mentioned in
   31.76 -	 * the Dallas Semiconductor data sheets, but who believes data
   31.77 -	 * sheets anyway ...                           -- Markus Kuhn
   31.78 -	 */
   31.79 -	CMOS_WRITE(save_control, RTC_CONTROL);
   31.80 -	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
   31.81 -
   31.82 -	return retval;
   31.83 -}
   31.84 -
   31.85 -static inline unsigned long mach_get_cmos_time(void)
   31.86 -{
   31.87 -	unsigned int year, mon, day, hour, min, sec;
   31.88 -	int i;
   31.89 -
   31.90 -	/* The Linux interpretation of the CMOS clock register contents:
   31.91 -	 * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
   31.92 -	 * RTC registers show the second which has precisely just started.
   31.93 -	 * Let's hope other operating systems interpret the RTC the same way.
   31.94 -	 */
   31.95 -	/* read RTC exactly on falling edge of update flag */
   31.96 -	for (i = 0 ; i < 1000000 ; i++)	/* may take up to 1 second... */
   31.97 -		if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
   31.98 -			break;
   31.99 -	for (i = 0 ; i < 1000000 ; i++)	/* must try at least 2.228 ms */
  31.100 -		if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
  31.101 -			break;
  31.102 -	do { /* Isn't this overkill ? UIP above should guarantee consistency */
  31.103 -		sec = CMOS_READ(RTC_SECONDS);
  31.104 -		min = CMOS_READ(RTC_MINUTES);
  31.105 -		hour = CMOS_READ(RTC_HOURS);
  31.106 -		day = CMOS_READ(RTC_DAY_OF_MONTH);
  31.107 -		mon = CMOS_READ(RTC_MONTH);
  31.108 -		year = CMOS_READ(RTC_YEAR);
  31.109 -	} while (sec != CMOS_READ(RTC_SECONDS));
  31.110 -	if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
  31.111 -	  {
  31.112 -	    BCD_TO_BIN(sec);
  31.113 -	    BCD_TO_BIN(min);
  31.114 -	    BCD_TO_BIN(hour);
  31.115 -	    BCD_TO_BIN(day);
  31.116 -	    BCD_TO_BIN(mon);
  31.117 -	    BCD_TO_BIN(year);
  31.118 -	  }
  31.119 -	if ((year += 1900) < 1970)
  31.120 -		year += 100;
  31.121 -
  31.122 -	return mktime(year, mon, day, hour, min, sec);
  31.123 -}
  31.124 -
  31.125 -#endif /* !_MACH_TIME_H */
    32.1 --- a/xen/include/asm-x86/mach-default/mach_timer.h	Wed May 25 17:19:19 2005 +0000
    32.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    32.3 @@ -1,48 +0,0 @@
    32.4 -/*
    32.5 - *  include/asm-i386/mach-default/mach_timer.h
    32.6 - *
    32.7 - *  Machine specific calibrate_tsc() for generic.
    32.8 - *  Split out from timer_tsc.c by Osamu Tomita <tomita@cinet.co.jp>
    32.9 - */
   32.10 -/* ------ Calibrate the TSC ------- 
   32.11 - * Return 2^32 * (1 / (TSC clocks per usec)) for do_fast_gettimeoffset().
   32.12 - * Too much 64-bit arithmetic here to do this cleanly in C, and for
   32.13 - * accuracy's sake we want to keep the overhead on the CTC speaker (channel 2)
   32.14 - * output busy loop as low as possible. We avoid reading the CTC registers
   32.15 - * directly because of the awkward 8-bit access mechanism of the 82C54
   32.16 - * device.
   32.17 - */
   32.18 -#ifndef _MACH_TIMER_H
   32.19 -#define _MACH_TIMER_H
   32.20 -
   32.21 -#define CALIBRATE_LATCH	(5 * LATCH)
   32.22 -
   32.23 -static inline void mach_prepare_counter(void)
   32.24 -{
   32.25 -       /* Set the Gate high, disable speaker */
   32.26 -	outb((inb(0x61) & ~0x02) | 0x01, 0x61);
   32.27 -
   32.28 -	/*
   32.29 -	 * Now let's take care of CTC channel 2
   32.30 -	 *
   32.31 -	 * Set the Gate high, program CTC channel 2 for mode 0,
   32.32 -	 * (interrupt on terminal count mode), binary count,
   32.33 -	 * load 5 * LATCH count, (LSB and MSB) to begin countdown.
   32.34 -	 *
   32.35 -	 * Some devices need a delay here.
   32.36 -	 */
   32.37 -	outb(0xb0, 0x43);			/* binary, mode 0, LSB/MSB, Ch 2 */
   32.38 -	outb_p(CALIBRATE_LATCH & 0xff, 0x42);	/* LSB of count */
   32.39 -	outb_p(CALIBRATE_LATCH >> 8, 0x42);       /* MSB of count */
   32.40 -}
   32.41 -
   32.42 -static inline void mach_countup(unsigned long *count_p)
   32.43 -{
   32.44 -	unsigned long count = 0;
   32.45 -	do {
   32.46 -		count++;
   32.47 -	} while ((inb_p(0x61) & 0x20) == 0);
   32.48 -	*count_p = count;
   32.49 -}
   32.50 -
   32.51 -#endif /* !_MACH_TIMER_H */
    33.1 --- a/xen/include/asm-x86/mach-default/mach_traps.h	Wed May 25 17:19:19 2005 +0000
    33.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    33.3 @@ -1,29 +0,0 @@
    33.4 -/*
    33.5 - *  include/asm-i386/mach-default/mach_traps.h
    33.6 - *
    33.7 - *  Machine specific NMI handling for generic.
    33.8 - *  Split out from traps.c by Osamu Tomita <tomita@cinet.co.jp>
    33.9 - */
   33.10 -#ifndef _MACH_TRAPS_H
   33.11 -#define _MACH_TRAPS_H
   33.12 -
   33.13 -static inline void clear_mem_error(unsigned char reason)
   33.14 -{
   33.15 -	reason = (reason & 0xf) | 4;
   33.16 -	outb(reason, 0x61);
   33.17 -}
   33.18 -
   33.19 -static inline unsigned char get_nmi_reason(void)
   33.20 -{
   33.21 -	return inb(0x61);
   33.22 -}
   33.23 -
   33.24 -static inline void reassert_nmi(void)
   33.25 -{
   33.26 -	outb(0x8f, 0x70);
   33.27 -	inb(0x71);		/* dummy */
   33.28 -	outb(0x0f, 0x70);
   33.29 -	inb(0x71);		/* dummy */
   33.30 -}
   33.31 -
   33.32 -#endif /* !_MACH_TRAPS_H */
    34.1 --- a/xen/include/asm-x86/mach-default/pci-functions.h	Wed May 25 17:19:19 2005 +0000
    34.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    34.3 @@ -1,19 +0,0 @@
    34.4 -/*
    34.5 - *	PCI BIOS function numbering for conventional PCI BIOS 
    34.6 - *	systems
    34.7 - */
    34.8 -
    34.9 -#define PCIBIOS_PCI_FUNCTION_ID 	0xb1XX
   34.10 -#define PCIBIOS_PCI_BIOS_PRESENT 	0xb101
   34.11 -#define PCIBIOS_FIND_PCI_DEVICE		0xb102
   34.12 -#define PCIBIOS_FIND_PCI_CLASS_CODE	0xb103
   34.13 -#define PCIBIOS_GENERATE_SPECIAL_CYCLE	0xb106
   34.14 -#define PCIBIOS_READ_CONFIG_BYTE	0xb108
   34.15 -#define PCIBIOS_READ_CONFIG_WORD	0xb109
   34.16 -#define PCIBIOS_READ_CONFIG_DWORD	0xb10a
   34.17 -#define PCIBIOS_WRITE_CONFIG_BYTE	0xb10b
   34.18 -#define PCIBIOS_WRITE_CONFIG_WORD	0xb10c
   34.19 -#define PCIBIOS_WRITE_CONFIG_DWORD	0xb10d
   34.20 -#define PCIBIOS_GET_ROUTING_OPTIONS	0xb10e
   34.21 -#define PCIBIOS_SET_PCI_HW_INT		0xb10f
   34.22 -
    35.1 --- a/xen/include/asm-x86/mach-default/setup_arch_post.h	Wed May 25 17:19:19 2005 +0000
    35.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    35.3 @@ -1,40 +0,0 @@
    35.4 -/**
    35.5 - * machine_specific_memory_setup - Hook for machine specific memory setup.
    35.6 - *
    35.7 - * Description:
    35.8 - *	This is included late in kernel/setup.c so that it can make
    35.9 - *	use of all of the static functions.
   35.10 - **/
   35.11 -
   35.12 -static char * __init machine_specific_memory_setup(void)
   35.13 -{
   35.14 -	char *who;
   35.15 -
   35.16 -
   35.17 -	who = "BIOS-e820";
   35.18 -
   35.19 -	/*
   35.20 -	 * Try to copy the BIOS-supplied E820-map.
   35.21 -	 *
   35.22 -	 * Otherwise fake a memory map; one section from 0k->640k,
   35.23 -	 * the next section from 1mb->appropriate_mem_k
   35.24 -	 */
   35.25 -	sanitize_e820_map(E820_MAP, &E820_MAP_NR);
   35.26 -	if (copy_e820_map(E820_MAP, E820_MAP_NR) < 0) {
   35.27 -		unsigned long mem_size;
   35.28 -
   35.29 -		/* compare results from other methods and take the greater */
   35.30 -		if (ALT_MEM_K < EXT_MEM_K) {
   35.31 -			mem_size = EXT_MEM_K;
   35.32 -			who = "BIOS-88";
   35.33 -		} else {
   35.34 -			mem_size = ALT_MEM_K;
   35.35 -			who = "BIOS-e801";
   35.36 -		}
   35.37 -
   35.38 -		e820.nr_map = 0;
   35.39 -		add_memory_region(0, LOWMEMSIZE(), E820_RAM);
   35.40 -		add_memory_region(HIGH_MEMORY, mem_size << 10, E820_RAM);
   35.41 -  	}
   35.42 -	return who;
   35.43 -}
    36.1 --- a/xen/include/asm-x86/mach-default/setup_arch_pre.h	Wed May 25 17:19:19 2005 +0000
    36.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
    36.3 @@ -1,5 +0,0 @@
    36.4 -/* Hook to call BIOS initialisation function */
    36.5 -
    36.6 -/* no action for generic */
    36.7 -
    36.8 -#define ARCH_SETUP
    37.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    37.2 +++ b/xen/include/asm-x86/mach-es7000/mach_apic.h	Wed May 25 17:29:20 2005 +0000
    37.3 @@ -0,0 +1,207 @@
    37.4 +#ifndef __ASM_MACH_APIC_H
    37.5 +#define __ASM_MACH_APIC_H
    37.6 +
    37.7 +extern u8 bios_cpu_apicid[];
    37.8 +
    37.9 +#define xapic_phys_to_log_apicid(cpu) (bios_cpu_apicid[cpu])
   37.10 +#define esr_disable (1)
   37.11 +
   37.12 +static inline int apic_id_registered(void)
   37.13 +{
   37.14 +	        return (1);
   37.15 +}
   37.16 +
   37.17 +static inline cpumask_t target_cpus(void)
   37.18 +{ 
   37.19 +#if defined CONFIG_ES7000_CLUSTERED_APIC
   37.20 +	return CPU_MASK_ALL;
   37.21 +#else
   37.22 +	return cpumask_of_cpu(smp_processor_id());
   37.23 +#endif
   37.24 +}
   37.25 +#define TARGET_CPUS	(target_cpus())
   37.26 +
   37.27 +#if defined CONFIG_ES7000_CLUSTERED_APIC
   37.28 +#define APIC_DFR_VALUE		(APIC_DFR_CLUSTER)
   37.29 +#define INT_DELIVERY_MODE	(dest_LowestPrio)
   37.30 +#define INT_DEST_MODE		(1)    /* logical delivery broadcast to all procs */
   37.31 +#define NO_BALANCE_IRQ 		(1)
   37.32 +#undef  WAKE_SECONDARY_VIA_INIT
   37.33 +#define WAKE_SECONDARY_VIA_MIP
   37.34 +#else
   37.35 +#define APIC_DFR_VALUE		(APIC_DFR_FLAT)
   37.36 +#define INT_DELIVERY_MODE	(dest_Fixed)
   37.37 +#define INT_DEST_MODE		(0)    /* phys delivery to target procs */
   37.38 +#define NO_BALANCE_IRQ 		(0)
   37.39 +#undef  APIC_DEST_LOGICAL
   37.40 +#define APIC_DEST_LOGICAL	0x0
   37.41 +#define WAKE_SECONDARY_VIA_INIT
   37.42 +#endif
   37.43 +
   37.44 +#define NO_IOAPIC_CHECK (1)
   37.45 +
   37.46 +static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
   37.47 +{ 
   37.48 +	return 0;
   37.49 +} 
   37.50 +static inline unsigned long check_apicid_present(int bit) 
   37.51 +{
   37.52 +	return physid_isset(bit, phys_cpu_present_map);
   37.53 +}
   37.54 +
   37.55 +#define apicid_cluster(apicid) (apicid & 0xF0)
   37.56 +
   37.57 +static inline unsigned long calculate_ldr(int cpu)
   37.58 +{
   37.59 +	unsigned long id;
   37.60 +	id = xapic_phys_to_log_apicid(cpu);
   37.61 +	return (SET_APIC_LOGICAL_ID(id));
   37.62 +}
   37.63 +
   37.64 +/*
   37.65 + * Set up the logical destination ID.
   37.66 + *
   37.67 + * Intel recommends to set DFR, LdR and TPR before enabling
   37.68 + * an APIC.  See e.g. "AP-388 82489DX User's Manual" (Intel
   37.69 + * document number 292116).  So here it goes...
   37.70 + */
   37.71 +static inline void init_apic_ldr(void)
   37.72 +{
   37.73 +	unsigned long val;
   37.74 +	int cpu = smp_processor_id();
   37.75 +
   37.76 +	apic_write_around(APIC_DFR, APIC_DFR_VALUE);
   37.77 +	val = calculate_ldr(cpu);
   37.78 +	apic_write_around(APIC_LDR, val);
   37.79 +}
   37.80 +
   37.81 +extern void es7000_sw_apic(void);
   37.82 +static inline void enable_apic_mode(void)
   37.83 +{
   37.84 +	es7000_sw_apic();
   37.85 +	return;
   37.86 +}
   37.87 +
   37.88 +extern int apic_version [MAX_APICS];
   37.89 +static inline void clustered_apic_check(void)
   37.90 +{
   37.91 +	int apic = bios_cpu_apicid[smp_processor_id()];
   37.92 +	printk("Enabling APIC mode:  %s.  Using %d I/O APICs, target cpus %lx\n",
   37.93 +		(apic_version[apic] == 0x14) ? 
   37.94 +		"Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]);
   37.95 +}
   37.96 +
   37.97 +static inline int multi_timer_check(int apic, int irq)
   37.98 +{
   37.99 +	return 0;
  37.100 +}
  37.101 +
  37.102 +static inline int apicid_to_node(int logical_apicid)
  37.103 +{
  37.104 +	return 0;
  37.105 +}
  37.106 +
  37.107 +
  37.108 +static inline int cpu_present_to_apicid(int mps_cpu)
  37.109 +{
  37.110 +	if (!mps_cpu)
  37.111 +		return boot_cpu_physical_apicid;
  37.112 +	else if (mps_cpu < NR_CPUS)
  37.113 +		return (int) bios_cpu_apicid[mps_cpu];
  37.114 +	else
  37.115 +		return BAD_APICID;
  37.116 +}
  37.117 +
  37.118 +static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
  37.119 +{
  37.120 +	static int id = 0;
  37.121 +	physid_mask_t mask;
  37.122 +	mask = physid_mask_of_physid(id);
  37.123 +	++id;
  37.124 +	return mask;
  37.125 +}
  37.126 +
  37.127 +extern u8 cpu_2_logical_apicid[];
  37.128 +/* Mapping from cpu number to logical apicid */
  37.129 +static inline int cpu_to_logical_apicid(int cpu)
  37.130 +{
  37.131 +       if (cpu >= NR_CPUS)
  37.132 +	       return BAD_APICID;
  37.133 +       return (int)cpu_2_logical_apicid[cpu];
  37.134 +}
  37.135 +
  37.136 +static inline int mpc_apic_id(struct mpc_config_processor *m, struct mpc_config_translation *unused)
  37.137 +{
  37.138 +	printk("Processor #%d %d:%d APIC version %d\n",
  37.139 +	        m->mpc_apicid,
  37.140 +	        (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
  37.141 +	        (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
  37.142 +	        m->mpc_apicver);
  37.143 +	return (m->mpc_apicid);
  37.144 +}
  37.145 +
  37.146 +static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
  37.147 +{
  37.148 +	/* For clustered we don't have a good way to do this yet - hack */
  37.149 +	return physids_promote(0xff);
  37.150 +}
  37.151 +
  37.152 +
  37.153 +static inline void setup_portio_remap(void)
  37.154 +{
  37.155 +}
  37.156 +
  37.157 +extern unsigned int boot_cpu_physical_apicid;
  37.158 +static inline int check_phys_apicid_present(int cpu_physical_apicid)
  37.159 +{
  37.160 +	boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
  37.161 +	return (1);
  37.162 +}
  37.163 +
  37.164 +static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
  37.165 +{
  37.166 +	int num_bits_set;
  37.167 +	int cpus_found = 0;
  37.168 +	int cpu;
  37.169 +	int apicid;	
  37.170 +
  37.171 +	num_bits_set = cpus_weight(cpumask);
  37.172 +	/* Return id to all */
  37.173 +	if (num_bits_set == NR_CPUS)
  37.174 +#if defined CONFIG_ES7000_CLUSTERED_APIC
  37.175 +		return 0xFF;
  37.176 +#else
  37.177 +		return cpu_to_logical_apicid(0);
  37.178 +#endif
  37.179 +	/* 
  37.180 +	 * The cpus in the mask must all be on the apic cluster.  If are not 
  37.181 +	 * on the same apicid cluster return default value of TARGET_CPUS. 
  37.182 +	 */
  37.183 +	cpu = first_cpu(cpumask);
  37.184 +	apicid = cpu_to_logical_apicid(cpu);
  37.185 +	while (cpus_found < num_bits_set) {
  37.186 +		if (cpu_isset(cpu, cpumask)) {
  37.187 +			int new_apicid = cpu_to_logical_apicid(cpu);
  37.188 +			if (apicid_cluster(apicid) != 
  37.189 +					apicid_cluster(new_apicid)){
  37.190 +				printk ("%s: Not a valid mask!\n",__FUNCTION__);
  37.191 +#if defined CONFIG_ES7000_CLUSTERED_APIC
  37.192 +				return 0xFF;
  37.193 +#else
  37.194 +				return cpu_to_logical_apicid(0);
  37.195 +#endif
  37.196 +			}
  37.197 +			apicid = new_apicid;
  37.198 +			cpus_found++;
  37.199 +		}
  37.200 +		cpu++;
  37.201 +	}
  37.202 +	return apicid;
  37.203 +}
  37.204 +
  37.205 +static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
  37.206 +{
  37.207 +	return cpuid_apic >> index_msb;
  37.208 +}
  37.209 +
  37.210 +#endif /* __ASM_MACH_APIC_H */
    38.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    38.2 +++ b/xen/include/asm-x86/mach-es7000/mach_apicdef.h	Wed May 25 17:29:20 2005 +0000
    38.3 @@ -0,0 +1,13 @@
    38.4 +#ifndef __ASM_MACH_APICDEF_H
    38.5 +#define __ASM_MACH_APICDEF_H
    38.6 +
    38.7 +#define		APIC_ID_MASK		(0xFF<<24)
    38.8 +
    38.9 +static inline unsigned get_apic_id(unsigned long x) 
   38.10 +{ 
   38.11 +	return (((x)>>24)&0xFF);
   38.12 +} 
   38.13 +
   38.14 +#define		GET_APIC_ID(x)	get_apic_id(x)
   38.15 +
   38.16 +#endif
    39.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    39.2 +++ b/xen/include/asm-x86/mach-es7000/mach_ipi.h	Wed May 25 17:29:20 2005 +0000
    39.3 @@ -0,0 +1,24 @@
    39.4 +#ifndef __ASM_MACH_IPI_H
    39.5 +#define __ASM_MACH_IPI_H
    39.6 +
    39.7 +void send_IPI_mask_sequence(cpumask_t mask, int vector);
    39.8 +
    39.9 +static inline void send_IPI_mask(cpumask_t mask, int vector)
   39.10 +{
   39.11 +	send_IPI_mask_sequence(mask, vector);
   39.12 +}
   39.13 +
   39.14 +static inline void send_IPI_allbutself(int vector)
   39.15 +{
   39.16 +	cpumask_t mask = cpu_online_map;
   39.17 +	cpu_clear(smp_processor_id(), mask);
   39.18 +	if (!cpus_empty(mask))
   39.19 +		send_IPI_mask(mask, vector);
   39.20 +}
   39.21 +
   39.22 +static inline void send_IPI_all(int vector)
   39.23 +{
   39.24 +	send_IPI_mask(cpu_online_map, vector);
   39.25 +}
   39.26 +
   39.27 +#endif /* __ASM_MACH_IPI_H */
    40.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    40.2 +++ b/xen/include/asm-x86/mach-es7000/mach_mpparse.h	Wed May 25 17:29:20 2005 +0000
    40.3 @@ -0,0 +1,41 @@
    40.4 +#ifndef __ASM_MACH_MPPARSE_H
    40.5 +#define __ASM_MACH_MPPARSE_H
    40.6 +
    40.7 +static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, 
    40.8 +				struct mpc_config_translation *translation)
    40.9 +{
   40.10 +	Dprintk("Bus #%d is %s\n", m->mpc_busid, name);
   40.11 +}
   40.12 +
   40.13 +static inline void mpc_oem_pci_bus(struct mpc_config_bus *m, 
   40.14 +				struct mpc_config_translation *translation)
   40.15 +{
   40.16 +}
   40.17 +
   40.18 +extern int parse_unisys_oem (char *oemptr, int oem_entries);
   40.19 +extern int find_unisys_acpi_oem_table(unsigned long *oem_addr, int *length);
   40.20 +
   40.21 +static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
   40.22 +		char *productid)
   40.23 +{
   40.24 +	if (mpc->mpc_oemptr) {
   40.25 +		struct mp_config_oemtable *oem_table = 
   40.26 +			(struct mp_config_oemtable *)mpc->mpc_oemptr;
   40.27 +		if (!strncmp(oem, "UNISYS", 6))
   40.28 +			return parse_unisys_oem((char *)oem_table, oem_table->oem_length);
   40.29 +	}
   40.30 +	return 0;
   40.31 +}
   40.32 +
   40.33 +/* Hook from generic ACPI tables.c */
   40.34 +static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
   40.35 +{
   40.36 +	unsigned long oem_addr; 
   40.37 +	int oem_entries;
   40.38 +	if (!find_unisys_acpi_oem_table(&oem_addr, &oem_entries))
   40.39 +		return parse_unisys_oem((char *)oem_addr, oem_entries);
   40.40 +	return 0;
   40.41 +}
   40.42 +
   40.43 +
   40.44 +#endif /* __ASM_MACH_MPPARSE_H */
    41.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    41.2 +++ b/xen/include/asm-x86/mach-es7000/mach_wakecpu.h	Wed May 25 17:29:20 2005 +0000
    41.3 @@ -0,0 +1,58 @@
    41.4 +#ifndef __ASM_MACH_WAKECPU_H
    41.5 +#define __ASM_MACH_WAKECPU_H
    41.6 +
    41.7 +/* 
    41.8 + * This file copes with machines that wakeup secondary CPUs by the
    41.9 + * INIT, INIT, STARTUP sequence.
   41.10 + */
   41.11 +
   41.12 +#ifdef CONFIG_ES7000_CLUSTERED_APIC
   41.13 +#define WAKE_SECONDARY_VIA_MIP
   41.14 +#else
   41.15 +#define WAKE_SECONDARY_VIA_INIT
   41.16 +#endif
   41.17 +
   41.18 +#ifdef WAKE_SECONDARY_VIA_MIP
   41.19 +extern int es7000_start_cpu(int cpu, unsigned long eip);
   41.20 +static inline int
   41.21 +wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
   41.22 +{
   41.23 +	int boot_error = 0;
   41.24 +	boot_error = es7000_start_cpu(phys_apicid, start_eip);
   41.25 +	return boot_error;
   41.26 +}
   41.27 +#endif
   41.28 +
   41.29 +#define TRAMPOLINE_LOW phys_to_virt(0x467)
   41.30 +#define TRAMPOLINE_HIGH phys_to_virt(0x469)
   41.31 +
   41.32 +#define boot_cpu_apicid boot_cpu_physical_apicid
   41.33 +
   41.34 +static inline void wait_for_init_deassert(atomic_t *deassert)
   41.35 +{
   41.36 +#ifdef WAKE_SECONDARY_VIA_INIT
   41.37 +	while (!atomic_read(deassert));
   41.38 +#endif
   41.39 +	return;
   41.40 +}
   41.41 +
   41.42 +/* Nothing to do for most platforms, since cleared by the INIT cycle */
   41.43 +static inline void smp_callin_clear_local_apic(void)
   41.44 +{
   41.45 +}
   41.46 +
   41.47 +static inline void store_NMI_vector(unsigned short *high, unsigned short *low)
   41.48 +{
   41.49 +}
   41.50 +
   41.51 +static inline void restore_NMI_vector(unsigned short *high, unsigned short *low)
   41.52 +{
   41.53 +}
   41.54 +
   41.55 +#if APIC_DEBUG
   41.56 + #define inquire_remote_apic(apicid) __inquire_remote_apic(apicid)
   41.57 +#else
   41.58 + #define inquire_remote_apic(apicid) {}
   41.59 +#endif
   41.60 +
   41.61 +#endif /* __ASM_MACH_WAKECPU_H */
    42.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    42.2 +++ b/xen/include/asm-x86/mach-generic/mach_apic.h	Wed May 25 17:29:20 2005 +0000
    42.3 @@ -0,0 +1,32 @@
    42.4 +#ifndef __ASM_MACH_APIC_H
    42.5 +#define __ASM_MACH_APIC_H
    42.6 +
    42.7 +#include <asm/genapic.h>
    42.8 +
    42.9 +#define esr_disable (genapic->ESR_DISABLE)
   42.10 +#define NO_BALANCE_IRQ (genapic->no_balance_irq)
   42.11 +#define NO_IOAPIC_CHECK	(genapic->no_ioapic_check)
   42.12 +#define INT_DELIVERY_MODE (genapic->int_delivery_mode)
   42.13 +#define INT_DEST_MODE (genapic->int_dest_mode)
   42.14 +#undef APIC_DEST_LOGICAL
   42.15 +#define APIC_DEST_LOGICAL (genapic->apic_destination_logical)
   42.16 +#define TARGET_CPUS	  (genapic->target_cpus())
   42.17 +#define apic_id_registered (genapic->apic_id_registered)
   42.18 +#define init_apic_ldr (genapic->init_apic_ldr)
   42.19 +#define ioapic_phys_id_map (genapic->ioapic_phys_id_map)
   42.20 +#define clustered_apic_check (genapic->clustered_apic_check) 
   42.21 +#define multi_timer_check (genapic->multi_timer_check)
   42.22 +#define apicid_to_node (genapic->apicid_to_node)
   42.23 +#define cpu_to_logical_apicid (genapic->cpu_to_logical_apicid) 
   42.24 +#define cpu_present_to_apicid (genapic->cpu_present_to_apicid)
   42.25 +#define apicid_to_cpu_present (genapic->apicid_to_cpu_present)
   42.26 +#define mpc_apic_id (genapic->mpc_apic_id) 
   42.27 +#define setup_portio_remap (genapic->setup_portio_remap)
   42.28 +#define check_apicid_present (genapic->check_apicid_present)
   42.29 +#define check_phys_apicid_present (genapic->check_phys_apicid_present)
   42.30 +#define check_apicid_used (genapic->check_apicid_used)
   42.31 +#define cpu_mask_to_apicid (genapic->cpu_mask_to_apicid)
   42.32 +#define enable_apic_mode (genapic->enable_apic_mode)
   42.33 +#define phys_pkg_id (genapic->phys_pkg_id)
   42.34 +
   42.35 +#endif /* __ASM_MACH_APIC_H */
    43.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    43.2 +++ b/xen/include/asm-x86/mach-generic/mach_apicdef.h	Wed May 25 17:29:20 2005 +0000
    43.3 @@ -0,0 +1,11 @@
    43.4 +#ifndef _GENAPIC_MACH_APICDEF_H
    43.5 +#define _GENAPIC_MACH_APICDEF_H 1
    43.6 +
    43.7 +#ifndef APIC_DEFINITION
    43.8 +#include <asm/genapic.h>
    43.9 +
   43.10 +#define GET_APIC_ID (genapic->get_apic_id)
   43.11 +#define APIC_ID_MASK (genapic->apic_id_mask)
   43.12 +#endif
   43.13 +
   43.14 +#endif
    44.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    44.2 +++ b/xen/include/asm-x86/mach-generic/mach_ipi.h	Wed May 25 17:29:20 2005 +0000
    44.3 @@ -0,0 +1,10 @@
    44.4 +#ifndef _MACH_IPI_H
    44.5 +#define _MACH_IPI_H 1
    44.6 +
    44.7 +#include <asm/genapic.h>
    44.8 +
    44.9 +#define send_IPI_mask (genapic->send_IPI_mask)
   44.10 +#define send_IPI_allbutself (genapic->send_IPI_allbutself)
   44.11 +#define send_IPI_all (genapic->send_IPI_all)
   44.12 +
   44.13 +#endif
    45.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    45.2 +++ b/xen/include/asm-x86/mach-generic/mach_mpparse.h	Wed May 25 17:29:20 2005 +0000
    45.3 @@ -0,0 +1,12 @@
    45.4 +#ifndef _MACH_MPPARSE_H
    45.5 +#define _MACH_MPPARSE_H 1
    45.6 +
    45.7 +#include <asm/genapic.h>
    45.8 +
    45.9 +#define mpc_oem_bus_info (genapic->mpc_oem_bus_info)
   45.10 +#define mpc_oem_pci_bus (genapic->mpc_oem_pci_bus)
   45.11 +
   45.12 +int mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid); 
   45.13 +int acpi_madt_oem_check(char *oem_id, char *oem_table_id); 
   45.14 +
   45.15 +#endif
    46.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    46.2 +++ b/xen/include/asm-x86/mach-generic/mach_mpspec.h	Wed May 25 17:29:20 2005 +0000
    46.3 @@ -0,0 +1,10 @@
    46.4 +#ifndef __ASM_MACH_MPSPEC_H
    46.5 +#define __ASM_MACH_MPSPEC_H
    46.6 +
    46.7 +#define MAX_IRQ_SOURCES 256
    46.8 +
    46.9 +/* Summit or generic (i.e. installer) kernels need lots of bus entries. */
   46.10 +/* Maximum 256 PCI busses, plus 1 ISA bus in each of 4 cabinets. */
   46.11 +#define MAX_MP_BUSSES 260
   46.12 +
   46.13 +#endif /* __ASM_MACH_MPSPEC_H */
    47.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    47.2 +++ b/xen/include/asm-x86/mach-summit/mach_apic.h	Wed May 25 17:29:20 2005 +0000
    47.3 @@ -0,0 +1,189 @@
    47.4 +#ifndef __ASM_MACH_APIC_H
    47.5 +#define __ASM_MACH_APIC_H
    47.6 +
    47.7 +#include <xen/config.h>
    47.8 +#include <asm/smp.h>
    47.9 +
   47.10 +#define esr_disable (1)
   47.11 +#define NO_BALANCE_IRQ (0)
   47.12 +
   47.13 +#define NO_IOAPIC_CHECK (1)	/* Don't check I/O APIC ID for xAPIC */
   47.14 +
   47.15 +/* In clustered mode, the high nibble of APIC ID is a cluster number.
   47.16 + * The low nibble is a 4-bit bitmap. */
   47.17 +#define XAPIC_DEST_CPUS_SHIFT	4
   47.18 +#define XAPIC_DEST_CPUS_MASK	((1u << XAPIC_DEST_CPUS_SHIFT) - 1)
   47.19 +#define XAPIC_DEST_CLUSTER_MASK	(XAPIC_DEST_CPUS_MASK << XAPIC_DEST_CPUS_SHIFT)
   47.20 +
   47.21 +#define APIC_DFR_VALUE	(APIC_DFR_CLUSTER)
   47.22 +
   47.23 +static inline cpumask_t target_cpus(void)
   47.24 +{
   47.25 +	/* CPU_MASK_ALL (0xff) has undefined behaviour with
   47.26 +	 * dest_LowestPrio mode logical clustered apic interrupt routing
   47.27 +	 * Just start on cpu 0.  IRQ balancing will spread load
   47.28 +	 */
   47.29 +	return cpumask_of_cpu(0);
   47.30 +} 
   47.31 +#define TARGET_CPUS	(target_cpus())
   47.32 +
   47.33 +#define INT_DELIVERY_MODE (dest_LowestPrio)
   47.34 +#define INT_DEST_MODE 1     /* logical delivery broadcast to all procs */
   47.35 +
   47.36 +static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
   47.37 +{
   47.38 +	return 0;
   47.39 +} 
   47.40 +
   47.41 +/* we don't use the phys_cpu_present_map to indicate apicid presence */
   47.42 +static inline unsigned long check_apicid_present(int bit) 
   47.43 +{
   47.44 +	return 1;
   47.45 +}
   47.46 +
   47.47 +#define apicid_cluster(apicid) ((apicid) & XAPIC_DEST_CLUSTER_MASK)
   47.48 +
   47.49 +extern u8 bios_cpu_apicid[];
   47.50 +extern u8 cpu_2_logical_apicid[];
   47.51 +
   47.52 +static inline void init_apic_ldr(void)
   47.53 +{
   47.54 +	unsigned long val, id;
   47.55 +	int i, count;
   47.56 +	u8 lid;
   47.57 +	u8 my_id = (u8)hard_smp_processor_id();
   47.58 +	u8 my_cluster = (u8)apicid_cluster(my_id);
   47.59 +
   47.60 +	/* Create logical APIC IDs by counting CPUs already in cluster. */
   47.61 +	for (count = 0, i = NR_CPUS; --i >= 0; ) {
   47.62 +		lid = cpu_2_logical_apicid[i];
   47.63 +		if (lid != BAD_APICID && apicid_cluster(lid) == my_cluster)
   47.64 +			++count;
   47.65 +	}
   47.66 +	/* We only have a 4 wide bitmap in cluster mode.  If a deranged
   47.67 +	 * BIOS puts 5 CPUs in one APIC cluster, we're hosed. */
   47.68 +	BUG_ON(count >= XAPIC_DEST_CPUS_SHIFT);
   47.69 +	id = my_cluster | (1UL << count);
   47.70 +	apic_write_around(APIC_DFR, APIC_DFR_VALUE);
   47.71 +	val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
   47.72 +	val |= SET_APIC_LOGICAL_ID(id);
   47.73 +	apic_write_around(APIC_LDR, val);
   47.74 +}
   47.75 +
   47.76 +static inline int multi_timer_check(int apic, int irq)
   47.77 +{
   47.78 +	return 0;
   47.79 +}
   47.80 +
   47.81 +static inline int apic_id_registered(void)
   47.82 +{
   47.83 +	return 1;
   47.84 +}
   47.85 +
   47.86 +static inline void clustered_apic_check(void)
   47.87 +{
   47.88 +	printk("Enabling APIC mode:  Summit.  Using %d I/O APICs\n",
   47.89 +						nr_ioapics);
   47.90 +}
   47.91 +
   47.92 +static inline int apicid_to_node(int logical_apicid)
   47.93 +{
   47.94 +	return logical_apicid >> 5;          /* 2 clusterids per CEC */
   47.95 +}
   47.96 +
   47.97 +/* Mapping from cpu number to logical apicid */
   47.98 +static inline int cpu_to_logical_apicid(int cpu)
   47.99 +{
  47.100 +       if (cpu >= NR_CPUS)
  47.101 +	       return BAD_APICID;
  47.102 +	return (int)cpu_2_logical_apicid[cpu];
  47.103 +}
  47.104 +
  47.105 +static inline int cpu_present_to_apicid(int mps_cpu)
  47.106 +{
  47.107 +	if (mps_cpu < NR_CPUS)
  47.108 +		return (int)bios_cpu_apicid[mps_cpu];
  47.109 +	else
  47.110 +		return BAD_APICID;
  47.111 +}
  47.112 +
  47.113 +static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)
  47.114 +{
  47.115 +	/* For clustered we don't have a good way to do this yet - hack */
  47.116 +	return physids_promote(0x0F);
  47.117 +}
  47.118 +
  47.119 +static inline physid_mask_t apicid_to_cpu_present(int apicid)
  47.120 +{
  47.121 +	return physid_mask_of_physid(0);
  47.122 +}
  47.123 +
  47.124 +static inline int mpc_apic_id(struct mpc_config_processor *m, 
  47.125 +			struct mpc_config_translation *translation_record)
  47.126 +{
  47.127 +	printk("Processor #%d %d:%d APIC version %d\n",
  47.128 +			m->mpc_apicid,
  47.129 +			(m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
  47.130 +			(m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
  47.131 +			m->mpc_apicver);
  47.132 +	return (m->mpc_apicid);
  47.133 +}
  47.134 +
  47.135 +static inline void setup_portio_remap(void)
  47.136 +{
  47.137 +}
  47.138 +
  47.139 +static inline int check_phys_apicid_present(int boot_cpu_physical_apicid)
  47.140 +{
  47.141 +	return 1;
  47.142 +}
  47.143 +
  47.144 +static inline void enable_apic_mode(void)
  47.145 +{
  47.146 +}
  47.147 +
  47.148 +static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
  47.149 +{
  47.150 +	int num_bits_set;
  47.151 +	int cpus_found = 0;
  47.152 +	int cpu;
  47.153 +	int apicid;	
  47.154 +
  47.155 +	num_bits_set = cpus_weight(cpumask);
  47.156 +	/* Return id to all */
  47.157 +	if (num_bits_set == NR_CPUS)
  47.158 +		return (int) 0xFF;
  47.159 +	/* 
  47.160 +	 * The cpus in the mask must all be on the apic cluster.  If are not 
  47.161 +	 * on the same apicid cluster return default value of TARGET_CPUS. 
  47.162 +	 */
  47.163 +	cpu = first_cpu(cpumask);
  47.164 +	apicid = cpu_to_logical_apicid(cpu);
  47.165 +	while (cpus_found < num_bits_set) {
  47.166 +		if (cpu_isset(cpu, cpumask)) {
  47.167 +			int new_apicid = cpu_to_logical_apicid(cpu);
  47.168 +			if (apicid_cluster(apicid) != 
  47.169 +					apicid_cluster(new_apicid)){
  47.170 +				printk ("%s: Not a valid mask!\n",__FUNCTION__);
  47.171 +				return 0xFF;
  47.172 +			}
  47.173 +			apicid = apicid | new_apicid;
  47.174 +			cpus_found++;
  47.175 +		}
  47.176 +		cpu++;
  47.177 +	}
  47.178 +	return apicid;
  47.179 +}
  47.180 +
  47.181 +/* cpuid returns the value latched in the HW at reset, not the APIC ID
  47.182 + * register's value.  For any box whose BIOS changes APIC IDs, like
  47.183 + * clustered APIC systems, we must use hard_smp_processor_id.
  47.184 + *
  47.185 + * See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
  47.186 + */
  47.187 +static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
  47.188 +{
  47.189 +	return hard_smp_processor_id() >> index_msb;
  47.190 +}
  47.191 +
  47.192 +#endif /* __ASM_MACH_APIC_H */
    48.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    48.2 +++ b/xen/include/asm-x86/mach-summit/mach_apicdef.h	Wed May 25 17:29:20 2005 +0000
    48.3 @@ -0,0 +1,13 @@
    48.4 +#ifndef __ASM_MACH_APICDEF_H
    48.5 +#define __ASM_MACH_APICDEF_H
    48.6 +
    48.7 +#define		APIC_ID_MASK		(0xFF<<24)
    48.8 +
    48.9 +static inline unsigned get_apic_id(unsigned long x) 
   48.10 +{ 
   48.11 +	return (((x)>>24)&0xFF);
   48.12 +} 
   48.13 +
   48.14 +#define		GET_APIC_ID(x)	get_apic_id(x)
   48.15 +
   48.16 +#endif
    49.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    49.2 +++ b/xen/include/asm-x86/mach-summit/mach_ipi.h	Wed May 25 17:29:20 2005 +0000
    49.3 @@ -0,0 +1,25 @@
    49.4 +#ifndef __ASM_MACH_IPI_H
    49.5 +#define __ASM_MACH_IPI_H
    49.6 +
    49.7 +void send_IPI_mask_sequence(cpumask_t mask, int vector);
    49.8 +
    49.9 +static inline void send_IPI_mask(cpumask_t mask, int vector)
   49.10 +{
   49.11 +	send_IPI_mask_sequence(mask, vector);
   49.12 +}
   49.13 +
   49.14 +static inline void send_IPI_allbutself(int vector)
   49.15 +{
   49.16 +	cpumask_t mask = cpu_online_map;
   49.17 +	cpu_clear(smp_processor_id(), mask);
   49.18 +
   49.19 +	if (!cpus_empty(mask))
   49.20 +		send_IPI_mask(mask, vector);
   49.21 +}
   49.22 +
   49.23 +static inline void send_IPI_all(int vector)
   49.24 +{
   49.25 +	send_IPI_mask(cpu_online_map, vector);
   49.26 +}
   49.27 +
   49.28 +#endif /* __ASM_MACH_IPI_H */
    50.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    50.2 +++ b/xen/include/asm-x86/mach-summit/mach_mpparse.h	Wed May 25 17:29:20 2005 +0000
    50.3 @@ -0,0 +1,121 @@
    50.4 +#ifndef __ASM_MACH_MPPARSE_H
    50.5 +#define __ASM_MACH_MPPARSE_H
    50.6 +
    50.7 +#include <mach_apic.h>
    50.8 +
    50.9 +extern int use_cyclone;
   50.10 +
   50.11 +#ifdef CONFIG_X86_SUMMIT_NUMA
   50.12 +extern void setup_summit(void);
   50.13 +#else
   50.14 +#define setup_summit()	{}
   50.15 +#endif
   50.16 +
   50.17 +static inline void mpc_oem_bus_info(struct mpc_config_bus *m, char *name, 
   50.18 +				struct mpc_config_translation *translation)
   50.19 +{
   50.20 +	Dprintk("Bus #%d is %s\n", m->mpc_busid, name);
   50.21 +}
   50.22 +
   50.23 +static inline void mpc_oem_pci_bus(struct mpc_config_bus *m, 
   50.24 +				struct mpc_config_translation *translation)
   50.25 +{
   50.26 +}
   50.27 +
   50.28 +extern int usb_early_handoff;
   50.29 +static inline int mps_oem_check(struct mp_config_table *mpc, char *oem, 
   50.30 +		char *productid)
   50.31 +{
   50.32 +	if (!strncmp(oem, "IBM ENSW", 8) && 
   50.33 +			(!strncmp(productid, "VIGIL SMP", 9) 
   50.34 +			 || !strncmp(productid, "EXA", 3)
   50.35 +			 || !strncmp(productid, "RUTHLESS SMP", 12))){
   50.36 +		/*use_cyclone = 1;*/ /*enable cyclone-timer*/
   50.37 +		setup_summit();
   50.38 +		/*usb_early_handoff = 1;*/
   50.39 +		return 1;
   50.40 +	}
   50.41 +	return 0;
   50.42 +}
   50.43 +
   50.44 +/* Hook from generic ACPI tables.c */
   50.45 +static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
   50.46 +{
   50.47 +	if (!strncmp(oem_id, "IBM", 3) &&
   50.48 +	    (!strncmp(oem_table_id, "SERVIGIL", 8)
   50.49 +	     || !strncmp(oem_table_id, "EXA", 3))){
   50.50 +		/*use_cyclone = 1;*/ /*enable cyclone-timer*/
   50.51 +		setup_summit();
   50.52 +		/*usb_early_handoff = 1;*/
   50.53 +		return 1;
   50.54 +	}
   50.55 +	return 0;
   50.56 +}
   50.57 +
   50.58 +struct rio_table_hdr {
   50.59 +	unsigned char version;      /* Version number of this data structure           */
   50.60 +	                            /* Version 3 adds chassis_num & WP_index           */
   50.61 +	unsigned char num_scal_dev; /* # of Scalability devices (Twisters for Vigil)   */
   50.62 +	unsigned char num_rio_dev;  /* # of RIO I/O devices (Cyclones and Winnipegs)   */
   50.63 +} __attribute__((packed));
   50.64 +
   50.65 +struct scal_detail {
   50.66 +	unsigned char node_id;      /* Scalability Node ID                             */
   50.67 +	unsigned long CBAR;         /* Address of 1MB register space                   */
   50.68 +	unsigned char port0node;    /* Node ID port connected to: 0xFF=None            */
   50.69 +	unsigned char port0port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
   50.70 +	unsigned char port1node;    /* Node ID port connected to: 0xFF = None          */
   50.71 +	unsigned char port1port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
   50.72 +	unsigned char port2node;    /* Node ID port connected to: 0xFF = None          */
   50.73 +	unsigned char port2port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
   50.74 +	unsigned char chassis_num;  /* 1 based Chassis number (1 = boot node)          */
   50.75 +} __attribute__((packed));
   50.76 +
   50.77 +struct rio_detail {
   50.78 +	unsigned char node_id;      /* RIO Node ID                                     */
   50.79 +	unsigned long BBAR;         /* Address of 1MB register space                   */
   50.80 +	unsigned char type;         /* Type of device                                  */
   50.81 +	unsigned char owner_id;     /* For WPEG: Node ID of Cyclone that owns this WPEG*/
   50.82 +	                            /* For CYC:  Node ID of Twister that owns this CYC */
   50.83 +	unsigned char port0node;    /* Node ID port connected to: 0xFF=None            */
   50.84 +	unsigned char port0port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
   50.85 +	unsigned char port1node;    /* Node ID port connected to: 0xFF=None            */
   50.86 +	unsigned char port1port;    /* Port num port connected to: 0,1,2, or 0xFF=None */
   50.87 +	unsigned char first_slot;   /* For WPEG: Lowest slot number below this WPEG    */
   50.88 +	                            /* For CYC:  0                                     */
   50.89 +	unsigned char status;       /* For WPEG: Bit 0 = 1 : the XAPIC is used         */
   50.90 +	                            /*                 = 0 : the XAPIC is not used, ie:*/
   50.91 +	                            /*                     ints fwded to another XAPIC */
   50.92 +	                            /*           Bits1:7 Reserved                      */
   50.93 +	                            /* For CYC:  Bits0:7 Reserved                      */
   50.94 +	unsigned char WP_index;     /* For WPEG: WPEG instance index - lower ones have */
   50.95 +	                            /*           lower slot numbers/PCI bus numbers    */
   50.96 +	                            /* For CYC:  No meaning                            */
   50.97 +	unsigned char chassis_num;  /* 1 based Chassis number                          */
   50.98 +	                            /* For LookOut WPEGs this field indicates the      */
   50.99 +	                            /* Expansion Chassis #, enumerated from Boot       */
  50.100 +	                            /* Node WPEG external port, then Boot Node CYC     */
  50.101 +	                            /* external port, then Next Vigil chassis WPEG     */
  50.102 +	                            /* external port, etc.                             */
  50.103 +	                            /* Shared Lookouts have only 1 chassis number (the */
  50.104 +	                            /* first one assigned)                             */
  50.105 +} __attribute__((packed));
  50.106 +
  50.107 +
  50.108 +typedef enum {
  50.109 +	CompatTwister = 0,  /* Compatibility Twister               */
  50.110 +	AltTwister    = 1,  /* Alternate Twister of internal 8-way */
  50.111 +	CompatCyclone = 2,  /* Compatibility Cyclone               */
  50.112 +	AltCyclone    = 3,  /* Alternate Cyclone of internal 8-way */
  50.113 +	CompatWPEG    = 4,  /* Compatibility WPEG                  */
  50.114 +	AltWPEG       = 5,  /* Second Planar WPEG                  */
  50.115 +	LookOutAWPEG  = 6,  /* LookOut WPEG                        */
  50.116 +	LookOutBWPEG  = 7,  /* LookOut WPEG                        */
  50.117 +} node_type;
  50.118 +
  50.119 +static inline int is_WPEG(struct rio_detail *rio){
  50.120 +	return (rio->type == CompatWPEG || rio->type == AltWPEG ||
  50.121 +		rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
  50.122 +}
  50.123 +
  50.124 +#endif /* __ASM_MACH_MPPARSE_H */
    51.1 --- a/xen/include/asm-x86/page.h	Wed May 25 17:19:19 2005 +0000
    51.2 +++ b/xen/include/asm-x86/page.h	Wed May 25 17:29:20 2005 +0000
    51.3 @@ -54,12 +54,6 @@ typedef struct { unsigned long pt_lo; } 
    51.4  #define HYPERVISOR_ENTRIES_PER_L2_PAGETABLE \
    51.5    (L2_PAGETABLE_ENTRIES - DOMAIN_ENTRIES_PER_L2_PAGETABLE)
    51.6  
    51.7 -#ifndef __ASSEMBLY__
    51.8 -#include <asm/processor.h>
    51.9 -#include <asm/fixmap.h>
   51.10 -#include <asm/bitops.h>
   51.11 -#include <asm/flushtlb.h>
   51.12 -
   51.13  #define linear_l1_table                                                 \
   51.14      ((l1_pgentry_t *)(LINEAR_PT_VIRT_START))
   51.15  #define __linear_l2_table                                                 \
   51.16 @@ -83,9 +77,10 @@ typedef struct { unsigned long pt_lo; } 
   51.17  #define va_to_l1mfn(_ed, _va) \
   51.18      (l2e_get_pfn(linear_l2_table(_ed)[_va>>L2_PAGETABLE_SHIFT]))
   51.19  
   51.20 +#ifndef __ASSEMBLY__
   51.21  extern root_pgentry_t idle_pg_table[ROOT_PAGETABLE_ENTRIES];
   51.22 -
   51.23  extern void paging_init(void);
   51.24 +#endif
   51.25  
   51.26  #define __pge_off()                                                     \
   51.27      do {                                                                \
   51.28 @@ -101,9 +96,6 @@ extern void paging_init(void);
   51.29              : : "r" (mmu_cr4_features) );                               \
   51.30      } while ( 0 )
   51.31  
   51.32 -#endif /* !__ASSEMBLY__ */
   51.33 -
   51.34 -
   51.35  #define _PAGE_PRESENT  0x001UL
   51.36  #define _PAGE_RW       0x002UL
   51.37  #define _PAGE_USER     0x004UL
    52.1 --- a/xen/include/asm-x86/shadow.h	Wed May 25 17:19:19 2005 +0000
    52.2 +++ b/xen/include/asm-x86/shadow.h	Wed May 25 17:29:20 2005 +0000
    52.3 @@ -27,6 +27,7 @@
    52.4  #include <xen/perfc.h>
    52.5  #include <xen/sched.h>
    52.6  #include <xen/mm.h>
    52.7 +#include <asm/flushtlb.h>
    52.8  #include <asm/processor.h>
    52.9  #include <asm/domain_page.h>
   52.10  #include <public/dom0_ops.h>
    53.1 --- a/xen/include/asm-x86/system.h	Wed May 25 17:19:19 2005 +0000
    53.2 +++ b/xen/include/asm-x86/system.h	Wed May 25 17:29:20 2005 +0000
    53.3 @@ -333,4 +333,6 @@ static inline int local_irq_is_enabled(v
    53.4  #define BROKEN_ACPI_Sx		0x0001
    53.5  #define BROKEN_INIT_AFTER_S1	0x0002
    53.6  
    53.7 +extern int es7000_plat;
    53.8 +
    53.9  #endif
    54.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    54.2 +++ b/xen/include/xen/dmi.h	Wed May 25 17:29:20 2005 +0000
    54.3 @@ -0,0 +1,47 @@
    54.4 +#ifndef __DMI_H__
    54.5 +#define __DMI_H__
    54.6 +
    54.7 +enum dmi_field {
    54.8 +	DMI_NONE,
    54.9 +	DMI_BIOS_VENDOR,
   54.10 +	DMI_BIOS_VERSION,
   54.11 +	DMI_BIOS_DATE,
   54.12 +	DMI_SYS_VENDOR,
   54.13 +	DMI_PRODUCT_NAME,
   54.14 +	DMI_PRODUCT_VERSION,
   54.15 +	DMI_BOARD_VENDOR,
   54.16 +	DMI_BOARD_NAME,
   54.17 +	DMI_BOARD_VERSION,
   54.18 +	DMI_STRING_MAX,
   54.19 +};
   54.20 +
   54.21 +/*
   54.22 + *	DMI callbacks for problem boards
   54.23 + */
   54.24 +struct dmi_strmatch {
   54.25 +	u8 slot;
   54.26 +	char *substr;
   54.27 +};
   54.28 +
   54.29 +struct dmi_system_id {
   54.30 +	int (*callback)(struct dmi_system_id *);
   54.31 +	char *ident;
   54.32 +	struct dmi_strmatch matches[4];
   54.33 +	void *driver_data;
   54.34 +};
   54.35 +
   54.36 +#define DMI_MATCH(a,b)	{ a, b }
   54.37 +
   54.38 +#if defined(CONFIG_X86) && !defined(CONFIG_X86_64)
   54.39 +
   54.40 +extern int dmi_check_system(struct dmi_system_id *list);
   54.41 +extern char * dmi_get_system_info(int field);
   54.42 +
   54.43 +#else
   54.44 +
   54.45 +static inline int dmi_check_system(struct dmi_system_id *list) { return 0; }
   54.46 +static inline char * dmi_get_system_info(int field) { return NULL; }
   54.47 +
   54.48 +#endif
   54.49 +
   54.50 +#endif	/* __DMI_H__ */