ia64/xen-unstable

changeset 17098:f1a107ec62b6

x86_emulate: Allow writeback-avoidance optimisation to be defeated by
the caller. This is used in cases where the writeback may be to an
MMIO region with side effects (the APIC EOI register is the main
example of this).

Also fix up build of the x86_emulate user-space test harness.

Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Thu Feb 21 14:50:27 2008 +0000 (2008-02-21)
parents 221b2680ffe5
children 591cfd37bd54
files tools/tests/test_x86_emulator.c xen/arch/x86/hvm/emulate.c xen/arch/x86/mm.c xen/arch/x86/mm/shadow/common.c xen/arch/x86/x86_emulate.c xen/include/asm-x86/x86_emulate.h
line diff
     1.1 --- a/tools/tests/test_x86_emulator.c	Thu Feb 21 10:30:57 2008 +0000
     1.2 +++ b/tools/tests/test_x86_emulator.c	Thu Feb 21 14:50:27 2008 +0000
     1.3 @@ -118,6 +118,7 @@ int main(int argc, char **argv)
     1.4  #endif
     1.5  
     1.6      ctxt.regs = &regs;
     1.7 +    ctxt.force_writeback = 0;
     1.8      ctxt.addr_size = 32;
     1.9      ctxt.sp_size   = 32;
    1.10  
     2.1 --- a/xen/arch/x86/hvm/emulate.c	Thu Feb 21 10:30:57 2008 +0000
     2.2 +++ b/xen/arch/x86/hvm/emulate.c	Thu Feb 21 14:50:27 2008 +0000
     2.3 @@ -722,6 +722,7 @@ void hvm_emulate_prepare(
     2.4      struct cpu_user_regs *regs)
     2.5  {
     2.6      hvmemul_ctxt->ctxt.regs = regs;
     2.7 +    hvmemul_ctxt->ctxt.force_writeback = 1;
     2.8      hvmemul_ctxt->seg_reg_accessed = 0;
     2.9      hvmemul_ctxt->seg_reg_dirty = 0;
    2.10      hvmemul_get_seg_reg(x86_seg_cs, hvmemul_ctxt);
     3.1 --- a/xen/arch/x86/mm.c	Thu Feb 21 10:30:57 2008 +0000
     3.2 +++ b/xen/arch/x86/mm.c	Thu Feb 21 14:50:27 2008 +0000
     3.3 @@ -3671,6 +3671,7 @@ int ptwr_do_page_fault(struct vcpu *v, u
     3.4          goto bail;
     3.5  
     3.6      ptwr_ctxt.ctxt.regs = regs;
     3.7 +    ptwr_ctxt.ctxt.force_writeback = 0;
     3.8      ptwr_ctxt.ctxt.addr_size = ptwr_ctxt.ctxt.sp_size =
     3.9          is_pv_32on64_domain(d) ? 32 : BITS_PER_LONG;
    3.10      ptwr_ctxt.cr2 = addr;
     4.1 --- a/xen/arch/x86/mm/shadow/common.c	Thu Feb 21 10:30:57 2008 +0000
     4.2 +++ b/xen/arch/x86/mm/shadow/common.c	Thu Feb 21 14:50:27 2008 +0000
     4.3 @@ -385,6 +385,7 @@ struct x86_emulate_ops *shadow_init_emul
     4.4      unsigned long addr;
     4.5  
     4.6      sh_ctxt->ctxt.regs = regs;
     4.7 +    sh_ctxt->ctxt.force_writeback = 0;
     4.8  
     4.9      if ( !is_hvm_vcpu(v) )
    4.10      {
     5.1 --- a/xen/arch/x86/x86_emulate.c	Thu Feb 21 10:30:57 2008 +0000
     5.2 +++ b/xen/arch/x86/x86_emulate.c	Thu Feb 21 14:50:27 2008 +0000
     5.3 @@ -24,6 +24,7 @@
     5.4  #ifndef __XEN__
     5.5  #include <stddef.h>
     5.6  #include <stdint.h>
     5.7 +#include <string.h>
     5.8  #include <public/xen.h>
     5.9  #else
    5.10  #include <xen/config.h>
    5.11 @@ -1983,7 +1984,8 @@ x86_emulate(
    5.12          }
    5.13          break;
    5.14      case OP_MEM:
    5.15 -        if ( !(d & Mov) && (dst.orig_val == dst.val) )
    5.16 +        if ( !(d & Mov) && (dst.orig_val == dst.val) &&
    5.17 +             !ctxt->force_writeback )
    5.18              /* nothing to do */;
    5.19          else if ( lock_prefix )
    5.20              rc = ops->cmpxchg(
     6.1 --- a/xen/include/asm-x86/x86_emulate.h	Thu Feb 21 10:30:57 2008 +0000
     6.2 +++ b/xen/include/asm-x86/x86_emulate.h	Thu Feb 21 14:50:27 2008 +0000
     6.3 @@ -56,17 +56,17 @@ enum x86_segment {
     6.4   * segment descriptor. It happens to match the format of an AMD SVM VMCB.
     6.5   */
     6.6  typedef union segment_attributes {
     6.7 -    u16 bytes;
     6.8 +    uint16_t bytes;
     6.9      struct
    6.10      {
    6.11 -        u16 type:4;    /* 0;  Bit 40-43 */
    6.12 -        u16 s:   1;    /* 4;  Bit 44 */
    6.13 -        u16 dpl: 2;    /* 5;  Bit 45-46 */
    6.14 -        u16 p:   1;    /* 7;  Bit 47 */
    6.15 -        u16 avl: 1;    /* 8;  Bit 52 */
    6.16 -        u16 l:   1;    /* 9;  Bit 53 */
    6.17 -        u16 db:  1;    /* 10; Bit 54 */
    6.18 -        u16 g:   1;    /* 11; Bit 55 */
    6.19 +        uint16_t type:4;    /* 0;  Bit 40-43 */
    6.20 +        uint16_t s:   1;    /* 4;  Bit 44 */
    6.21 +        uint16_t dpl: 2;    /* 5;  Bit 45-46 */
    6.22 +        uint16_t p:   1;    /* 7;  Bit 47 */
    6.23 +        uint16_t avl: 1;    /* 8;  Bit 52 */
    6.24 +        uint16_t l:   1;    /* 9;  Bit 53 */
    6.25 +        uint16_t db:  1;    /* 10; Bit 54 */
    6.26 +        uint16_t g:   1;    /* 11; Bit 55 */
    6.27      } fields;
    6.28  } __attribute__ ((packed)) segment_attributes_t;
    6.29  
    6.30 @@ -75,10 +75,10 @@ typedef union segment_attributes {
    6.31   * Again, this happens to match the format of an AMD SVM VMCB.
    6.32   */
    6.33  struct segment_register {
    6.34 -    u16        sel;
    6.35 +    uint16_t   sel;
    6.36      segment_attributes_t attr;
    6.37 -    u32        limit;
    6.38 -    u64        base;
    6.39 +    uint32_t   limit;
    6.40 +    uint64_t   base;
    6.41  } __attribute__ ((packed));
    6.42  
    6.43  /*
    6.44 @@ -368,6 +368,9 @@ struct x86_emulate_ctxt
    6.45  
    6.46      /* Stack pointer width in bits (16, 32 or 64). */
    6.47      unsigned int sp_size;
    6.48 +
    6.49 +    /* Set this if writes may have side effects. */
    6.50 +    int force_writeback;
    6.51  };
    6.52  
    6.53  /*