ia64/xen-unstable

changeset 6577:f0dc15fd3c1b

merge?
author shand@ubuntu.eng.hq.xensource.com
date Wed Aug 31 15:22:45 2005 -0800 (2005-08-31)
parents dd108e5ad24d 8af8ddf91078
children a11bf3a68e9b
files .hgignore Config.mk Makefile buildconfigs/Rules.mk buildconfigs/mk.linux-2.6-xen buildconfigs/mk.linux-2.6-xen0 buildconfigs/mk.linux-2.6-xenU docs/src/user.tex extras/mini-os/include/hypervisor.h extras/mini-os/include/lib.h extras/mini-os/include/mm.h extras/mini-os/include/time.h extras/mini-os/include/types.h extras/mini-os/include/xmalloc.h extras/mini-os/kernel.c extras/mini-os/lib/xmalloc.c extras/mini-os/mm.c extras/mini-os/time.c linux-2.4-xen-sparse/Makefile linux-2.4-xen-sparse/arch/xen/Makefile linux-2.4-xen-sparse/arch/xen/boot/Makefile linux-2.4-xen-sparse/arch/xen/config.in linux-2.4-xen-sparse/arch/xen/defconfig-xen0 linux-2.4-xen-sparse/arch/xen/defconfig-xenU linux-2.4-xen-sparse/arch/xen/drivers/balloon/Makefile linux-2.4-xen-sparse/arch/xen/drivers/blkif/Makefile linux-2.4-xen-sparse/arch/xen/drivers/blkif/backend/Makefile linux-2.4-xen-sparse/arch/xen/drivers/blkif/frontend/Makefile linux-2.4-xen-sparse/arch/xen/drivers/blkif/frontend/common.h linux-2.4-xen-sparse/arch/xen/drivers/blkif/frontend/vbd.c linux-2.4-xen-sparse/arch/xen/drivers/console/Makefile linux-2.4-xen-sparse/arch/xen/drivers/dom0/Makefile linux-2.4-xen-sparse/arch/xen/drivers/evtchn/Makefile linux-2.4-xen-sparse/arch/xen/drivers/netif/Makefile linux-2.4-xen-sparse/arch/xen/drivers/netif/backend/Makefile linux-2.4-xen-sparse/arch/xen/drivers/netif/frontend/Makefile linux-2.4-xen-sparse/arch/xen/kernel/Makefile linux-2.4-xen-sparse/arch/xen/kernel/entry.S linux-2.4-xen-sparse/arch/xen/kernel/head.S linux-2.4-xen-sparse/arch/xen/kernel/i386_ksyms.c linux-2.4-xen-sparse/arch/xen/kernel/irq.c linux-2.4-xen-sparse/arch/xen/kernel/ldt.c linux-2.4-xen-sparse/arch/xen/kernel/pci-pc.c linux-2.4-xen-sparse/arch/xen/kernel/process.c linux-2.4-xen-sparse/arch/xen/kernel/setup.c linux-2.4-xen-sparse/arch/xen/kernel/signal.c linux-2.4-xen-sparse/arch/xen/kernel/time.c linux-2.4-xen-sparse/arch/xen/kernel/traps.c linux-2.4-xen-sparse/arch/xen/lib/Makefile linux-2.4-xen-sparse/arch/xen/lib/delay.c linux-2.4-xen-sparse/arch/xen/mm/Makefile linux-2.4-xen-sparse/arch/xen/mm/fault.c linux-2.4-xen-sparse/arch/xen/mm/init.c linux-2.4-xen-sparse/arch/xen/mm/ioremap.c linux-2.4-xen-sparse/arch/xen/vmlinux.lds linux-2.4-xen-sparse/drivers/block/ll_rw_blk.c linux-2.4-xen-sparse/drivers/char/Makefile linux-2.4-xen-sparse/drivers/char/mem.c linux-2.4-xen-sparse/drivers/char/tty_io.c linux-2.4-xen-sparse/drivers/scsi/aic7xxx/Makefile linux-2.4-xen-sparse/include/asm-xen/bugs.h linux-2.4-xen-sparse/include/asm-xen/desc.h linux-2.4-xen-sparse/include/asm-xen/fixmap.h linux-2.4-xen-sparse/include/asm-xen/highmem.h linux-2.4-xen-sparse/include/asm-xen/hw_irq.h linux-2.4-xen-sparse/include/asm-xen/io.h linux-2.4-xen-sparse/include/asm-xen/irq.h linux-2.4-xen-sparse/include/asm-xen/keyboard.h linux-2.4-xen-sparse/include/asm-xen/mmu_context.h linux-2.4-xen-sparse/include/asm-xen/module.h linux-2.4-xen-sparse/include/asm-xen/page.h linux-2.4-xen-sparse/include/asm-xen/pci.h linux-2.4-xen-sparse/include/asm-xen/pgalloc.h linux-2.4-xen-sparse/include/asm-xen/pgtable-2level.h linux-2.4-xen-sparse/include/asm-xen/pgtable.h linux-2.4-xen-sparse/include/asm-xen/processor.h linux-2.4-xen-sparse/include/asm-xen/queues.h linux-2.4-xen-sparse/include/asm-xen/segment.h linux-2.4-xen-sparse/include/asm-xen/smp.h linux-2.4-xen-sparse/include/asm-xen/system.h linux-2.4-xen-sparse/include/asm-xen/vga.h linux-2.4-xen-sparse/include/asm-xen/xor.h linux-2.4-xen-sparse/include/linux/blk.h linux-2.4-xen-sparse/include/linux/highmem.h linux-2.4-xen-sparse/include/linux/irq.h linux-2.4-xen-sparse/include/linux/mm.h linux-2.4-xen-sparse/include/linux/sched.h linux-2.4-xen-sparse/include/linux/skbuff.h linux-2.4-xen-sparse/include/linux/timer.h linux-2.4-xen-sparse/kernel/time.c linux-2.4-xen-sparse/kernel/timer.c linux-2.4-xen-sparse/mkbuildtree linux-2.4-xen-sparse/mm/highmem.c linux-2.4-xen-sparse/mm/memory.c linux-2.4-xen-sparse/mm/mprotect.c linux-2.4-xen-sparse/mm/mremap.c linux-2.4-xen-sparse/mm/page_alloc.c linux-2.4-xen-sparse/net/core/skbuff.c linux-2.6-xen-sparse/arch/xen/Kconfig linux-2.6-xen-sparse/arch/xen/Kconfig.drivers linux-2.6-xen-sparse/arch/xen/Makefile linux-2.6-xen-sparse/arch/xen/boot/Makefile linux-2.6-xen-sparse/arch/xen/configs/xen0_defconfig_x86_32 linux-2.6-xen-sparse/arch/xen/configs/xen0_defconfig_x86_64 linux-2.6-xen-sparse/arch/xen/configs/xenU_defconfig_x86_32 linux-2.6-xen-sparse/arch/xen/configs/xenU_defconfig_x86_64 linux-2.6-xen-sparse/arch/xen/configs/xen_defconfig_x86_32 linux-2.6-xen-sparse/arch/xen/configs/xen_defconfig_x86_64 linux-2.6-xen-sparse/arch/xen/i386/Kconfig linux-2.6-xen-sparse/arch/xen/i386/Makefile linux-2.6-xen-sparse/arch/xen/i386/kernel/Makefile linux-2.6-xen-sparse/arch/xen/i386/kernel/acpi/Makefile linux-2.6-xen-sparse/arch/xen/i386/kernel/acpi/boot.c linux-2.6-xen-sparse/arch/xen/i386/kernel/apic.c linux-2.6-xen-sparse/arch/xen/i386/kernel/cpu/Makefile linux-2.6-xen-sparse/arch/xen/i386/kernel/cpu/common.c linux-2.6-xen-sparse/arch/xen/i386/kernel/cpu/mtrr/Makefile linux-2.6-xen-sparse/arch/xen/i386/kernel/cpu/mtrr/main.c linux-2.6-xen-sparse/arch/xen/i386/kernel/entry.S linux-2.6-xen-sparse/arch/xen/i386/kernel/head.S linux-2.6-xen-sparse/arch/xen/i386/kernel/i386_ksyms.c linux-2.6-xen-sparse/arch/xen/i386/kernel/init_task.c linux-2.6-xen-sparse/arch/xen/i386/kernel/io_apic.c linux-2.6-xen-sparse/arch/xen/i386/kernel/ioport.c linux-2.6-xen-sparse/arch/xen/i386/kernel/irq.c linux-2.6-xen-sparse/arch/xen/i386/kernel/ldt.c linux-2.6-xen-sparse/arch/xen/i386/kernel/microcode.c linux-2.6-xen-sparse/arch/xen/i386/kernel/mpparse.c linux-2.6-xen-sparse/arch/xen/i386/kernel/pci-dma.c linux-2.6-xen-sparse/arch/xen/i386/kernel/process.c linux-2.6-xen-sparse/arch/xen/i386/kernel/setup.c linux-2.6-xen-sparse/arch/xen/i386/kernel/signal.c linux-2.6-xen-sparse/arch/xen/i386/kernel/smp.c linux-2.6-xen-sparse/arch/xen/i386/kernel/smpboot.c linux-2.6-xen-sparse/arch/xen/i386/kernel/swiotlb.c linux-2.6-xen-sparse/arch/xen/i386/kernel/time.c linux-2.6-xen-sparse/arch/xen/i386/kernel/traps.c linux-2.6-xen-sparse/arch/xen/i386/kernel/vsyscall.S linux-2.6-xen-sparse/arch/xen/i386/mach-default/Makefile linux-2.6-xen-sparse/arch/xen/i386/mm/Makefile linux-2.6-xen-sparse/arch/xen/i386/mm/fault.c linux-2.6-xen-sparse/arch/xen/i386/mm/highmem.c linux-2.6-xen-sparse/arch/xen/i386/mm/hypervisor.c linux-2.6-xen-sparse/arch/xen/i386/mm/init.c linux-2.6-xen-sparse/arch/xen/i386/mm/ioremap.c linux-2.6-xen-sparse/arch/xen/i386/mm/pgtable.c linux-2.6-xen-sparse/arch/xen/i386/pci/Makefile linux-2.6-xen-sparse/arch/xen/i386/pci/irq.c linux-2.6-xen-sparse/arch/xen/kernel/Makefile linux-2.6-xen-sparse/arch/xen/kernel/ctrl_if.c linux-2.6-xen-sparse/arch/xen/kernel/devmem.c linux-2.6-xen-sparse/arch/xen/kernel/evtchn.c linux-2.6-xen-sparse/arch/xen/kernel/fixup.c linux-2.6-xen-sparse/arch/xen/kernel/gnttab.c linux-2.6-xen-sparse/arch/xen/kernel/reboot.c linux-2.6-xen-sparse/arch/xen/kernel/skbuff.c linux-2.6-xen-sparse/arch/xen/kernel/smp.c linux-2.6-xen-sparse/arch/xen/kernel/xen_proc.c linux-2.6-xen-sparse/arch/xen/x86_64/Kconfig linux-2.6-xen-sparse/arch/xen/x86_64/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/ia32/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/ia32/ia32entry.S linux-2.6-xen-sparse/arch/xen/x86_64/ia32/syscall32.c linux-2.6-xen-sparse/arch/xen/x86_64/ia32/vsyscall-int80.S linux-2.6-xen-sparse/arch/xen/x86_64/kernel/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/kernel/acpi/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/kernel/apic.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/e820.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/early_printk.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/entry.S linux-2.6-xen-sparse/arch/xen/x86_64/kernel/genapic.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/genapic_xen.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/head.S linux-2.6-xen-sparse/arch/xen/x86_64/kernel/head64.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/io_apic.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/ioport.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/irq.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/ldt.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/mpparse.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/pci-nommu.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/process.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/setup.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/setup64.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/signal.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/smp.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/smpboot.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/traps.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/vsyscall.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/x8664_ksyms.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/xen_entry.S linux-2.6-xen-sparse/arch/xen/x86_64/mm/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/mm/fault.c linux-2.6-xen-sparse/arch/xen/x86_64/mm/init.c linux-2.6-xen-sparse/arch/xen/x86_64/mm/pageattr.c linux-2.6-xen-sparse/arch/xen/x86_64/pci/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/pci/Makefile-BUS linux-2.6-xen-sparse/drivers/Makefile linux-2.6-xen-sparse/drivers/acpi/tables.c linux-2.6-xen-sparse/drivers/char/mem.c linux-2.6-xen-sparse/drivers/char/tty_io.c linux-2.6-xen-sparse/drivers/xen/Makefile linux-2.6-xen-sparse/drivers/xen/balloon/Makefile linux-2.6-xen-sparse/drivers/xen/balloon/balloon.c linux-2.6-xen-sparse/drivers/xen/blkback/Makefile linux-2.6-xen-sparse/drivers/xen/blkback/blkback.c linux-2.6-xen-sparse/drivers/xen/blkback/common.h linux-2.6-xen-sparse/drivers/xen/blkback/interface.c linux-2.6-xen-sparse/drivers/xen/blkback/vbd.c linux-2.6-xen-sparse/drivers/xen/blkback/xenbus.c linux-2.6-xen-sparse/drivers/xen/blkfront/Kconfig linux-2.6-xen-sparse/drivers/xen/blkfront/Makefile linux-2.6-xen-sparse/drivers/xen/blkfront/blkfront.c linux-2.6-xen-sparse/drivers/xen/blkfront/block.h linux-2.6-xen-sparse/drivers/xen/blkfront/vbd.c linux-2.6-xen-sparse/drivers/xen/blktap/Makefile linux-2.6-xen-sparse/drivers/xen/blktap/blktap.c linux-2.6-xen-sparse/drivers/xen/blktap/blktap.h linux-2.6-xen-sparse/drivers/xen/blktap/blktap_controlmsg.c linux-2.6-xen-sparse/drivers/xen/blktap/blktap_datapath.c linux-2.6-xen-sparse/drivers/xen/blktap/blktap_userdev.c linux-2.6-xen-sparse/drivers/xen/console/Makefile linux-2.6-xen-sparse/drivers/xen/console/console.c linux-2.6-xen-sparse/drivers/xen/console/xencons_ring.c linux-2.6-xen-sparse/drivers/xen/console/xencons_ring.h linux-2.6-xen-sparse/drivers/xen/evtchn/Makefile linux-2.6-xen-sparse/drivers/xen/evtchn/evtchn.c linux-2.6-xen-sparse/drivers/xen/netback/Makefile linux-2.6-xen-sparse/drivers/xen/netback/common.h linux-2.6-xen-sparse/drivers/xen/netback/interface.c linux-2.6-xen-sparse/drivers/xen/netback/loopback.c linux-2.6-xen-sparse/drivers/xen/netback/netback.c linux-2.6-xen-sparse/drivers/xen/netback/xenbus.c linux-2.6-xen-sparse/drivers/xen/netfront/Kconfig linux-2.6-xen-sparse/drivers/xen/netfront/Makefile linux-2.6-xen-sparse/drivers/xen/netfront/netfront.c linux-2.6-xen-sparse/drivers/xen/privcmd/Makefile linux-2.6-xen-sparse/drivers/xen/privcmd/privcmd.c linux-2.6-xen-sparse/drivers/xen/usbback/common.h linux-2.6-xen-sparse/drivers/xen/usbback/control.c linux-2.6-xen-sparse/drivers/xen/usbback/interface.c linux-2.6-xen-sparse/drivers/xen/usbback/usbback.c linux-2.6-xen-sparse/drivers/xen/usbfront/usbfront.c linux-2.6-xen-sparse/drivers/xen/usbfront/xhci.h linux-2.6-xen-sparse/drivers/xen/xenbus/Makefile linux-2.6-xen-sparse/drivers/xen/xenbus/xenbus_comms.c linux-2.6-xen-sparse/drivers/xen/xenbus/xenbus_comms.h linux-2.6-xen-sparse/drivers/xen/xenbus/xenbus_probe.c linux-2.6-xen-sparse/drivers/xen/xenbus/xenbus_xs.c linux-2.6-xen-sparse/include/asm-generic/pgtable.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/agp.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/desc.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/dma-mapping.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/fixmap.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/floppy.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/highmem.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/hw_irq.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/hypercall.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/io.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/kmap_types.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mach-xen/irq_vectors.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mach-xen/setup_arch_post.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mach-xen/setup_arch_pre.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mach-xen/smpboot_hooks.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mmu.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mmu_context.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/page.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/param.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/pci.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/pgalloc.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/pgtable-2level.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/pgtable-3level.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/pgtable.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/processor.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/ptrace.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/scatterlist.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/segment.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/setup.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/spinlock.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/swiotlb.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/synch_bitops.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/system.h 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xen/include/asm-ia64/linux-xen/asm/pal.h xen/include/asm-ia64/linux-xen/asm/processor.h xen/include/asm-ia64/mm.h xen/include/asm-ia64/mmu_context.h xen/include/asm-ia64/privop.h xen/include/asm-ia64/regionreg.h xen/include/asm-ia64/regs.h xen/include/asm-ia64/serial.h xen/include/asm-ia64/tlb.h xen/include/asm-ia64/vcpu.h xen/include/asm-ia64/vmmu.h xen/include/asm-ia64/vmx.h xen/include/asm-ia64/vmx_uaccess.h xen/include/asm-ia64/vmx_vcpu.h xen/include/asm-ia64/vmx_vpd.h xen/include/asm-ia64/xenprocessor.h xen/include/asm-ia64/xensystem.h xen/include/asm-x86/apicdef.h xen/include/asm-x86/config.h xen/include/asm-x86/e820.h xen/include/asm-x86/event.h xen/include/asm-x86/fixmap.h xen/include/asm-x86/genapic.h xen/include/asm-x86/hpet.h xen/include/asm-x86/io.h xen/include/asm-x86/mach-bigsmp/mach_apic.h xen/include/asm-x86/mach-default/mach_apic.h xen/include/asm-x86/mach-es7000/mach_apic.h xen/include/asm-x86/mach-generic/mach_apic.h xen/include/asm-x86/mach-summit/mach_apic.h xen/include/asm-x86/mach-summit/mach_mpparse.h xen/include/asm-x86/mm.h xen/include/asm-x86/page.h xen/include/asm-x86/shadow.h xen/include/asm-x86/shadow_64.h xen/include/asm-x86/shadow_public.h xen/include/asm-x86/time.h xen/include/asm-x86/types.h xen/include/asm-x86/uaccess.h xen/include/asm-x86/vmx.h xen/include/asm-x86/vmx_platform.h xen/include/asm-x86/vmx_virpit.h xen/include/asm-x86/vmx_vmcs.h xen/include/asm-x86/x86_32/page-3level.h xen/include/asm-x86/x86_32/uaccess.h xen/include/asm-x86/x86_64/page.h xen/include/public/arch-ia64.h xen/include/public/arch-x86_32.h xen/include/public/arch-x86_64.h xen/include/public/dom0_ops.h xen/include/public/grant_table.h xen/include/public/io/blkif.h xen/include/public/io/domain_controller.h xen/include/public/io/netif.h xen/include/public/memory.h xen/include/public/physdev.h xen/include/public/trace.h xen/include/public/version.h xen/include/public/xen.h xen/include/xen/ac_timer.h xen/include/xen/domain.h xen/include/xen/event.h xen/include/xen/grant_table.h xen/include/xen/mm.h xen/include/xen/perfc.h xen/include/xen/perfc_defn.h xen/include/xen/sched.h xen/include/xen/serial.h xen/include/xen/symbols.h xen/include/xen/time.h xen/include/xen/trace.h xen/tools/Makefile xen/tools/symbols.c
line diff
   113.1 --- a/linux-2.6-xen-sparse/arch/xen/i386/kernel/acpi/boot.c	Wed Aug 31 14:37:21 2005 -0800
   113.2 +++ b/linux-2.6-xen-sparse/arch/xen/i386/kernel/acpi/boot.c	Wed Aug 31 15:22:45 2005 -0800
   113.3 @@ -469,6 +469,18 @@ unsigned int acpi_register_gsi(u32 gsi, 
   113.4  	unsigned int irq;
   113.5  	unsigned int plat_gsi = gsi;
   113.6  
   113.7 +#ifdef CONFIG_PCI
   113.8 +	/*
   113.9 +	 * Make sure all (legacy) PCI IRQs are set as level-triggered.
  113.10 +	 */
  113.11 +	if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
  113.12 +		extern void eisa_set_level_irq(unsigned int irq);
  113.13 +
  113.14 +		if (edge_level == ACPI_LEVEL_SENSITIVE)
  113.15 +				eisa_set_level_irq(gsi);
  113.16 +	}
  113.17 +#endif
  113.18 +
  113.19  #ifdef CONFIG_X86_IO_APIC
  113.20  	if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) {
  113.21  		plat_gsi = mp_register_gsi(gsi, edge_level, active_high_low);
   281.1 --- a/linux-2.6-xen-sparse/include/asm-xen/asm-i386/system.h	Wed Aug 31 14:37:21 2005 -0800
   281.2 +++ b/linux-2.6-xen-sparse/include/asm-xen/asm-i386/system.h	Wed Aug 31 15:22:45 2005 -0800
   281.3 @@ -561,8 +561,14 @@ do {									\
   281.4  #define local_irq_disable()	__cli()
   281.5  #define local_irq_enable()	__sti()
   281.6  
   281.7 +/* Don't use smp_processor_id: this is called in debug versions of that fn. */
   281.8 +#ifdef CONFIG_SMP
   281.9  #define irqs_disabled()			\
  281.10 -    HYPERVISOR_shared_info->vcpu_data[smp_processor_id()].evtchn_upcall_mask
  281.11 +    HYPERVISOR_shared_info->vcpu_data[__smp_processor_id()].evtchn_upcall_mask
  281.12 +#else
  281.13 +#define irqs_disabled()			\
  281.14 +    HYPERVISOR_shared_info->vcpu_data[0].evtchn_upcall_mask
  281.15 +#endif
  281.16  
  281.17  /*
  281.18   * disable hlt during certain critical i/o operations
   311.1 --- a/linux-2.6-xen-sparse/include/asm-xen/asm-x86_64/system.h	Wed Aug 31 14:37:21 2005 -0800
   311.2 +++ b/linux-2.6-xen-sparse/include/asm-xen/asm-x86_64/system.h	Wed Aug 31 15:22:45 2005 -0800
   311.3 @@ -387,8 +387,14 @@ void cpu_idle_wait(void);
   311.4  #define local_irq_disable()	__cli()
   311.5  #define local_irq_enable()	__sti()
   311.6  
   311.7 +/* Don't use smp_processor_id: this is called in debug versions of that fn. */
   311.8 +#ifdef CONFIG_SMP
   311.9  #define irqs_disabled()			\
  311.10 -    HYPERVISOR_shared_info->vcpu_data[smp_processor_id()].evtchn_upcall_mask
  311.11 +    HYPERVISOR_shared_info->vcpu_data[__smp_processor_id()].evtchn_upcall_mask
  311.12 +#else
  311.13 +#define irqs_disabled()			\
  311.14 +    HYPERVISOR_shared_info->vcpu_data[0].evtchn_upcall_mask
  311.15 +#endif
  311.16  
  311.17  /*
  311.18   * disable hlt during certain critical i/o operations
   354.1 --- a/tools/console/client/main.c	Wed Aug 31 14:37:21 2005 -0800
   354.2 +++ b/tools/console/client/main.c	Wed Aug 31 15:22:45 2005 -0800
   354.3 @@ -176,6 +176,7 @@ int main(int argc, char **argv)
   354.4  	unsigned int len = 0;
   354.5  	struct xs_handle *xs;
   354.6  	char *end;
   354.7 +	time_t now;
   354.8  
   354.9  	while((ch = getopt_long(argc, argv, sopt, lopt, &opt_ind)) != -1) {
  354.10  		switch(ch) {
  354.11 @@ -215,13 +216,37 @@ int main(int argc, char **argv)
  354.12  
  354.13  	snprintf(path, sizeof(path), "/console/%d/tty", domid);
  354.14  	str_pty = xs_read(xs, path, &len);
  354.15 +
  354.16  	/* FIXME consoled currently does not assume domain-0 doesn't have a
  354.17  	   console which is good when we break domain-0 up.  To keep us
  354.18  	   user friendly, we'll bail out here since no data will ever show
  354.19  	   up on domain-0. */
  354.20 -	if (domid == 0 || str_pty == NULL) {
  354.21 +	if (domid == 0) {
  354.22  		err(errno, "Could not read tty from store");
  354.23  	}
  354.24 +
  354.25 +	/* Wait a little bit for tty to appear.  There is a race
  354.26 +	   condition that occurs after xend creates a domain.  This
  354.27 +	   code might be running before consoled has noticed the new
  354.28 +	   domain and setup a pty for it.
  354.29 +
  354.30 +	   A xenstore watch would slightly improve responsiveness but
  354.31 +	   a timeout would still be needed since we don't want to
  354.32 +	   block forever if given an invalid domain or worse yet, a
  354.33 +	   domain that someone else has connected to. */
  354.34 +
  354.35 +	now = time(0);
  354.36 +	while (str_pty == NULL && (now + 5) > time(0)) {
  354.37 +		struct timeval tv = { 0, 500 };
  354.38 +		select(0, NULL, NULL, NULL, &tv); /* pause briefly */
  354.39 +
  354.40 +		str_pty = xs_read(xs, path, &len);
  354.41 +	}
  354.42 +
  354.43 +	if (str_pty == NULL) {
  354.44 +		err(errno, "Could not read tty from store");
  354.45 +	}
  354.46 +
  354.47  	spty = open(str_pty, O_RDWR | O_NOCTTY);
  354.48  	if (spty == -1) {
  354.49  		err(errno, "Could not open tty `%s'", str_pty);
   355.1 --- a/tools/console/daemon/io.c	Wed Aug 31 14:37:21 2005 -0800
   355.2 +++ b/tools/console/daemon/io.c	Wed Aug 31 15:22:45 2005 -0800
   355.3 @@ -215,9 +215,6 @@ static int domain_create_ring(struct dom
   355.4  	char *dompath, *path;
   355.5  	int err;
   355.6  
   355.7 -	dom->page = NULL;
   355.8 -	dom->evtchn_fd = -1;
   355.9 -
  355.10  	asprintf(&path, "/console/%d/domain", dom->domid);
  355.11  	dompath = xs_read(xs, path, NULL);
  355.12  	free(path);
  355.13 @@ -232,28 +229,35 @@ static int domain_create_ring(struct dom
  355.14  	if (err)
  355.15  		goto out;
  355.16  
  355.17 -	dom->page = xc_map_foreign_range(xc, dom->domid, getpagesize(),
  355.18 -					 PROT_READ|PROT_WRITE, dom->mfn);
  355.19  	if (dom->page == NULL) {
  355.20 -		err = EINVAL;
  355.21 -		goto out;
  355.22 +		dom->page = xc_map_foreign_range(xc, dom->domid, getpagesize(),
  355.23 +						 PROT_READ|PROT_WRITE,
  355.24 +						 dom->mfn);
  355.25 +		if (dom->page == NULL) {
  355.26 +			err = EINVAL;
  355.27 +			goto out;
  355.28 +		}
  355.29  	}
  355.30  
  355.31 -	/* Opening evtchn independently for each console is a bit
  355.32 -	 * wastefule, but that's how the code is structured... */
  355.33 -	err = open("/dev/xen/evtchn", O_RDWR);
  355.34 -	if (err == -1) {
  355.35 -		err = errno;
  355.36 -		goto out;
  355.37 -	}
  355.38 -	dom->evtchn_fd = err;
  355.39 -
  355.40 -	if (ioctl(dom->evtchn_fd, EVENTCHN_BIND, dom->local_port) == -1) {
  355.41 -		err = errno;
  355.42 -		munmap(dom->page, getpagesize());
  355.43 -		close(dom->evtchn_fd);
  355.44 -		dom->evtchn_fd = -1;
  355.45 -		goto out;
  355.46 +	if (dom->evtchn_fd == -1) {
  355.47 +		/* Opening evtchn independently for each console is a bit
  355.48 +		 * wastefule, but that's how the code is structured... */
  355.49 +		err = open("/dev/xen/evtchn", O_RDWR);
  355.50 +		if (err == -1) {
  355.51 +			err = errno;
  355.52 +			goto out;
  355.53 +		}
  355.54 +		dom->evtchn_fd = err;
  355.55 + 
  355.56 +		if (ioctl(dom->evtchn_fd, EVENTCHN_BIND,
  355.57 +			  dom->local_port) == -1) {
  355.58 +			err = errno;
  355.59 +			munmap(dom->page, getpagesize());
  355.60 +			dom->page = NULL;
  355.61 +			close(dom->evtchn_fd);
  355.62 +			dom->evtchn_fd = -1;
  355.63 +			goto out;
  355.64 +		}
  355.65  	}
  355.66  
  355.67   out:
  355.68 @@ -281,6 +285,9 @@ static struct domain *create_domain(int 
  355.69  	dom->buffer.max_capacity = 0;
  355.70  	dom->next = NULL;
  355.71  
  355.72 +	dom->page = NULL;
  355.73 +	dom->evtchn_fd = -1;
  355.74 +
  355.75  	domain_create_ring(dom);
  355.76  
  355.77  	dolog(LOG_DEBUG, "New domain %d", domid);
  355.78 @@ -290,22 +297,19 @@ static struct domain *create_domain(int 
  355.79  
  355.80  static struct domain *lookup_domain(int domid)
  355.81  {
  355.82 -	struct domain **pp;
  355.83 +	struct domain *dom;
  355.84  
  355.85 -	for (pp = &dom_head; *pp; pp = &(*pp)->next) {
  355.86 -		struct domain *dom = *pp;
  355.87 -
  355.88 -		if (dom->domid == domid) {
  355.89 +	for (dom = dom_head; dom; dom = dom->next)
  355.90 +		if (dom->domid == domid)
  355.91  			return dom;
  355.92 -		} else if (dom->domid > domid) {
  355.93 -			*pp = create_domain(domid);
  355.94 -			(*pp)->next = dom;
  355.95 -			return *pp;
  355.96 -		}
  355.97 -	}
  355.98  
  355.99 -	*pp = create_domain(domid);
 355.100 -	return *pp;
 355.101 +	dom = create_domain(domid);
 355.102 +	if (!dom)
 355.103 +		return NULL;
 355.104 +	dom->next = dom_head;
 355.105 +	dom_head = dom;
 355.106 +
 355.107 +	return dom;
 355.108  }
 355.109  
 355.110  static void remove_domain(struct domain *dom)
 355.111 @@ -345,6 +349,20 @@ static void remove_dead_domains(struct d
 355.112  	}
 355.113  }
 355.114  
 355.115 +void enum_domains(void)
 355.116 +{
 355.117 +	int domid = 1;
 355.118 +	xc_dominfo_t dominfo;
 355.119 +	struct domain *dom;
 355.120 +
 355.121 +	while (xc_domain_getinfo(xc, domid, 1, &dominfo) == 1) {
 355.122 +		dom = lookup_domain(dominfo.domid);
 355.123 +		if (dominfo.dying || dominfo.crashed || dominfo.shutdown)
 355.124 +			dom->is_dead = true;
 355.125 +		domid = dominfo.domid + 1;
 355.126 +	}
 355.127 +}
 355.128 +
 355.129  static void handle_tty_read(struct domain *dom)
 355.130  {
 355.131  	ssize_t len;
 355.132 @@ -353,7 +371,7 @@ static void handle_tty_read(struct domai
 355.133  		(struct ring_head *)(dom->page + PAGE_SIZE/2);
 355.134  	int i;
 355.135  
 355.136 -	len = read(dom->tty_fd, msg, MAX(XENCONS_SPACE(inring), sizeof(msg)));
 355.137 +	len = read(dom->tty_fd, msg, MIN(XENCONS_SPACE(inring), sizeof(msg)));
 355.138  	if (len < 1) {
 355.139  		close(dom->tty_fd);
 355.140  		dom->tty_fd = -1;
 355.141 @@ -415,20 +433,28 @@ static void handle_xcs_msg(int fd)
 355.142  		dolog(LOG_ERR, "read from xcs failed! %m");
 355.143  		exit(1);
 355.144  	}
 355.145 +
 355.146 +	enum_domains();
 355.147  }
 355.148  
 355.149 -static void enum_domains(void)
 355.150 +static void handle_xs(int fd)
 355.151  {
 355.152 -	int domid = 0;
 355.153 -	xc_dominfo_t dominfo;
 355.154 +	char **vec;
 355.155 +	int domid;
 355.156  	struct domain *dom;
 355.157  
 355.158 -	while (xc_domain_getinfo(xc, domid, 1, &dominfo) == 1) {
 355.159 -		dom = lookup_domain(dominfo.domid);
 355.160 -		if (dominfo.dying || dominfo.crashed || dominfo.shutdown)
 355.161 -			dom->is_dead = true;
 355.162 -		domid = dominfo.domid + 1;
 355.163 +	vec = xs_read_watch(xs);
 355.164 +	if (!vec)
 355.165 +		return;
 355.166 +
 355.167 +	if (sscanf(vec[0], "/console/%d", &domid) == 1) {
 355.168 +		dom = lookup_domain(domid);
 355.169 +		if (dom && (dom->evtchn_fd == -1 || dom->page == NULL))
 355.170 +			domain_create_ring(dom);
 355.171  	}
 355.172 +
 355.173 +	xs_acknowledge_watch(xs, vec[1]);
 355.174 +	free(vec);
 355.175  }
 355.176  
 355.177  void handle_io(void)
 355.178 @@ -438,7 +464,7 @@ void handle_io(void)
 355.179  
 355.180  	do {
 355.181  		struct domain *d;
 355.182 -		struct timeval tv = { 1, 0 };
 355.183 +		struct timeval tv = { 100, 0 };
 355.184  		int max_fd = -1;
 355.185  
 355.186  		FD_ZERO(&readfds);
 355.187 @@ -447,6 +473,9 @@ void handle_io(void)
 355.188  		FD_SET(xcs_data_fd, &readfds);
 355.189  		max_fd = MAX(xcs_data_fd, max_fd);
 355.190  
 355.191 +		FD_SET(xs_fileno(xs), &readfds);
 355.192 +		max_fd = MAX(xs_fileno(xs), max_fd);
 355.193 +
 355.194  		for (d = dom_head; d; d = d->next) {
 355.195  			if (d->tty_fd != -1) {
 355.196  				FD_SET(d->tty_fd, &readfds);
 355.197 @@ -463,7 +492,9 @@ void handle_io(void)
 355.198  		}
 355.199  
 355.200  		ret = select(max_fd + 1, &readfds, &writefds, 0, &tv);
 355.201 -		enum_domains();
 355.202 +
 355.203 +		if (FD_ISSET(xs_fileno(xs), &readfds))
 355.204 +			handle_xs(xs_fileno(xs));
 355.205  
 355.206  		if (FD_ISSET(xcs_data_fd, &readfds))
 355.207  			handle_xcs_msg(xcs_data_fd);
   356.1 --- a/tools/console/daemon/io.h	Wed Aug 31 14:37:21 2005 -0800
   356.2 +++ b/tools/console/daemon/io.h	Wed Aug 31 15:22:45 2005 -0800
   356.3 @@ -21,6 +21,7 @@
   356.4  #ifndef CONSOLED_IO_H
   356.5  #define CONSOLED_IO_H
   356.6  
   356.7 +void enum_domains(void);
   356.8  void handle_io(void);
   356.9  
  356.10  #endif
   357.1 --- a/tools/console/daemon/main.c	Wed Aug 31 14:37:21 2005 -0800
   357.2 +++ b/tools/console/daemon/main.c	Wed Aug 31 15:22:45 2005 -0800
   357.3 @@ -85,6 +85,8 @@ int main(int argc, char **argv)
   357.4  
   357.5  	xen_setup();
   357.6  
   357.7 +	enum_domains();
   357.8 +
   357.9  	handle_io();
  357.10  
  357.11  	closelog();
   358.1 --- a/tools/console/daemon/utils.c	Wed Aug 31 14:37:21 2005 -0800
   358.2 +++ b/tools/console/daemon/utils.c	Wed Aug 31 15:22:45 2005 -0800
   358.3 @@ -232,11 +232,16 @@ bool xen_setup(void)
   358.4  		dolog(LOG_ERR, "xcs virq bind failed.  Possible bug.");
   358.5  		goto out_close_data;
   358.6  	}
   358.7 -	
   358.8 +
   358.9 +	if (!xs_watch(xs, "/console", "console")) {
  358.10 +		dolog(LOG_ERR, "xenstore watch on /console failes.");
  358.11 +		goto out_close_data;
  358.12 +	}
  358.13 +
  358.14  	return true;
  358.15  
  358.16   out_close_data:
  358.17 -	close(xcs_ctrl_fd);
  358.18 +	close(xcs_data_fd);
  358.19  	xcs_data_fd = -1;
  358.20   out_close_ctrl:
  358.21  	close(xcs_ctrl_fd);
   406.1 --- a/tools/examples/xmexample.vmx	Wed Aug 31 14:37:21 2005 -0800
   406.2 +++ b/tools/examples/xmexample.vmx	Wed Aug 31 15:22:45 2005 -0800
   406.3 @@ -73,6 +73,10 @@ sdl=0
   406.4  vnc=1
   406.5  
   406.6  #----------------------------------------------------------------------------
   406.7 +# enable spawning vncviewer(only valid when vnc=1), default = 1
   406.8 +vncviewer=1
   406.9 +
  406.10 +#----------------------------------------------------------------------------
  406.11  # no graphics, use serial port
  406.12  #nographic=0
  406.13  
   413.1 --- a/tools/ioemu/cpu-all.h	Wed Aug 31 14:37:21 2005 -0800
   413.2 +++ b/tools/ioemu/cpu-all.h	Wed Aug 31 15:22:45 2005 -0800
   413.3 @@ -672,6 +672,8 @@ static inline void cpu_physical_memory_w
   413.4  int cpu_memory_rw_debug(CPUState *env, target_ulong addr, 
   413.5                          uint8_t *buf, int len, int is_write);
   413.6  
   413.7 +#define VGA_DIRTY_FLAG	0x01
   413.8 +
   413.9  /* read dirty bit (return 0 or 1) */
  413.10  static inline int cpu_physical_memory_is_dirty(target_ulong addr)
  413.11  {
   414.1 --- a/tools/ioemu/exec.c	Wed Aug 31 14:37:21 2005 -0800
   414.2 +++ b/tools/ioemu/exec.c	Wed Aug 31 15:22:45 2005 -0800
   414.3 @@ -461,4 +461,14 @@ int cpu_memory_rw_debug(CPUState *env, t
   414.4  
   414.5  void cpu_physical_memory_reset_dirty(target_ulong start, target_ulong end)
   414.6  {
   414.7 +	uint8_t *p;
   414.8 +	int len;
   414.9 +
  414.10 +	if ((len = (end - start)) <= 0)
  414.11 +		return;
  414.12 +	p = phys_ram_dirty + (start >> TARGET_PAGE_BITS);
  414.13 +	len = len >> TARGET_PAGE_BITS;
  414.14 +	while (len > 0)
  414.15 +		p[--len] &= ~VGA_DIRTY_FLAG;
  414.16 +	return;
  414.17  }
   419.1 --- a/tools/ioemu/hw/pc.c	Wed Aug 31 14:37:21 2005 -0800
   419.2 +++ b/tools/ioemu/hw/pc.c	Wed Aug 31 15:22:45 2005 -0800
   419.3 @@ -540,7 +540,10 @@ void pc_init(int ram_size, int vga_ram_s
   419.4  
   419.5      if (pci_enabled) {
   419.6          for(i = 0; i < nb_nics; i++) {
   419.7 -            pci_ne2000_init(pci_bus, &nd_table[i]);
   419.8 +            if (nic_pcnet)
   419.9 +                pci_pcnet_init(pci_bus, &nd_table[i]);
  419.10 +            else
  419.11 +                pci_ne2000_init(pci_bus, &nd_table[i]); 
  419.12          }
  419.13          pci_piix3_ide_init(pci_bus, bs_table);
  419.14  #ifdef APIC_SUPPORT
   421.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
   421.2 +++ b/tools/ioemu/hw/pcnet.c	Wed Aug 31 15:22:45 2005 -0800
   421.3 @@ -0,0 +1,1205 @@
   421.4 +/*
   421.5 + * QEMU AMD PC-Net II (Am79C970A) emulation
   421.6 + * 
   421.7 + * Copyright (c) 2004 Antony T Curtis
   421.8 + * 
   421.9 + * Permission is hereby granted, free of charge, to any person obtaining a copy
  421.10 + * of this software and associated documentation files (the "Software"), to deal
  421.11 + * in the Software without restriction, including without limitation the rights
  421.12 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  421.13 + * copies of the Software, and to permit persons to whom the Software is
  421.14 + * furnished to do so, subject to the following conditions:
  421.15 + *
  421.16 + * The above copyright notice and this permission notice shall be included in
  421.17 + * all copies or substantial portions of the Software.
  421.18 + *
  421.19 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  421.20 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  421.21 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  421.22 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  421.23 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  421.24 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  421.25 + * THE SOFTWARE.
  421.26 + */
  421.27 + 
  421.28 +/* This software was written to be compatible with the specification:
  421.29 + * AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet
  421.30 + * AMD Publication# 19436  Rev:E  Amendment/0  Issue Date: June 2000
  421.31 + */
  421.32 + 
  421.33 +#include "vl.h"
  421.34 +#include <sys/times.h>
  421.35 +#include <arpa/inet.h>
  421.36 +#include <net/ethernet.h>
  421.37 +
  421.38 +//#define PCNET_DEBUG
  421.39 +//#define PCNET_DEBUG_IO
  421.40 +//#define PCNET_DEBUG_BCR
  421.41 +//#define PCNET_DEBUG_CSR
  421.42 +//#define PCNET_DEBUG_RMD
  421.43 +//#define PCNET_DEBUG_TMD
  421.44 +//#define PCNET_DEBUG_MATCH
  421.45 +
  421.46 +
  421.47 +#define PCNET_IOPORT_SIZE       0x20
  421.48 +#define PCNET_PNPMMIO_SIZE      0x20
  421.49 +
  421.50 +
  421.51 +typedef struct PCNetState_st PCNetState;
  421.52 +
  421.53 +struct PCNetState_st {
  421.54 +    PCIDevice dev;
  421.55 +    NetDriverState *nd;
  421.56 +    QEMUTimer *poll_timer;
  421.57 +    int mmio_io_addr, rap, isr, lnkst;
  421.58 +    target_phys_addr_t rdra, tdra;
  421.59 +    uint8_t prom[16];
  421.60 +    uint16_t csr[128];
  421.61 +    uint16_t bcr[32];
  421.62 +    uint64_t timer;
  421.63 +    int xmit_pos, recv_pos;
  421.64 +    uint8_t buffer[4096];
  421.65 +};
  421.66 +
  421.67 +#include "pcnet.h"
  421.68 +
  421.69 +static void pcnet_poll(PCNetState *s);
  421.70 +static void pcnet_poll_timer(void *opaque);
  421.71 +
  421.72 +static uint32_t pcnet_csr_readw(PCNetState *s, uint32_t rap);
  421.73 +static void pcnet_csr_writew(PCNetState *s, uint32_t rap, uint32_t new_value);
  421.74 +static void pcnet_bcr_writew(PCNetState *s, uint32_t rap, uint32_t val);
  421.75 +static uint32_t pcnet_bcr_readw(PCNetState *s, uint32_t rap);
  421.76 +
  421.77 +static void pcnet_s_reset(PCNetState *s)
  421.78 +{
  421.79 +#ifdef PCNET_DEBUG
  421.80 +    printf("pcnet_s_reset\n");
  421.81 +#endif
  421.82 +
  421.83 +    s->lnkst = 0x40;
  421.84 +    s->rdra = 0;
  421.85 +    s->tdra = 0;
  421.86 +    s->rap = 0;
  421.87 +    
  421.88 +    s->bcr[BCR_BSBC] &= ~0x0080;
  421.89 +
  421.90 +    s->csr[0]   = 0x0004;
  421.91 +    s->csr[3]   = 0x0000;
  421.92 +    s->csr[4]   = 0x0115;
  421.93 +    s->csr[5]   = 0x0000;
  421.94 +    s->csr[6]   = 0x0000;
  421.95 +    s->csr[8]   = 0;
  421.96 +    s->csr[9]   = 0;
  421.97 +    s->csr[10]  = 0;
  421.98 +    s->csr[11]  = 0;
  421.99 +    s->csr[12]  = le16_to_cpu(((uint16_t *)&s->prom[0])[0]);
 421.100 +    s->csr[13]  = le16_to_cpu(((uint16_t *)&s->prom[0])[1]);
 421.101 +    s->csr[14]  = le16_to_cpu(((uint16_t *)&s->prom[0])[2]);
 421.102 +    s->csr[15] &= 0x21c4;
 421.103 +    s->csr[72]  = 1;
 421.104 +    s->csr[74]  = 1;
 421.105 +    s->csr[76]  = 1;
 421.106 +    s->csr[78]  = 1;
 421.107 +    s->csr[80]  = 0x1410;
 421.108 +    s->csr[88]  = 0x1003;
 421.109 +    s->csr[89]  = 0x0262;
 421.110 +    s->csr[94]  = 0x0000;
 421.111 +    s->csr[100] = 0x0200;
 421.112 +    s->csr[103] = 0x0105;
 421.113 +    s->csr[103] = 0x0105;
 421.114 +    s->csr[112] = 0x0000;
 421.115 +    s->csr[114] = 0x0000;
 421.116 +    s->csr[122] = 0x0000;
 421.117 +    s->csr[124] = 0x0000;
 421.118 +}
 421.119 +
 421.120 +static void pcnet_update_irq(PCNetState *s)
 421.121 +{
 421.122 +    int isr = 0;
 421.123 +    s->csr[0] &= ~0x0080;
 421.124 +    
 421.125 +#if 1
 421.126 +    if (((s->csr[0] & ~s->csr[3]) & 0x5f00) ||
 421.127 +        (((s->csr[4]>>1) & ~s->csr[4]) & 0x0115) ||
 421.128 +        (((s->csr[5]>>1) & s->csr[5]) & 0x0048))
 421.129 +#else
 421.130 +    if ((!(s->csr[3] & 0x4000) && !!(s->csr[0] & 0x4000)) /* BABL */ ||
 421.131 +        (!(s->csr[3] & 0x1000) && !!(s->csr[0] & 0x1000)) /* MISS */ ||
 421.132 +        (!(s->csr[3] & 0x0100) && !!(s->csr[0] & 0x0100)) /* IDON */ ||
 421.133 +        (!(s->csr[3] & 0x0200) && !!(s->csr[0] & 0x0200)) /* TINT */ ||
 421.134 +        (!(s->csr[3] & 0x0400) && !!(s->csr[0] & 0x0400)) /* RINT */ ||
 421.135 +        (!(s->csr[3] & 0x0800) && !!(s->csr[0] & 0x0800)) /* MERR */ ||
 421.136 +        (!(s->csr[4] & 0x0001) && !!(s->csr[4] & 0x0002)) /* JAB */ ||
 421.137 +        (!(s->csr[4] & 0x0004) && !!(s->csr[4] & 0x0008)) /* TXSTRT */ ||
 421.138 +        (!(s->csr[4] & 0x0010) && !!(s->csr[4] & 0x0020)) /* RCVO */ ||
 421.139 +        (!(s->csr[4] & 0x0100) && !!(s->csr[4] & 0x0200)) /* MFCO */ ||
 421.140 +        (!!(s->csr[5] & 0x0040) && !!(s->csr[5] & 0x0080)) /* EXDINT */ ||
 421.141 +        (!!(s->csr[5] & 0x0008) && !!(s->csr[5] & 0x0010)) /* MPINT */)
 421.142 +#endif
 421.143 +    {
 421.144 +       
 421.145 +        isr = CSR_INEA(s);
 421.146 +        s->csr[0] |= 0x0080;
 421.147 +    }
 421.148 +    
 421.149 +    if (!!(s->csr[4] & 0x0080) && CSR_INEA(s)) { /* UINT */
 421.150 +        s->csr[4] &= ~0x0080;
 421.151 +        s->csr[4] |= 0x0040;
 421.152 +        s->csr[0] |= 0x0080;
 421.153 +        isr = 1;
 421.154 +#ifdef PCNET_DEBUG
 421.155 +        printf("pcnet user int\n");
 421.156 +#endif
 421.157 +    }
 421.158 +
 421.159 +#if 1
 421.160 +    if (((s->csr[5]>>1) & s->csr[5]) & 0x0500) 
 421.161 +#else
 421.162 +    if ((!!(s->csr[5] & 0x0400) && !!(s->csr[5] & 0x0800)) /* SINT */ ||
 421.163 +        (!!(s->csr[5] & 0x0100) && !!(s->csr[5] & 0x0200)) /* SLPINT */ )
 421.164 +#endif
 421.165 +    {
 421.166 +        isr = 1;
 421.167 +        s->csr[0] |= 0x0080;
 421.168 +    }
 421.169 +
 421.170 +    if (isr != s->isr) {
 421.171 +#ifdef PCNET_DEBUG
 421.172 +        printf("pcnet: INTA=%d\n", isr);
 421.173 +#endif
 421.174 +    }
 421.175 +        pci_set_irq(&s->dev, 0, isr);
 421.176 +        s->isr = isr;
 421.177 +}
 421.178 +
 421.179 +static void pcnet_init(PCNetState *s)
 421.180 +{
 421.181 +#ifdef PCNET_DEBUG
 421.182 +    printf("pcnet_init init_addr=0x%08x\n", PHYSADDR(s,CSR_IADR(s)));
 421.183 +#endif
 421.184 +    
 421.185 +#define PCNET_INIT() do { \
 421.186 +        cpu_physical_memory_read(PHYSADDR(s,CSR_IADR(s)),       \
 421.187 +                (uint8_t *)&initblk, sizeof(initblk));          \
 421.188 +        s->csr[15] = le16_to_cpu(initblk.mode);                 \
 421.189 +        CSR_RCVRL(s) = (initblk.rlen < 9) ? (1 << initblk.rlen) : 512;  \
 421.190 +        CSR_XMTRL(s) = (initblk.tlen < 9) ? (1 << initblk.tlen) : 512;  \
 421.191 +        s->csr[ 6] = (initblk.tlen << 12) | (initblk.rlen << 8);        \
 421.192 +        s->csr[ 8] = le16_to_cpu(initblk.ladrf1);                       \
 421.193 +        s->csr[ 9] = le16_to_cpu(initblk.ladrf2);                       \
 421.194 +        s->csr[10] = le16_to_cpu(initblk.ladrf3);                       \
 421.195 +        s->csr[11] = le16_to_cpu(initblk.ladrf4);                       \
 421.196 +        s->csr[12] = le16_to_cpu(initblk.padr1);                        \
 421.197 +        s->csr[13] = le16_to_cpu(initblk.padr2);                        \
 421.198 +        s->csr[14] = le16_to_cpu(initblk.padr3);                        \
 421.199 +        s->rdra = PHYSADDR(s,initblk.rdra);                             \
 421.200 +        s->tdra = PHYSADDR(s,initblk.tdra);                             \
 421.201 +} while (0)
 421.202 +    
 421.203 +    if (BCR_SSIZE32(s)) {
 421.204 +        struct pcnet_initblk32 initblk;
 421.205 +        PCNET_INIT();
 421.206 +#ifdef PCNET_DEBUG
 421.207 +        printf("initblk.rlen=0x%02x, initblk.tlen=0x%02x\n",
 421.208 +                initblk.rlen, initblk.tlen);
 421.209 +#endif
 421.210 +    } else {
 421.211 +        struct pcnet_initblk16 initblk;
 421.212 +        PCNET_INIT();
 421.213 +#ifdef PCNET_DEBUG
 421.214 +        printf("initblk.rlen=0x%02x, initblk.tlen=0x%02x\n",
 421.215 +                initblk.rlen, initblk.tlen);
 421.216 +#endif
 421.217 +    }
 421.218 +
 421.219 +#undef PCNET_INIT
 421.220 +
 421.221 +    CSR_RCVRC(s) = CSR_RCVRL(s);
 421.222 +    CSR_XMTRC(s) = CSR_XMTRL(s);
 421.223 +
 421.224 +#ifdef PCNET_DEBUG
 421.225 +    printf("pcnet ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]\n", 
 421.226 +        BCR_SSIZE32(s),
 421.227 +        s->rdra, CSR_RCVRL(s), s->tdra, CSR_XMTRL(s));
 421.228 +#endif
 421.229 +
 421.230 +    s->csr[0] |= 0x0101;    
 421.231 +    s->csr[0] &= ~0x0004;       /* clear STOP bit */
 421.232 +}
 421.233 +
 421.234 +static void pcnet_start(PCNetState *s)
 421.235 +{
 421.236 +#ifdef PCNET_DEBUG
 421.237 +    printf("pcnet_start\n");
 421.238 +#endif
 421.239 +
 421.240 +    if (!CSR_DTX(s))
 421.241 +        s->csr[0] |= 0x0010;    /* set TXON */
 421.242 +        
 421.243 +    if (!CSR_DRX(s))
 421.244 +        s->csr[0] |= 0x0020;    /* set RXON */
 421.245 +
 421.246 +    s->csr[0] &= ~0x0004;       /* clear STOP bit */
 421.247 +    s->csr[0] |= 0x0002;
 421.248 +}
 421.249 +
 421.250 +static void pcnet_stop(PCNetState *s)
 421.251 +{
 421.252 +#ifdef PCNET_DEBUG
 421.253 +    printf("pcnet_stop\n");
 421.254 +#endif
 421.255 +    s->csr[0] &= ~0x7feb;
 421.256 +    s->csr[0] |= 0x0014;
 421.257 +    s->csr[4] &= ~0x02c2;
 421.258 +    s->csr[5] &= ~0x0011;
 421.259 +    pcnet_poll_timer(s);
 421.260 +}
 421.261 +
 421.262 +static void pcnet_rdte_poll(PCNetState *s)
 421.263 +{
 421.264 +    s->csr[28] = s->csr[29] = 0;
 421.265 +    if (s->rdra) {
 421.266 +        int bad = 0;
 421.267 +#if 1
 421.268 +        target_phys_addr_t crda = pcnet_rdra_addr(s, CSR_RCVRC(s));
 421.269 +        target_phys_addr_t nrda = pcnet_rdra_addr(s, -1 + CSR_RCVRC(s));
 421.270 +        target_phys_addr_t nnrd = pcnet_rdra_addr(s, -2 + CSR_RCVRC(s));
 421.271 +#else
 421.272 +        target_phys_addr_t crda = s->rdra + 
 421.273 +            (CSR_RCVRL(s) - CSR_RCVRC(s)) *
 421.274 +            (BCR_SWSTYLE(s) ? 16 : 8 );
 421.275 +        int nrdc = CSR_RCVRC(s)<=1 ? CSR_RCVRL(s) : CSR_RCVRC(s)-1;
 421.276 +        target_phys_addr_t nrda = s->rdra + 
 421.277 +            (CSR_RCVRL(s) - nrdc) *
 421.278 +            (BCR_SWSTYLE(s) ? 16 : 8 );
 421.279 +        int nnrc = nrdc<=1 ? CSR_RCVRL(s) : nrdc-1;
 421.280 +        target_phys_addr_t nnrd = s->rdra + 
 421.281 +            (CSR_RCVRL(s) - nnrc) *
 421.282 +            (BCR_SWSTYLE(s) ? 16 : 8 );
 421.283 +#endif
 421.284 +
 421.285 +        CHECK_RMD(PHYSADDR(s,crda), bad);
 421.286 +        if (!bad) {
 421.287 +            CHECK_RMD(PHYSADDR(s,nrda), bad);
 421.288 +            if (bad || (nrda == crda)) nrda = 0;
 421.289 +            CHECK_RMD(PHYSADDR(s,nnrd), bad);
 421.290 +            if (bad || (nnrd == crda)) nnrd = 0;
 421.291 +
 421.292 +            s->csr[28] = crda & 0xffff;
 421.293 +            s->csr[29] = crda >> 16;
 421.294 +            s->csr[26] = nrda & 0xffff;
 421.295 +            s->csr[27] = nrda >> 16;
 421.296 +            s->csr[36] = nnrd & 0xffff;
 421.297 +            s->csr[37] = nnrd >> 16;
 421.298 +#ifdef PCNET_DEBUG
 421.299 +            if (bad) {
 421.300 +                printf("pcnet: BAD RMD RECORDS AFTER 0x%08x\n",
 421.301 +                       PHYSADDR(s,crda));
 421.302 +            }
 421.303 +        } else {
 421.304 +            printf("pcnet: BAD RMD RDA=0x%08x\n", PHYSADDR(s,crda));
 421.305 +#endif
 421.306 +        }
 421.307 +    }
 421.308 +    
 421.309 +    if (CSR_CRDA(s)) {
 421.310 +        struct pcnet_RMD rmd;
 421.311 +        RMDLOAD(&rmd, PHYSADDR(s,CSR_CRDA(s)));
 421.312 +        CSR_CRBC(s) = rmd.rmd1.bcnt;
 421.313 +        CSR_CRST(s) = ((uint32_t *)&rmd)[1] >> 16;
 421.314 +#ifdef PCNET_DEBUG_RMD_X
 421.315 +        printf("CRDA=0x%08x CRST=0x%04x RCVRC=%d RMD1=0x%08x RMD2=0x%08x\n",
 421.316 +                PHYSADDR(s,CSR_CRDA(s)), CSR_CRST(s), CSR_RCVRC(s),
 421.317 +                ((uint32_t *)&rmd)[1], ((uint32_t *)&rmd)[2]);
 421.318 +        PRINT_RMD(&rmd);
 421.319 +#endif
 421.320 +    } else {
 421.321 +        CSR_CRBC(s) = CSR_CRST(s) = 0;
 421.322 +    }
 421.323 +    
 421.324 +    if (CSR_NRDA(s)) {
 421.325 +        struct pcnet_RMD rmd;
 421.326 +        RMDLOAD(&rmd, PHYSADDR(s,CSR_NRDA(s)));
 421.327 +        CSR_NRBC(s) = rmd.rmd1.bcnt;
 421.328 +        CSR_NRST(s) = ((uint32_t *)&rmd)[1] >> 16;
 421.329 +    } else {
 421.330 +        CSR_NRBC(s) = CSR_NRST(s) = 0;
 421.331 +    }
 421.332 +
 421.333 +}
 421.334 +
 421.335 +static int pcnet_tdte_poll(PCNetState *s)
 421.336 +{
 421.337 +    s->csr[34] = s->csr[35] = 0;
 421.338 +    if (s->tdra) {
 421.339 +        target_phys_addr_t cxda = s->tdra + 
 421.340 +            (CSR_XMTRL(s) - CSR_XMTRC(s)) *
 421.341 +            (BCR_SWSTYLE(s) ? 16 : 8 );
 421.342 +        int bad = 0;
 421.343 +        CHECK_TMD(PHYSADDR(s, cxda),bad);
 421.344 +        if (!bad) {
 421.345 +            if (CSR_CXDA(s) != cxda) {
 421.346 +                s->csr[60] = s->csr[34];
 421.347 +                s->csr[61] = s->csr[35];
 421.348 +                s->csr[62] = CSR_CXBC(s);
 421.349 +                s->csr[63] = CSR_CXST(s);
 421.350 +            }
 421.351 +            s->csr[34] = cxda & 0xffff;
 421.352 +            s->csr[35] = cxda >> 16;
 421.353 +#ifdef PCNET_DEBUG
 421.354 +        } else {
 421.355 +            printf("pcnet: BAD TMD XDA=0x%08x\n", PHYSADDR(s,cxda));
 421.356 +#endif
 421.357 +        }
 421.358 +    }
 421.359 +
 421.360 +    if (CSR_CXDA(s)) {
 421.361 +        struct pcnet_TMD tmd;
 421.362 +
 421.363 +        TMDLOAD(&tmd, PHYSADDR(s,CSR_CXDA(s)));                
 421.364 +
 421.365 +        CSR_CXBC(s) = tmd.tmd1.bcnt;
 421.366 +        CSR_CXST(s) = ((uint32_t *)&tmd)[1] >> 16;
 421.367 +    } else {
 421.368 +        CSR_CXBC(s) = CSR_CXST(s) = 0;
 421.369 +    }
 421.370 +    
 421.371 +    return !!(CSR_CXST(s) & 0x8000);
 421.372 +}
 421.373 +
 421.374 +static int pcnet_can_receive(void *opaque)
 421.375 +{
 421.376 +    PCNetState *s = opaque;
 421.377 +    if (CSR_STOP(s) || CSR_SPND(s))
 421.378 +        return 0;
 421.379 +        
 421.380 +    if (s->recv_pos > 0)
 421.381 +        return 0;
 421.382 +
 421.383 +    return sizeof(s->buffer)-16;
 421.384 +}
 421.385 +
 421.386 +static void pcnet_receive(void *opaque, const uint8_t *buf, int size)
 421.387 +{
 421.388 +    PCNetState *s = opaque;
 421.389 +    int is_padr = 0, is_bcast = 0, is_ladr = 0;
 421.390 +
 421.391 +    if (CSR_DRX(s) || CSR_STOP(s) || CSR_SPND(s) || !size)
 421.392 +        return;
 421.393 +
 421.394 +#ifdef PCNET_DEBUG
 421.395 +    printf("pcnet_receive size=%d\n", size);
 421.396 +#endif
 421.397 +
 421.398 +    if (CSR_PROM(s) 
 421.399 +        || (is_padr=padr_match(s, buf, size)) 
 421.400 +        || (is_bcast=padr_bcast(s, buf, size))
 421.401 +        || (is_ladr=ladr_match(s, buf, size))) {
 421.402 +
 421.403 +        pcnet_rdte_poll(s);
 421.404 +
 421.405 +        if (!(CSR_CRST(s) & 0x8000) && s->rdra) {
 421.406 +            struct pcnet_RMD rmd;
 421.407 +            int rcvrc = CSR_RCVRC(s)-1,i;
 421.408 +            target_phys_addr_t nrda;
 421.409 +            for (i = CSR_RCVRL(s)-1; i > 0; i--, rcvrc--) {
 421.410 +                if (rcvrc <= 1)
 421.411 +                    rcvrc = CSR_RCVRL(s);
 421.412 +                nrda = s->rdra +
 421.413 +                    (CSR_RCVRL(s) - rcvrc) *
 421.414 +                    (BCR_SWSTYLE(s) ? 16 : 8 );
 421.415 +                RMDLOAD(&rmd, PHYSADDR(s,nrda));                  
 421.416 +                if (rmd.rmd1.own) {                
 421.417 +#ifdef PCNET_DEBUG_RMD
 421.418 +                    printf("pcnet - scan buffer: RCVRC=%d PREV_RCVRC=%d\n", 
 421.419 +                                rcvrc, CSR_RCVRC(s));
 421.420 +#endif
 421.421 +                    CSR_RCVRC(s) = rcvrc;
 421.422 +                    pcnet_rdte_poll(s);
 421.423 +                    break;
 421.424 +                }
 421.425 +            }
 421.426 +        }
 421.427 +
 421.428 +        if (!(CSR_CRST(s) & 0x8000)) {
 421.429 +#ifdef PCNET_DEBUG_RMD
 421.430 +            printf("pcnet - no buffer: RCVRC=%d\n", CSR_RCVRC(s));
 421.431 +#endif
 421.432 +            s->csr[0] |= 0x1000; /* Set MISS flag */
 421.433 +            CSR_MISSC(s)++;
 421.434 +        } else {
 421.435 +            uint8_t *src = &s->buffer[8];
 421.436 +            target_phys_addr_t crda = CSR_CRDA(s);
 421.437 +            struct pcnet_RMD rmd;
 421.438 +            int pktcount = 0;
 421.439 +
 421.440 +            memcpy(src, buf, size);
 421.441 +            
 421.442 +            if (!CSR_ASTRP_RCV(s)) {
 421.443 +                uint32_t fcs = ~0;
 421.444 +#if 0            
 421.445 +                uint8_t *p = s->buffer;
 421.446 +                
 421.447 +                ((uint32_t *)p)[0] = ((uint32_t *)p)[1] = 0xaaaaaaaa;
 421.448 +                p[7] = 0xab;
 421.449 +#else
 421.450 +                uint8_t *p = src;
 421.451 +#endif
 421.452 +
 421.453 +                while (size < 46) {
 421.454 +                    src[size++] = 0;
 421.455 +                }
 421.456 +                
 421.457 +                while (p != &src[size]) {
 421.458 +                    CRC(fcs, *p++);
 421.459 +                }
 421.460 +                ((uint32_t *)&src[size])[0] = htonl(fcs);
 421.461 +                size += 4; /* FCS at end of packet */
 421.462 +            } else size += 4;
 421.463 +
 421.464 +#ifdef PCNET_DEBUG_MATCH
 421.465 +            PRINT_PKTHDR(buf);
 421.466 +#endif
 421.467 +
 421.468 +            RMDLOAD(&rmd, PHYSADDR(s,crda));
 421.469 +            /*if (!CSR_LAPPEN(s))*/
 421.470 +                rmd.rmd1.stp = 1;
 421.471 +
 421.472 +#define PCNET_RECV_STORE() do {                                 \
 421.473 +    int count = MIN(4096 - rmd.rmd1.bcnt,size);                 \
 421.474 +    target_phys_addr_t rbadr = PHYSADDR(s, rmd.rmd0.rbadr);     \
 421.475 +    cpu_physical_memory_write(rbadr, src, count);               \
 421.476 +    cpu_physical_memory_set_dirty(rbadr);                       \
 421.477 +    cpu_physical_memory_set_dirty(rbadr+count);                 \
 421.478 +    src += count; size -= count;                                \
 421.479 +    rmd.rmd2.mcnt = count; rmd.rmd1.own = 0;                    \
 421.480 +    RMDSTORE(&rmd, PHYSADDR(s,crda));                           \
 421.481 +    pktcount++;                                                 \
 421.482 +} while (0)
 421.483 +
 421.484 +            PCNET_RECV_STORE();
 421.485 +            if ((size > 0) && CSR_NRDA(s)) {
 421.486 +                target_phys_addr_t nrda = CSR_NRDA(s);
 421.487 +                RMDLOAD(&rmd, PHYSADDR(s,nrda));
 421.488 +                if (rmd.rmd1.own) {
 421.489 +                    crda = nrda;
 421.490 +                    PCNET_RECV_STORE();
 421.491 +                    if ((size > 0) && (nrda=CSR_NNRD(s))) {
 421.492 +                        RMDLOAD(&rmd, PHYSADDR(s,nrda));
 421.493 +                        if (rmd.rmd1.own) {
 421.494 +                            crda = nrda;
 421.495 +                            PCNET_RECV_STORE();
 421.496 +                        }
 421.497 +                    }
 421.498 +                }                
 421.499 +            }
 421.500 +
 421.501 +#undef PCNET_RECV_STORE
 421.502 +
 421.503 +            RMDLOAD(&rmd, PHYSADDR(s,crda));
 421.504 +            if (size == 0) {
 421.505 +                rmd.rmd1.enp = 1;
 421.506 +                rmd.rmd1.pam = !CSR_PROM(s) && is_padr;
 421.507 +                rmd.rmd1.lafm = !CSR_PROM(s) && is_ladr;
 421.508 +                rmd.rmd1.bam = !CSR_PROM(s) && is_bcast;
 421.509 +            } else {
 421.510 +                rmd.rmd1.oflo = 1;
 421.511 +                rmd.rmd1.buff = 1;
 421.512 +                rmd.rmd1.err = 1;
 421.513 +            }
 421.514 +            RMDSTORE(&rmd, PHYSADDR(s,crda));
 421.515 +            s->csr[0] |= 0x0400;
 421.516 +
 421.517 +#ifdef PCNET_DEBUG
 421.518 +            printf("RCVRC=%d CRDA=0x%08x BLKS=%d\n", 
 421.519 +                CSR_RCVRC(s), PHYSADDR(s,CSR_CRDA(s)), pktcount);
 421.520 +#endif
 421.521 +#ifdef PCNET_DEBUG_RMD
 421.522 +            PRINT_RMD(&rmd);
 421.523 +#endif        
 421.524 +
 421.525 +            while (pktcount--) {
 421.526 +                if (CSR_RCVRC(s) <= 1)
 421.527 +                    CSR_RCVRC(s) = CSR_RCVRL(s);
 421.528 +                else
 421.529 +                    CSR_RCVRC(s)--;            
 421.530 +            }
 421.531 +            
 421.532 +            pcnet_rdte_poll(s);
 421.533 +
 421.534 +        }        
 421.535 +    }
 421.536 +
 421.537 +    pcnet_poll(s);
 421.538 +    pcnet_update_irq(s);    
 421.539 +}
 421.540 +
 421.541 +static void pcnet_transmit(PCNetState *s)
 421.542 +{
 421.543 +    target_phys_addr_t xmit_cxda = 0;
 421.544 +    int count = CSR_XMTRL(s)-1;
 421.545 +    s->xmit_pos = -1;
 421.546 +    
 421.547 +    if (!CSR_TXON(s)) {
 421.548 +        s->csr[0] &= ~0x0008;
 421.549 +        return;
 421.550 +    }
 421.551 +    
 421.552 +    txagain:
 421.553 +    if (pcnet_tdte_poll(s)) {
 421.554 +        struct pcnet_TMD tmd;
 421.555 +
 421.556 +        TMDLOAD(&tmd, PHYSADDR(s,CSR_CXDA(s)));                
 421.557 +
 421.558 +#ifdef PCNET_DEBUG_TMD
 421.559 +        printf("  TMDLOAD 0x%08x\n", PHYSADDR(s,CSR_CXDA(s)));
 421.560 +        PRINT_TMD(&tmd);
 421.561 +#endif
 421.562 +        if (tmd.tmd1.stp) {
 421.563 +            s->xmit_pos = 0;                
 421.564 +            if (!tmd.tmd1.enp) {
 421.565 +                cpu_physical_memory_read(PHYSADDR(s, tmd.tmd0.tbadr),
 421.566 +                        s->buffer, 4096 - tmd.tmd1.bcnt);
 421.567 +                s->xmit_pos += 4096 - tmd.tmd1.bcnt;
 421.568 +            } 
 421.569 +            xmit_cxda = PHYSADDR(s,CSR_CXDA(s));
 421.570 +        }
 421.571 +        if (tmd.tmd1.enp && (s->xmit_pos >= 0)) {
 421.572 +            cpu_physical_memory_read(PHYSADDR(s, tmd.tmd0.tbadr),
 421.573 +                    s->buffer + s->xmit_pos, 4096 - tmd.tmd1.bcnt);
 421.574 +            s->xmit_pos += 4096 - tmd.tmd1.bcnt;
 421.575 +#ifdef PCNET_DEBUG
 421.576 +            printf("pcnet_transmit size=%d\n", s->xmit_pos);
 421.577 +#endif            
 421.578 +            if (CSR_LOOP(s))
 421.579 +                pcnet_receive(s, s->buffer, s->xmit_pos);
 421.580 +            else
 421.581 +                qemu_send_packet(s->nd, s->buffer, s->xmit_pos);
 421.582 +
 421.583 +            s->csr[0] &= ~0x0008;   /* clear TDMD */
 421.584 +            s->csr[4] |= 0x0004;    /* set TXSTRT */
 421.585 +            s->xmit_pos = -1;
 421.586 +        }
 421.587 +
 421.588 +        tmd.tmd1.own = 0;
 421.589 +        TMDSTORE(&tmd, PHYSADDR(s,CSR_CXDA(s)));
 421.590 +        if (!CSR_TOKINTD(s) || (CSR_LTINTEN(s) && tmd.tmd1.ltint))
 421.591 +            s->csr[0] |= 0x0200;    /* set TINT */
 421.592 +
 421.593 +        if (CSR_XMTRC(s)<=1)
 421.594 +            CSR_XMTRC(s) = CSR_XMTRL(s);
 421.595 +        else
 421.596 +            CSR_XMTRC(s)--;
 421.597 +        if (count--)
 421.598 +            goto txagain;
 421.599 +
 421.600 +    } else 
 421.601 +    if (s->xmit_pos >= 0) {
 421.602 +        struct pcnet_TMD tmd;
 421.603 +        TMDLOAD(&tmd, PHYSADDR(s,xmit_cxda));                
 421.604 +        tmd.tmd2.buff = tmd.tmd2.uflo = tmd.tmd1.err = 1;
 421.605 +        tmd.tmd1.own = 0;
 421.606 +        TMDSTORE(&tmd, PHYSADDR(s,xmit_cxda));
 421.607 +        s->csr[0] |= 0x0200;    /* set TINT */
 421.608 +        if (!CSR_DXSUFLO(s)) {
 421.609 +            s->csr[0] &= ~0x0010;
 421.610 +        } else
 421.611 +        if (count--)
 421.612 +          goto txagain;
 421.613 +    }
 421.614 +}
 421.615 +
 421.616 +static void pcnet_poll(PCNetState *s)
 421.617 +{
 421.618 +    if (CSR_RXON(s)) {
 421.619 +        pcnet_rdte_poll(s);
 421.620 +    }
 421.621 +
 421.622 +    if (CSR_TDMD(s) || 
 421.623 +        (CSR_TXON(s) && !CSR_DPOLL(s) && pcnet_tdte_poll(s)))
 421.624 +        pcnet_transmit(s);
 421.625 +}
 421.626 +
 421.627 +static void pcnet_poll_timer(void *opaque)
 421.628 +{
 421.629 +    PCNetState *s = opaque;
 421.630 +
 421.631 +    qemu_del_timer(s->poll_timer);
 421.632 +
 421.633 +    if (CSR_TDMD(s)) {
 421.634 +        pcnet_transmit(s);
 421.635 +    }
 421.636 +
 421.637 +    pcnet_update_irq(s);    
 421.638 +
 421.639 +    if (!CSR_STOP(s) && !CSR_SPND(s) && !CSR_DPOLL(s)) {
 421.640 +        uint64_t now = qemu_get_clock(vm_clock) * 33;
 421.641 +        if (!s->timer || !now)
 421.642 +            s->timer = now;
 421.643 +        else {
 421.644 +            uint64_t t = now - s->timer + CSR_POLL(s);
 421.645 +            if (t > 0xffffLL) {
 421.646 +                pcnet_poll(s);
 421.647 +                CSR_POLL(s) = CSR_PINT(s);
 421.648 +            } else
 421.649 +                CSR_POLL(s) = t;
 421.650 +        }
 421.651 +        qemu_mod_timer(s->poll_timer, 
 421.652 +            pcnet_get_next_poll_time(s,qemu_get_clock(vm_clock)));
 421.653 +    }
 421.654 +}
 421.655 +
 421.656 +
 421.657 +static void pcnet_csr_writew(PCNetState *s, uint32_t rap, uint32_t new_value)
 421.658 +{
 421.659 +    uint16_t val = new_value;
 421.660 +#ifdef PCNET_DEBUG_CSR
 421.661 +    printf("pcnet_csr_writew rap=%d val=0x%04x\n", rap, val);
 421.662 +#endif
 421.663 +    switch (rap) {
 421.664 +    case 0:
 421.665 +        s->csr[0] &= ~(val & 0x7f00); /* Clear any interrupt flags */
 421.666 +
 421.667 +        s->csr[0] = (s->csr[0] & ~0x0040) | (val & 0x0048);
 421.668 +
 421.669 +        val = (val & 0x007f) | (s->csr[0] & 0x7f00);
 421.670 +
 421.671 +        /* IFF STOP, STRT and INIT are set, clear STRT and INIT */
 421.672 +        if ((val&7) == 7)
 421.673 +          val &= ~3;
 421.674 +
 421.675 +        if (!CSR_STOP(s) && (val & 4))
 421.676 +            pcnet_stop(s);
 421.677 +
 421.678 +        if (!CSR_INIT(s) && (val & 1))
 421.679 +            pcnet_init(s);
 421.680 +
 421.681 +        if (!CSR_STRT(s) && (val & 2))
 421.682 +            pcnet_start(s);
 421.683 +
 421.684 +        if (CSR_TDMD(s)) 
 421.685 +            pcnet_transmit(s);
 421.686 +
 421.687 +        return;
 421.688 +    case 1:
 421.689 +    case 2:
 421.690 +    case 8:
 421.691 +    case 9:
 421.692 +    case 10:
 421.693 +    case 11:
 421.694 +    case 12:
 421.695 +    case 13:
 421.696 +    case 14:
 421.697 +    case 15:
 421.698 +    case 18: /* CRBAL */
 421.699 +    case 19: /* CRBAU */
 421.700 +    case 20: /* CXBAL */
 421.701 +    case 21: /* CXBAU */
 421.702 +    case 22: /* NRBAU */
 421.703 +    case 23: /* NRBAU */
 421.704 +    case 24:
 421.705 +    case 25:
 421.706 +    case 26:
 421.707 +    case 27:
 421.708 +    case 28:
 421.709 +    case 29:
 421.710 +    case 30:
 421.711 +    case 31:
 421.712 +    case 32:
 421.713 +    case 33:
 421.714 +    case 34:
 421.715 +    case 35:
 421.716 +    case 36:
 421.717 +    case 37:
 421.718 +    case 38:
 421.719 +    case 39:
 421.720 +    case 40: /* CRBC */
 421.721 +    case 41:
 421.722 +    case 42: /* CXBC */
 421.723 +    case 43:
 421.724 +    case 44:
 421.725 +    case 45:
 421.726 +    case 46: /* POLL */
 421.727 +    case 47: /* POLLINT */
 421.728 +    case 72:
 421.729 +    case 74:
 421.730 +    case 76: /* RCVRL */
 421.731 +    case 78: /* XMTRL */
 421.732 +    case 112:
 421.733 +       if (CSR_STOP(s) || CSR_SPND(s))
 421.734 +           break;
 421.735 +       return;
 421.736 +    case 3:
 421.737 +        break;
 421.738 +    case 4:
 421.739 +        s->csr[4] &= ~(val & 0x026a); 
 421.740 +        val &= ~0x026a; val |= s->csr[4] & 0x026a;
 421.741 +        break;
 421.742 +    case 5:
 421.743 +        s->csr[5] &= ~(val & 0x0a90); 
 421.744 +        val &= ~0x0a90; val |= s->csr[5] & 0x0a90;
 421.745 +        break;
 421.746 +    case 16:
 421.747 +        pcnet_csr_writew(s,1,val);
 421.748 +        return;
 421.749 +    case 17:
 421.750 +        pcnet_csr_writew(s,2,val);
 421.751 +        return;
 421.752 +    case 58:
 421.753 +        pcnet_bcr_writew(s,BCR_SWS,val);
 421.754 +        break;
 421.755 +    default:
 421.756 +        return;
 421.757 +    }
 421.758 +    s->csr[rap] = val;
 421.759 +}
 421.760 +
 421.761 +static uint32_t pcnet_csr_readw(PCNetState *s, uint32_t rap)
 421.762 +{
 421.763 +    uint32_t val;
 421.764 +    switch (rap) {
 421.765 +    case 0:
 421.766 +        pcnet_update_irq(s);
 421.767 +        val = s->csr[0];
 421.768 +        val |= (val & 0x7800) ? 0x8000 : 0;
 421.769 +        break;
 421.770 +    case 16:
 421.771 +        return pcnet_csr_readw(s,1);
 421.772 +    case 17:
 421.773 +        return pcnet_csr_readw(s,2);
 421.774 +    case 58:
 421.775 +        return pcnet_bcr_readw(s,BCR_SWS);
 421.776 +    case 88:
 421.777 +        val = s->csr[89];
 421.778 +        val <<= 16;
 421.779 +        val |= s->csr[88];
 421.780 +        break;
 421.781 +    default:
 421.782 +        val = s->csr[rap];
 421.783 +    }
 421.784 +#ifdef PCNET_DEBUG_CSR
 421.785 +    printf("pcnet_csr_readw rap=%d val=0x%04x\n", rap, val);
 421.786 +#endif
 421.787 +    return val;
 421.788 +}
 421.789 +
 421.790 +static void pcnet_bcr_writew(PCNetState *s, uint32_t rap, uint32_t val)
 421.791 +{
 421.792 +    rap &= 127;
 421.793 +#ifdef PCNET_DEBUG_BCR
 421.794 +    printf("pcnet_bcr_writew rap=%d val=0x%04x\n", rap, val);
 421.795 +#endif
 421.796 +    switch (rap) {
 421.797 +    case BCR_SWS:
 421.798 +        if (!(CSR_STOP(s) || CSR_SPND(s)))
 421.799 +            return;
 421.800 +        val &= ~0x0300;
 421.801 +        switch (val & 0x00ff) {
 421.802 +        case 0:
 421.803 +            val |= 0x0200;
 421.804 +            break;
 421.805 +        case 1:
 421.806 +            val |= 0x0100;
 421.807 +            break;
 421.808 +        case 2:
 421.809 +        case 3:
 421.810 +            val |= 0x0300;
 421.811 +            break;
 421.812 +        default:
 421.813 +            printf("Bad SWSTYLE=0x%02x\n", val & 0xff);
 421.814 +            val = 0x0200;
 421.815 +            break;
 421.816 +        }
 421.817 +#ifdef PCNET_DEBUG
 421.818 +       printf("BCR_SWS=0x%04x\n", val);
 421.819 +#endif
 421.820 +    case BCR_LNKST:
 421.821 +    case BCR_LED1:
 421.822 +    case BCR_LED2:
 421.823 +    case BCR_LED3:
 421.824 +    case BCR_MC:
 421.825 +    case BCR_FDC:
 421.826 +    case BCR_BSBC:
 421.827 +    case BCR_EECAS:
 421.828 +    case BCR_PLAT:
 421.829 +        s->bcr[rap] = val;
 421.830 +        break;
 421.831 +    default:
 421.832 +        break;
 421.833 +    }
 421.834 +}
 421.835 +
 421.836 +static uint32_t pcnet_bcr_readw(PCNetState *s, uint32_t rap)
 421.837 +{
 421.838 +    uint32_t val;
 421.839 +    rap &= 127;
 421.840 +    switch (rap) {
 421.841 +    case BCR_LNKST:
 421.842 +    case BCR_LED1:
 421.843 +    case BCR_LED2:
 421.844 +    case BCR_LED3:
 421.845 +        val = s->bcr[rap] & ~0x8000;
 421.846 +        val |= (val & 0x017f & s->lnkst) ? 0x8000 : 0;
 421.847 +        break;
 421.848 +    default:
 421.849 +        val = rap < 32 ? s->bcr[rap] : 0;
 421.850 +        break;
 421.851 +    }
 421.852 +#ifdef PCNET_DEBUG_BCR
 421.853 +    printf("pcnet_bcr_readw rap=%d val=0x%04x\n", rap, val);
 421.854 +#endif
 421.855 +    return val;
 421.856 +}
 421.857 +
 421.858 +static void pcnet_h_reset(PCNetState *s)
 421.859 +{
 421.860 +    int i;
 421.861 +    uint16_t checksum;
 421.862 +
 421.863 +    /* Initialize the PROM */
 421.864 +
 421.865 +    memcpy(s->prom, s->nd->macaddr, 6);
 421.866 +    s->prom[12] = s->prom[13] = 0x00;
 421.867 +    s->prom[14] = s->prom[15] = 0x57;
 421.868 +
 421.869 +    for (i = 0,checksum = 0; i < 16; i++)
 421.870 +        checksum += s->prom[i];
 421.871 +    *(uint16_t *)&s->prom[12] = cpu_to_le16(checksum);
 421.872 +
 421.873 +
 421.874 +    s->bcr[BCR_MSRDA] = 0x0005;
 421.875 +    s->bcr[BCR_MSWRA] = 0x0005;
 421.876 +    s->bcr[BCR_MC   ] = 0x0002;
 421.877 +    s->bcr[BCR_LNKST] = 0x00c0;
 421.878 +    s->bcr[BCR_LED1 ] = 0x0084;
 421.879 +    s->bcr[BCR_LED2 ] = 0x0088;
 421.880 +    s->bcr[BCR_LED3 ] = 0x0090;
 421.881 +    s->bcr[BCR_FDC  ] = 0x0000;
 421.882 +    s->bcr[BCR_BSBC ] = 0x9001;
 421.883 +    s->bcr[BCR_EECAS] = 0x0002;
 421.884 +    s->bcr[BCR_SWS  ] = 0x0200;
 421.885 +    s->bcr[BCR_PLAT ] = 0xff06;
 421.886 +
 421.887 +    pcnet_s_reset(s);
 421.888 +}
 421.889 +
 421.890 +static void pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val)
 421.891 +{
 421.892 +    PCNetState *s = opaque;
 421.893 +#ifdef PCNET_DEBUG
 421.894 +    printf("pcnet_aprom_writeb addr=0x%08x val=0x%02x\n", addr, val);
 421.895 +#endif    
 421.896 +    /* Check APROMWE bit to enable write access */
 421.897 +    if (pcnet_bcr_readw(s,2) & 0x80)
 421.898 +        s->prom[addr & 15] = val;
 421.899 +}       
 421.900 +
 421.901 +static uint32_t pcnet_aprom_readb(void *opaque, uint32_t addr)
 421.902 +{
 421.903 +    PCNetState *s = opaque;
 421.904 +    uint32_t val = s->prom[addr &= 15];
 421.905 +#ifdef PCNET_DEBUG
 421.906 +    printf("pcnet_aprom_readb addr=0x%08x val=0x%02x\n", addr, val);
 421.907 +#endif
 421.908 +    return val;
 421.909 +}
 421.910 +
 421.911 +static void pcnet_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
 421.912 +{
 421.913 +    PCNetState *s = opaque;
 421.914 +    pcnet_poll_timer(s);
 421.915 +#ifdef PCNET_DEBUG_IO
 421.916 +    printf("pcnet_ioport_writew addr=0x%08x val=0x%04x\n", addr, val);
 421.917 +#endif
 421.918 +    if (!BCR_DWIO(s)) {
 421.919 +        switch (addr & 0x0f) {
 421.920 +        case 0x00: /* RDP */
 421.921 +            pcnet_csr_writew(s, s->rap, val);
 421.922 +            break;
 421.923 +        case 0x02:
 421.924 +            s->rap = val & 0x7f;
 421.925 +            break;
 421.926 +        case 0x06:
 421.927 +            pcnet_bcr_writew(s, s->rap, val);
 421.928 +            break;
 421.929 +        }
 421.930 +    }
 421.931 +    pcnet_update_irq(s);
 421.932 +}
 421.933 +
 421.934 +static uint32_t pcnet_ioport_readw(void *opaque, uint32_t addr)
 421.935 +{
 421.936 +    PCNetState *s = opaque;
 421.937 +    uint32_t val = -1;
 421.938 +    pcnet_poll_timer(s);
 421.939 +    if (!BCR_DWIO(s)) {
 421.940 +        switch (addr & 0x0f) {
 421.941 +        case 0x00: /* RDP */
 421.942 +            val = pcnet_csr_readw(s, s->rap);
 421.943 +            break;
 421.944 +        case 0x02:
 421.945 +            val = s->rap;
 421.946 +            break;
 421.947 +        case 0x04:
 421.948 +            pcnet_s_reset(s);
 421.949 +            val = 0;
 421.950 +            break;
 421.951 +        case 0x06:
 421.952 +            val = pcnet_bcr_readw(s, s->rap);
 421.953 +            break;
 421.954 +        }
 421.955 +    }
 421.956 +    pcnet_update_irq(s);
 421.957 +#ifdef PCNET_DEBUG_IO
 421.958 +    printf("pcnet_ioport_readw addr=0x%08x val=0x%04x\n", addr, val & 0xffff);
 421.959 +#endif
 421.960 +    return val;
 421.961 +}
 421.962 +
 421.963 +static void pcnet_ioport_writel(void *opaque, uint32_t addr, uint32_t val)
 421.964 +{
 421.965 +    PCNetState *s = opaque;
 421.966 +    pcnet_poll_timer(s);
 421.967 +#ifdef PCNET_DEBUG_IO
 421.968 +    printf("pcnet_ioport_writel addr=0x%08x val=0x%08x\n", addr, val);
 421.969 +#endif
 421.970 +    if (BCR_DWIO(s)) {
 421.971 +        switch (addr & 0x0f) {
 421.972 +        case 0x00: /* RDP */
 421.973 +            pcnet_csr_writew(s, s->rap, val & 0xffff);
 421.974 +            break;
 421.975 +        case 0x04:
 421.976 +            s->rap = val & 0x7f;
 421.977 +            break;
 421.978 +        case 0x0c:
 421.979 +            pcnet_bcr_writew(s, s->rap, val & 0xffff);
 421.980 +            break;
 421.981 +        }
 421.982 +    } else
 421.983 +    if ((addr & 0x0f) == 0) {
 421.984 +        /* switch device to dword i/o mode */
 421.985 +        pcnet_bcr_writew(s, BCR_BSBC, pcnet_bcr_readw(s, BCR_BSBC) | 0x0080);
 421.986 +#ifdef PCNET_DEBUG_IO
 421.987 +        printf("device switched into dword i/o mode\n");
 421.988 +#endif        
 421.989 +    }
 421.990 +    pcnet_update_irq(s);
 421.991 +}
 421.992 +
 421.993 +static uint32_t pcnet_ioport_readl(void *opaque, uint32_t addr)
 421.994 +{
 421.995 +    PCNetState *s = opaque;
 421.996 +    uint32_t val = -1;
 421.997 +    pcnet_poll_timer(s);
 421.998 +    if (BCR_DWIO(s)) {  
 421.999 +        switch (addr & 0x0f) {
421.1000 +        case 0x00: /* RDP */
421.1001 +            val = pcnet_csr_readw(s, s->rap);
421.1002 +            break;
421.1003 +        case 0x04:
421.1004 +            val = s->rap;
421.1005 +            break;
421.1006 +        case 0x08:
421.1007 +            pcnet_s_reset(s);
421.1008 +            val = 0;
421.1009 +            break;
421.1010 +        case 0x0c:
421.1011 +            val = pcnet_bcr_readw(s, s->rap);
421.1012 +            break;
421.1013 +        }
421.1014 +    }
421.1015 +    pcnet_update_irq(s);
421.1016 +#ifdef PCNET_DEBUG_IO
421.1017 +    printf("pcnet_ioport_readl addr=0x%08x val=0x%08x\n", addr, val);
421.1018 +#endif
421.1019 +    return val;
421.1020 +}
421.1021 +
421.1022 +static void pcnet_ioport_map(PCIDevice *pci_dev, int region_num, 
421.1023 +                             uint32_t addr, uint32_t size, int type)
421.1024 +{
421.1025 +    PCNetState *d = (PCNetState *)pci_dev;
421.1026 +
421.1027 +#ifdef PCNET_DEBUG_IO
421.1028 +    printf("pcnet_ioport_map addr=0x%04x size=0x%04x\n", addr, size);
421.1029 +#endif
421.1030 +
421.1031 +    register_ioport_write(addr, 16, 1, pcnet_aprom_writeb, d);
421.1032 +    register_ioport_read(addr, 16, 1, pcnet_aprom_readb, d);
421.1033 +    
421.1034 +    register_ioport_write(addr + 0x10, 0x10, 2, pcnet_ioport_writew, d);
421.1035 +    register_ioport_read(addr + 0x10, 0x10, 2, pcnet_ioport_readw, d);
421.1036 +    register_ioport_write(addr + 0x10, 0x10, 4, pcnet_ioport_writel, d);
421.1037 +    register_ioport_read(addr + 0x10, 0x10, 4, pcnet_ioport_readl, d);
421.1038 +}
421.1039 +
421.1040 +static void pcnet_mmio_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
421.1041 +{
421.1042 +    PCNetState *d = opaque;
421.1043 +#ifdef PCNET_DEBUG_IO
421.1044 +    printf("pcnet_mmio_writeb addr=0x%08x val=0x%02x\n", addr, val);
421.1045 +#endif
421.1046 +    if (!(addr & 0x10))
421.1047 +        pcnet_aprom_writeb(d, addr & 0x0f, val);
421.1048 +}
421.1049 +
421.1050 +static uint32_t pcnet_mmio_readb(void *opaque, target_phys_addr_t addr) 
421.1051 +{
421.1052 +    PCNetState *d = opaque;
421.1053 +    uint32_t val = -1;
421.1054 +    if (!(addr & 0x10))
421.1055 +        val = pcnet_aprom_readb(d, addr & 0x0f);
421.1056 +#ifdef PCNET_DEBUG_IO
421.1057 +    printf("pcnet_mmio_readb addr=0x%08x val=0x%02x\n", addr, val & 0xff);
421.1058 +#endif
421.1059 +    return val;
421.1060 +}
421.1061 +
421.1062 +static void pcnet_mmio_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
421.1063 +{
421.1064 +    PCNetState *d = opaque;
421.1065 +#ifdef PCNET_DEBUG_IO
421.1066 +    printf("pcnet_mmio_writew addr=0x%08x val=0x%04x\n", addr, val);
421.1067 +#endif
421.1068 +    if (addr & 0x10)
421.1069 +        pcnet_ioport_writew(d, addr & 0x0f, val);
421.1070 +    else {
421.1071 +        addr &= 0x0f;
421.1072 +        pcnet_aprom_writeb(d, addr, val & 0xff);
421.1073 +        pcnet_aprom_writeb(d, addr+1, (val & 0xff00) >> 8);
421.1074 +    }
421.1075 +}
421.1076 +
421.1077 +static uint32_t pcnet_mmio_readw(void *opaque, target_phys_addr_t addr) 
421.1078 +{
421.1079 +    PCNetState *d = opaque;
421.1080 +    uint32_t val = -1;
421.1081 +    if (addr & 0x10)
421.1082 +        val = pcnet_ioport_readw(d, addr & 0x0f);
421.1083 +    else {
421.1084 +        addr &= 0x0f;
421.1085 +        val = pcnet_aprom_readb(d, addr+1);
421.1086 +        val <<= 8;
421.1087 +        val |= pcnet_aprom_readb(d, addr);
421.1088 +    }
421.1089 +#ifdef PCNET_DEBUG_IO
421.1090 +    printf("pcnet_mmio_readw addr=0x%08x val = 0x%04x\n", addr, val & 0xffff);
421.1091 +#endif
421.1092 +    return val;
421.1093 +}
421.1094 +
421.1095 +static void pcnet_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
421.1096 +{
421.1097 +    PCNetState *d = opaque;
421.1098 +#ifdef PCNET_DEBUG_IO
421.1099 +    printf("pcnet_mmio_writel addr=0x%08x val=0x%08x\n", addr, val);
421.1100 +#endif
421.1101 +    if (addr & 0x10)
421.1102 +        pcnet_ioport_writel(d, addr & 0x0f, val);
421.1103 +    else {
421.1104 +        addr &= 0x0f;
421.1105 +        pcnet_aprom_writeb(d, addr, val & 0xff);
421.1106 +        pcnet_aprom_writeb(d, addr+1, (val & 0xff00) >> 8);
421.1107 +        pcnet_aprom_writeb(d, addr+2, (val & 0xff0000) >> 16);
421.1108 +        pcnet_aprom_writeb(d, addr+3, (val & 0xff000000) >> 24);
421.1109 +    }
421.1110 +}
421.1111 +
421.1112 +static uint32_t pcnet_mmio_readl(void *opaque, target_phys_addr_t addr) 
421.1113 +{
421.1114 +    PCNetState *d = opaque;
421.1115 +    uint32_t val;
421.1116 +    if (addr & 0x10)
421.1117 +        val = pcnet_ioport_readl(d, addr & 0x0f);
421.1118 +    else {
421.1119 +        addr &= 0x0f;
421.1120 +        val = pcnet_aprom_readb(d, addr+3);
421.1121 +        val <<= 8;
421.1122 +        val |= pcnet_aprom_readb(d, addr+2);
421.1123 +        val <<= 8;
421.1124 +        val |= pcnet_aprom_readb(d, addr+1);
421.1125 +        val <<= 8;
421.1126 +        val |= pcnet_aprom_readb(d, addr);
421.1127 +    }
421.1128 +#ifdef PCNET_DEBUG_IO
421.1129 +    printf("pcnet_mmio_readl addr=0x%08x val=0x%08x\n", addr, val);
421.1130 +#endif
421.1131 +    return val;
421.1132 +}
421.1133 +
421.1134 +
421.1135 +static CPUWriteMemoryFunc *pcnet_mmio_write[] = {
421.1136 +    (CPUWriteMemoryFunc *)&pcnet_mmio_writeb,
421.1137 +    (CPUWriteMemoryFunc *)&pcnet_mmio_writew,
421.1138 +    (CPUWriteMemoryFunc *)&pcnet_mmio_writel
421.1139 +};
421.1140 +
421.1141 +static CPUReadMemoryFunc *pcnet_mmio_read[] = {
421.1142 +    (CPUReadMemoryFunc *)&pcnet_mmio_readb,
421.1143 +    (CPUReadMemoryFunc *)&pcnet_mmio_readw,
421.1144 +    (CPUReadMemoryFunc *)&pcnet_mmio_readl
421.1145 +};
421.1146 +
421.1147 +static void pcnet_mmio_map(PCIDevice *pci_dev, int region_num, 
421.1148 +                            uint32_t addr, uint32_t size, int type)
421.1149 +{
421.1150 +    PCNetState *d = (PCNetState *)pci_dev;
421.1151 +
421.1152 +#ifdef PCNET_DEBUG_IO
421.1153 +    printf("pcnet_ioport_map addr=0x%08x 0x%08x\n", addr, size);
421.1154 +#endif
421.1155 +
421.1156 +    cpu_register_physical_memory(addr, PCNET_PNPMMIO_SIZE, d->mmio_io_addr);
421.1157 +}
421.1158 +
421.1159 +void pci_pcnet_init(PCIBus *bus, NetDriverState *nd)
421.1160 +{
421.1161 +    PCNetState *d;
421.1162 +    uint8_t *pci_conf;
421.1163 +
421.1164 +#if 0
421.1165 +    printf("sizeof(RMD)=%d, sizeof(TMD)=%d\n", 
421.1166 +        sizeof(struct pcnet_RMD), sizeof(struct pcnet_TMD));
421.1167 +#endif
421.1168 +
421.1169 +    d = (PCNetState *)pci_register_device(bus, "PCNet", sizeof(PCNetState),
421.1170 +                                          -1, NULL, NULL);
421.1171 +                                          
421.1172 +    pci_conf = d->dev.config;
421.1173 +    
421.1174 +    *(uint16_t *)&pci_conf[0x00] = cpu_to_le16(0x1022);
421.1175 +    *(uint16_t *)&pci_conf[0x02] = cpu_to_le16(0x2000);    
421.1176 +    *(uint16_t *)&pci_conf[0x04] = cpu_to_le16(0x0007); 
421.1177 +    *(uint16_t *)&pci_conf[0x06] = cpu_to_le16(0x0280);
421.1178 +    pci_conf[0x08] = 0x10;
421.1179 +    pci_conf[0x09] = 0x00;
421.1180 +    pci_conf[0x0a] = 0x00; // ethernet network controller 
421.1181 +    pci_conf[0x0b] = 0x02;
421.1182 +    pci_conf[0x0e] = 0x00; // header_type
421.1183 +    
421.1184 +    *(uint32_t *)&pci_conf[0x10] = cpu_to_le32(0x00000001);
421.1185 +    *(uint32_t *)&pci_conf[0x14] = cpu_to_le32(0x00000000);
421.1186 +    
421.1187 +    pci_conf[0x3d] = 1; // interrupt pin 0
421.1188 +    pci_conf[0x3e] = 0x06;
421.1189 +    pci_conf[0x3f] = 0xff;
421.1190 +
421.1191 +    /* Handler for memory-mapped I/O */
421.1192 +    d->mmio_io_addr =
421.1193 +      cpu_register_io_memory(0, pcnet_mmio_read, pcnet_mmio_write, d);
421.1194 +
421.1195 +    pci_register_io_region((PCIDevice *)d, 0, PCNET_IOPORT_SIZE, 
421.1196 +                           PCI_ADDRESS_SPACE_IO, pcnet_ioport_map);
421.1197 +                           
421.1198 +    pci_register_io_region((PCIDevice *)d, 1, PCNET_PNPMMIO_SIZE, 
421.1199 +                           PCI_ADDRESS_SPACE_MEM, pcnet_mmio_map);
421.1200 +                           
421.1201 +    d->poll_timer = qemu_new_timer(vm_clock, pcnet_poll_timer, d);
421.1202 +
421.1203 +    d->nd = nd;
421.1204 +
421.1205 +    pcnet_h_reset(d);
421.1206 +
421.1207 +    qemu_add_read_packet(nd, pcnet_can_receive, pcnet_receive, d);
421.1208 +}
   422.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
   422.2 +++ b/tools/ioemu/hw/pcnet.h	Wed Aug 31 15:22:45 2005 -0800
   422.3 @@ -0,0 +1,583 @@
   422.4 +/*
   422.5 + * QEMU AMD PC-Net II (Am79C970A) emulation
   422.6 + * 
   422.7 + * Copyright (c) 2004 Antony T Curtis
   422.8 + * 
   422.9 + * Permission is hereby granted, free of charge, to any person obtaining a copy
  422.10 + * of this software and associated documentation files (the "Software"), to deal
  422.11 + * in the Software without restriction, including without limitation the rights
  422.12 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  422.13 + * copies of the Software, and to permit persons to whom the Software is
  422.14 + * furnished to do so, subject to the following conditions:
  422.15 + *
  422.16 + * The above copyright notice and this permission notice shall be included in
  422.17 + * all copies or substantial portions of the Software.
  422.18 + *
  422.19 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  422.20 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  422.21 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  422.22 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  422.23 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  422.24 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  422.25 + * THE SOFTWARE.
  422.26 + */
  422.27 +
  422.28 +/* This software was written to be compatible with the specification:
  422.29 + * AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet
  422.30 + * AMD Publication# 19436  Rev:E  Amendment/0  Issue Date: June 2000
  422.31 + */
  422.32 +
  422.33 +#ifdef __GNUC__
  422.34 +#define PACKED(A) A __attribute__ ((packed))
  422.35 +#else
  422.36 +#error FixMe
  422.37 +#endif
  422.38 +
  422.39 +/* BUS CONFIGURATION REGISTERS */
  422.40 +#define BCR_MSRDA    0
  422.41 +#define BCR_MSWRA    1
  422.42 +#define BCR_MC       2
  422.43 +#define BCR_LNKST    4
  422.44 +#define BCR_LED1     5
  422.45 +#define BCR_LED2     6
  422.46 +#define BCR_LED3     7
  422.47 +#define BCR_FDC      9
  422.48 +#define BCR_BSBC     18
  422.49 +#define BCR_EECAS    19
  422.50 +#define BCR_SWS      20
  422.51 +#define BCR_PLAT     22
  422.52 +
  422.53 +#define BCR_DWIO(S)      !!((S)->bcr[BCR_BSBC] & 0x0080)
  422.54 +#define BCR_SSIZE32(S)   !!((S)->bcr[BCR_SWS ] & 0x0100)
  422.55 +#define BCR_SWSTYLE(S)     ((S)->bcr[BCR_SWS ] & 0x00FF)
  422.56 +
  422.57 +#define CSR_INIT(S)      !!(((S)->csr[0])&0x0001)
  422.58 +#define CSR_STRT(S)      !!(((S)->csr[0])&0x0002)
  422.59 +#define CSR_STOP(S)      !!(((S)->csr[0])&0x0004)
  422.60 +#define CSR_TDMD(S)      !!(((S)->csr[0])&0x0008)
  422.61 +#define CSR_TXON(S)      !!(((S)->csr[0])&0x0010)
  422.62 +#define CSR_RXON(S)      !!(((S)->csr[0])&0x0020)
  422.63 +#define CSR_INEA(S)      !!(((S)->csr[0])&0x0040)
  422.64 +#define CSR_LAPPEN(S)    !!(((S)->csr[3])&0x0020)
  422.65 +#define CSR_DXSUFLO(S)   !!(((S)->csr[3])&0x0040)
  422.66 +#define CSR_ASTRP_RCV(S) !!(((S)->csr[4])&0x0800)
  422.67 +#define CSR_DPOLL(S)     !!(((S)->csr[4])&0x1000)
  422.68 +#define CSR_SPND(S)      !!(((S)->csr[5])&0x0001)
  422.69 +#define CSR_LTINTEN(S)   !!(((S)->csr[5])&0x4000)
  422.70 +#define CSR_TOKINTD(S)   !!(((S)->csr[5])&0x8000)
  422.71 +#define CSR_DRX(S)       !!(((S)->csr[15])&0x0001)
  422.72 +#define CSR_DTX(S)       !!(((S)->csr[15])&0x0002)
  422.73 +#define CSR_LOOP(S)      !!(((S)->csr[15])&0x0004)
  422.74 +#define CSR_DRCVPA(S)    !!(((S)->csr[15])&0x2000)
  422.75 +#define CSR_DRCVBC(S)    !!(((S)->csr[15])&0x4000)
  422.76 +#define CSR_PROM(S)      !!(((S)->csr[15])&0x8000)
  422.77 +
  422.78 +#define CSR_CRBC(S)      ((S)->csr[40])
  422.79 +#define CSR_CRST(S)      ((S)->csr[41])
  422.80 +#define CSR_CXBC(S)      ((S)->csr[42])
  422.81 +#define CSR_CXST(S)      ((S)->csr[43])
  422.82 +#define CSR_NRBC(S)      ((S)->csr[44])
  422.83 +#define CSR_NRST(S)      ((S)->csr[45])
  422.84 +#define CSR_POLL(S)      ((S)->csr[46])
  422.85 +#define CSR_PINT(S)      ((S)->csr[47])
  422.86 +#define CSR_RCVRC(S)     ((S)->csr[72])
  422.87 +#define CSR_XMTRC(S)     ((S)->csr[74])
  422.88 +#define CSR_RCVRL(S)     ((S)->csr[76])
  422.89 +#define CSR_XMTRL(S)     ((S)->csr[78])
  422.90 +#define CSR_MISSC(S)     ((S)->csr[112])
  422.91 +
  422.92 +#define CSR_IADR(S)      ((S)->csr[ 1] | ((S)->csr[ 2] << 16))
  422.93 +#define CSR_CRBA(S)      ((S)->csr[18] | ((S)->csr[19] << 16))
  422.94 +#define CSR_CXBA(S)      ((S)->csr[20] | ((S)->csr[21] << 16))
  422.95 +#define CSR_NRBA(S)      ((S)->csr[22] | ((S)->csr[23] << 16))
  422.96 +#define CSR_BADR(S)      ((S)->csr[24] | ((S)->csr[25] << 16))
  422.97 +#define CSR_NRDA(S)      ((S)->csr[26] | ((S)->csr[27] << 16))
  422.98 +#define CSR_CRDA(S)      ((S)->csr[28] | ((S)->csr[29] << 16))
  422.99 +#define CSR_BADX(S)      ((S)->csr[30] | ((S)->csr[31] << 16))
 422.100 +#define CSR_NXDA(S)      ((S)->csr[32] | ((S)->csr[33] << 16))
 422.101 +#define CSR_CXDA(S)      ((S)->csr[34] | ((S)->csr[35] << 16))
 422.102 +#define CSR_NNRD(S)      ((S)->csr[36] | ((S)->csr[37] << 16))
 422.103 +#define CSR_NNXD(S)      ((S)->csr[38] | ((S)->csr[39] << 16))
 422.104 +#define CSR_PXDA(S)      ((S)->csr[60] | ((S)->csr[61] << 16))
 422.105 +#define CSR_NXBA(S)      ((S)->csr[64] | ((S)->csr[65] << 16))
 422.106 +
 422.107 +#define PHYSADDR(S,A) \
 422.108 +  (BCR_SSIZE32(S) ? (A) : (A) | ((0xff00 & (uint32_t)(s)->csr[2])<<16))
 422.109 +
 422.110 +struct pcnet_initblk16 {
 422.111 +    uint16_t mode;
 422.112 +    uint16_t padr1;
 422.113 +    uint16_t padr2;
 422.114 +    uint16_t padr3;
 422.115 +    uint16_t ladrf1;
 422.116 +    uint16_t ladrf2;
 422.117 +    uint16_t ladrf3;
 422.118 +    uint16_t ladrf4;
 422.119 +    unsigned PACKED(rdra:24);
 422.120 +    unsigned PACKED(res1:5);
 422.121 +    unsigned PACKED(rlen:3);
 422.122 +    unsigned PACKED(tdra:24);
 422.123 +    unsigned PACKED(res2:5);
 422.124 +    unsigned PACKED(tlen:3);
 422.125 +};
 422.126 +
 422.127 +struct pcnet_initblk32 {
 422.128 +    uint16_t mode;
 422.129 +    unsigned PACKED(res1:4);
 422.130 +    unsigned PACKED(rlen:4);
 422.131 +    unsigned PACKED(res2:4);
 422.132 +    unsigned PACKED(tlen:4);
 422.133 +    uint16_t padr1;
 422.134 +    uint16_t padr2;
 422.135 +    uint16_t padr3;
 422.136 +    uint16_t _res;
 422.137 +    uint16_t ladrf1;
 422.138 +    uint16_t ladrf2;
 422.139 +    uint16_t ladrf3;
 422.140 +    uint16_t ladrf4;
 422.141 +    uint32_t rdra;
 422.142 +    uint32_t tdra;
 422.143 +};
 422.144 +
 422.145 +struct pcnet_TMD {
 422.146 +    struct {
 422.147 +        unsigned tbadr:32;
 422.148 +    } tmd0;
 422.149 +    struct {
 422.150 +        unsigned PACKED(bcnt:12), PACKED(ones:4), PACKED(res:7), PACKED(bpe:1);
 422.151 +        unsigned PACKED(enp:1), PACKED(stp:1), PACKED(def:1), PACKED(one:1);
 422.152 +        unsigned PACKED(ltint:1), PACKED(nofcs:1), PACKED(err:1), PACKED(own:1);
 422.153 +    } tmd1;
 422.154 +    struct {
 422.155 +        unsigned PACKED(trc:4), PACKED(res:12);
 422.156 +        unsigned PACKED(tdr:10), PACKED(rtry:1), PACKED(lcar:1);
 422.157 +        unsigned PACKED(lcol:1), PACKED(exdef:1), PACKED(uflo:1), PACKED(buff:1);
 422.158 +    } tmd2;
 422.159 +    struct {
 422.160 +        unsigned res:32;
 422.161 +    } tmd3;    
 422.162 +};
 422.163 +
 422.164 +struct pcnet_RMD {
 422.165 +    struct {
 422.166 +        unsigned rbadr:32;
 422.167 +    } rmd0;
 422.168 +    struct {
 422.169 +        unsigned PACKED(bcnt:12), PACKED(ones:4), PACKED(res:4);
 422.170 +        unsigned PACKED(bam:1), PACKED(lafm:1), PACKED(pam:1), PACKED(bpe:1);
 422.171 +        unsigned PACKED(enp:1), PACKED(stp:1), PACKED(buff:1), PACKED(crc:1);
 422.172 +        unsigned PACKED(oflo:1), PACKED(fram:1), PACKED(err:1), PACKED(own:1);
 422.173 +    } rmd1;
 422.174 +    struct {
 422.175 +        unsigned PACKED(mcnt:12), PACKED(zeros:4);
 422.176 +        unsigned PACKED(rpc:8), PACKED(rcc:8);
 422.177 +    } rmd2;    
 422.178 +    struct {
 422.179 +        unsigned res:32;
 422.180 +    } rmd3;    
 422.181 +};
 422.182 +
 422.183 +
 422.184 +#define PRINT_TMD(T) printf(    \
 422.185 +        "TMD0 : TBADR=0x%08x\n" \
 422.186 +        "TMD1 : OWN=%d, ERR=%d, FCS=%d, LTI=%d, "       \
 422.187 +        "ONE=%d, DEF=%d, STP=%d, ENP=%d,\n"             \
 422.188 +        "       BPE=%d, BCNT=%d\n"                      \
 422.189 +        "TMD2 : BUF=%d, UFL=%d, EXD=%d, LCO=%d, "       \
 422.190 +        "LCA=%d, RTR=%d,\n"                             \
 422.191 +        "       TDR=%d, TRC=%d\n",                      \
 422.192 +        (T)->tmd0.tbadr,                                \
 422.193 +        (T)->tmd1.own, (T)->tmd1.err, (T)->tmd1.nofcs,  \
 422.194 +        (T)->tmd1.ltint, (T)->tmd1.one, (T)->tmd1.def,  \
 422.195 +        (T)->tmd1.stp, (T)->tmd1.enp, (T)->tmd1.bpe,    \
 422.196 +        4096-(T)->tmd1.bcnt,                            \
 422.197 +        (T)->tmd2.buff, (T)->tmd2.uflo, (T)->tmd2.exdef,\
 422.198 +        (T)->tmd2.lcol, (T)->tmd2.lcar, (T)->tmd2.rtry, \
 422.199 +        (T)->tmd2.tdr, (T)->tmd2.trc)
 422.200 +
 422.201 +#define PRINT_RMD(R) printf(    \
 422.202 +        "RMD0 : RBADR=0x%08x\n" \
 422.203 +        "RMD1 : OWN=%d, ERR=%d, FRAM=%d, OFLO=%d, "     \
 422.204 +        "CRC=%d, BUFF=%d, STP=%d, ENP=%d,\n       "     \
 422.205 +        "BPE=%d, PAM=%d, LAFM=%d, BAM=%d, ONES=%d, BCNT=%d\n"    \
 422.206 +        "RMD2 : RCC=%d, RPC=%d, MCNT=%d, ZEROS=%d\n",   \
 422.207 +        (R)->rmd0.rbadr,                                \
 422.208 +        (R)->rmd1.own, (R)->rmd1.err, (R)->rmd1.fram,   \
 422.209 +        (R)->rmd1.oflo, (R)->rmd1.crc, (R)->rmd1.buff,  \
 422.210 +        (R)->rmd1.stp, (R)->rmd1.enp, (R)->rmd1.bpe,    \
 422.211 +        (R)->rmd1.pam, (R)->rmd1.lafm, (R)->rmd1.bam,   \
 422.212 +        (R)->rmd1.ones, 4096-(R)->rmd1.bcnt,            \
 422.213 +        (R)->rmd2.rcc, (R)->rmd2.rpc, (R)->rmd2.mcnt,   \
 422.214 +        (R)->rmd2.zeros)
 422.215 +
 422.216 +static inline void pcnet_tmd_load(PCNetState *s, struct pcnet_TMD *tmd, target_phys_addr_t addr)
 422.217 +{
 422.218 +    if (!BCR_SWSTYLE(s)) {
 422.219 +        uint16_t xda[4];
 422.220 +        cpu_physical_memory_read(addr,
 422.221 +                (void *)&xda[0], sizeof(xda));
 422.222 +        ((uint32_t *)tmd)[0] = (xda[0]&0xffff) |
 422.223 +                ((xda[1]&0x00ff) << 16);
 422.224 +        ((uint32_t *)tmd)[1] = (xda[2]&0xffff)|
 422.225 +                ((xda[1] & 0xff00) << 16);
 422.226 +        ((uint32_t *)tmd)[2] =
 422.227 +                (xda[3] & 0xffff) << 16;
 422.228 +        ((uint32_t *)tmd)[3] = 0;
 422.229 +    }
 422.230 +    else
 422.231 +    if (BCR_SWSTYLE(s) != 3)
 422.232 +        cpu_physical_memory_read(addr, (void *)tmd, 16);
 422.233 +    else {
 422.234 +        uint32_t xda[4];
 422.235 +        cpu_physical_memory_read(addr,
 422.236 +                (void *)&xda[0], sizeof(xda));
 422.237 +        ((uint32_t *)tmd)[0] = xda[2];
 422.238 +        ((uint32_t *)tmd)[1] = xda[1];
 422.239 +        ((uint32_t *)tmd)[2] = xda[0];
 422.240 +        ((uint32_t *)tmd)[3] = xda[3];
 422.241 +    }
 422.242 +}
 422.243 +
 422.244 +static inline void pcnet_tmd_store(PCNetState *s, struct pcnet_TMD *tmd, target_phys_addr_t addr)
 422.245 +{
 422.246 +    cpu_physical_memory_set_dirty(addr);
 422.247 +    if (!BCR_SWSTYLE(s)) {
 422.248 +        uint16_t xda[4];
 422.249 +        xda[0] = ((uint32_t *)tmd)[0] & 0xffff;
 422.250 +        xda[1] = ((((uint32_t *)tmd)[0]>>16)&0x00ff) |
 422.251 +            ((((uint32_t *)tmd)[1]>>16)&0xff00);
 422.252 +        xda[2] = ((uint32_t *)tmd)[1] & 0xffff;
 422.253 +        xda[3] = ((uint32_t *)tmd)[2] >> 16;
 422.254 +        cpu_physical_memory_write(addr,
 422.255 +                (void *)&xda[0], sizeof(xda));
 422.256 +        cpu_physical_memory_set_dirty(addr+7);
 422.257 +    }
 422.258 +    else {
 422.259 +        if (BCR_SWSTYLE(s) != 3)
 422.260 +            cpu_physical_memory_write(addr, (void *)tmd, 16);
 422.261 +        else {
 422.262 +            uint32_t xda[4];
 422.263 +            xda[0] = ((uint32_t *)tmd)[2];
 422.264 +            xda[1] = ((uint32_t *)tmd)[1];
 422.265 +            xda[2] = ((uint32_t *)tmd)[0];
 422.266 +            xda[3] = ((uint32_t *)tmd)[3];
 422.267 +            cpu_physical_memory_write(addr,
 422.268 +                    (void *)&xda[0], sizeof(xda));
 422.269 +        }
 422.270 +        cpu_physical_memory_set_dirty(addr+15);
 422.271 +    }
 422.272 +}
 422.273 +
 422.274 +static inline void pcnet_rmd_load(PCNetState *s, struct pcnet_RMD *rmd, target_phys_addr_t addr)
 422.275 +{
 422.276 +    if (!BCR_SWSTYLE(s)) {
 422.277 +        uint16_t rda[4];
 422.278 +        cpu_physical_memory_read(addr,
 422.279 +                (void *)&rda[0], sizeof(rda));
 422.280 +        ((uint32_t *)rmd)[0] = (rda[0]&0xffff)|
 422.281 +                ((rda[1] & 0x00ff) << 16);
 422.282 +        ((uint32_t *)rmd)[1] = (rda[2]&0xffff)|
 422.283 +                ((rda[1] & 0xff00) << 16);
 422.284 +        ((uint32_t *)rmd)[2] = rda[3] & 0xffff;
 422.285 +        ((uint32_t *)rmd)[3] = 0;
 422.286 +    }
 422.287 +    else
 422.288 +    if (BCR_SWSTYLE(s) != 3)
 422.289 +        cpu_physical_memory_read(addr, (void *)rmd, 16);
 422.290 +    else {
 422.291 +        uint32_t rda[4];
 422.292 +        cpu_physical_memory_read(addr,
 422.293 +                (void *)&rda[0], sizeof(rda));
 422.294 +        ((uint32_t *)rmd)[0] = rda[2];
 422.295 +        ((uint32_t *)rmd)[1] = rda[1];
 422.296 +        ((uint32_t *)rmd)[2] = rda[0];
 422.297 +        ((uint32_t *)rmd)[3] = rda[3];
 422.298 +    }
 422.299 +}
 422.300 +
 422.301 +static inline void pcnet_rmd_store(PCNetState *s, struct pcnet_RMD *rmd, target_phys_addr_t addr)
 422.302 +{
 422.303 +    cpu_physical_memory_set_dirty(addr);
 422.304 +    if (!BCR_SWSTYLE(s)) {
 422.305 +        uint16_t rda[4];                        \
 422.306 +        rda[0] = ((uint32_t *)rmd)[0] & 0xffff; \
 422.307 +        rda[1] = ((((uint32_t *)rmd)[0]>>16)&0xff)|\
 422.308 +            ((((uint32_t *)rmd)[1]>>16)&0xff00);\
 422.309 +        rda[2] = ((uint32_t *)rmd)[1] & 0xffff; \
 422.310 +        rda[3] = ((uint32_t *)rmd)[2] & 0xffff; \
 422.311 +        cpu_physical_memory_write(addr,         \
 422.312 +                (void *)&rda[0], sizeof(rda));  \
 422.313 +        cpu_physical_memory_set_dirty(addr+7);
 422.314 +    }
 422.315 +    else {
 422.316 +        if (BCR_SWSTYLE(s) != 3)
 422.317 +            cpu_physical_memory_write(addr, (void *)rmd, 16);
 422.318 +        else {
 422.319 +            uint32_t rda[4];
 422.320 +            rda[0] = ((uint32_t *)rmd)[2];
 422.321 +            rda[1] = ((uint32_t *)rmd)[1];
 422.322 +            rda[2] = ((uint32_t *)rmd)[0];
 422.323 +            rda[3] = ((uint32_t *)rmd)[3];
 422.324 +            cpu_physical_memory_write(addr,
 422.325 +                    (void *)&rda[0], sizeof(rda));
 422.326 +        }
 422.327 +        cpu_physical_memory_set_dirty(addr+15);
 422.328 +    }
 422.329 +}
 422.330 +
 422.331 +
 422.332 +#define TMDLOAD(TMD,ADDR) pcnet_tmd_load(s,TMD,ADDR)
 422.333 +
 422.334 +#define TMDSTORE(TMD,ADDR) pcnet_tmd_store(s,TMD,ADDR)
 422.335 +
 422.336 +#define RMDLOAD(RMD,ADDR) pcnet_rmd_load(s,RMD,ADDR)
 422.337 +
 422.338 +#define RMDSTORE(RMD,ADDR) pcnet_rmd_store(s,RMD,ADDR)
 422.339 +
 422.340 +#if 1
 422.341 +
 422.342 +#define CHECK_RMD(ADDR,RES) do {                \
 422.343 +    struct pcnet_RMD rmd;                       \
 422.344 +    RMDLOAD(&rmd,(ADDR));                       \
 422.345 +    (RES) |= (rmd.rmd1.ones != 15)              \
 422.346 +          || (rmd.rmd2.zeros != 0);             \
 422.347 +} while (0)
 422.348 +
 422.349 +#define CHECK_TMD(ADDR,RES) do {                \
 422.350 +    struct pcnet_TMD tmd;                       \
 422.351 +    TMDLOAD(&tmd,(ADDR));                       \
 422.352 +    (RES) |= (tmd.tmd1.ones != 15);             \
 422.353 +} while (0)
 422.354 +
 422.355 +#else
 422.356 +
 422.357 +#define CHECK_RMD(ADDR,RES) do {                \
 422.358 +    switch (BCR_SWSTYLE(s)) {                   \
 422.359 +    case 0x00:                                  \
 422.360 +        do {                                    \
 422.361 +            uint16_t rda[4];                    \
 422.362 +            cpu_physical_memory_read((ADDR),    \
 422.363 +                (void *)&rda[0], sizeof(rda));  \
 422.364 +            (RES) |= (rda[2] & 0xf000)!=0xf000; \
 422.365 +            (RES) |= (rda[3] & 0xf000)!=0x0000; \
 422.366 +        } while (0);                            \
 422.367 +        break;                                  \
 422.368 +    case 0x01:                                  \
 422.369 +    case 0x02:                                  \
 422.370 +        do {                                    \
 422.371 +            uint32_t rda[4];                    \
 422.372 +            cpu_physical_memory_read((ADDR),    \
 422.373 +                (void *)&rda[0], sizeof(rda)); \
 422.374 +            (RES) |= (rda[1] & 0x0000f000L)!=0x0000f000L; \
 422.375 +            (RES) |= (rda[2] & 0x0000f000L)!=0x00000000L; \
 422.376 +        } while (0);                            \
 422.377 +        break;                                  \
 422.378 +    case 0x03:                                  \
 422.379 +        do {                                    \
 422.380 +            uint32_t rda[4];                    \
 422.381 +            cpu_physical_memory_read((ADDR),    \
 422.382 +                (void *)&rda[0], sizeof(rda)); \
 422.383 +            (RES) |= (rda[0] & 0x0000f000L)!=0x00000000L; \
 422.384 +            (RES) |= (rda[1] & 0x0000f000L)!=0x0000f000L; \
 422.385 +        } while (0);                            \
 422.386 +        break;                                  \
 422.387 +    }                                           \
 422.388 +} while (0)
 422.389 +
 422.390 +#define CHECK_TMD(ADDR,RES) do {                \
 422.391 +    switch (BCR_SWSTYLE(s)) {                   \
 422.392 +    case 0x00:                                  \
 422.393 +        do {                                    \
 422.394 +            uint16_t xda[4];                    \
 422.395 +            cpu_physical_memory_read((ADDR),    \
 422.396 +                (void *)&xda[0], sizeof(xda));  \
 422.397 +            (RES) |= (xda[2] & 0xf000)!=0xf000;\
 422.398 +        } while (0);                            \
 422.399 +        break;                                  \
 422.400 +    case 0x01:                                  \
 422.401 +    case 0x02:                                  \
 422.402 +    case 0x03:                                  \
 422.403 +        do {                                    \
 422.404 +            uint32_t xda[4];                    \
 422.405 +            cpu_physical_memory_read((ADDR),    \
 422.406 +                (void *)&xda[0], sizeof(xda));  \
 422.407 +            (RES) |= (xda[1] & 0x0000f000L)!=0x0000f000L; \
 422.408 +        } while (0);                            \
 422.409 +        break;                                  \
 422.410 +    }                                           \
 422.411 +} while (0)
 422.412 +
 422.413 +#endif
 422.414 +
 422.415 +#define PRINT_PKTHDR(BUF) do {                  \
 422.416 +    struct ether_header *hdr = (void *)(BUF);   \
 422.417 +    printf("packet dhost=%02x:%02x:%02x:%02x:%02x:%02x, "       \
 422.418 +           "shost=%02x:%02x:%02x:%02x:%02x:%02x, "              \
 422.419 +           "type=0x%04x (bcast=%d)\n",                          \
 422.420 +           hdr->ether_dhost[0],hdr->ether_dhost[1],hdr->ether_dhost[2], \
 422.421 +           hdr->ether_dhost[3],hdr->ether_dhost[4],hdr->ether_dhost[5], \
 422.422 +           hdr->ether_shost[0],hdr->ether_shost[1],hdr->ether_shost[2], \
 422.423 +           hdr->ether_shost[3],hdr->ether_shost[4],hdr->ether_shost[5], \
 422.424 +           htons(hdr->ether_type),                                      \
 422.425 +           !!ETHER_IS_MULTICAST(hdr->ether_dhost));                     \
 422.426 +} while (0)
 422.427 +
 422.428 +#define MULTICAST_FILTER_LEN 8
 422.429 +
 422.430 +static inline uint32_t lnc_mchash(const uint8_t *ether_addr)
 422.431 +{
 422.432 +#define LNC_POLYNOMIAL          0xEDB88320UL
 422.433 +    uint32_t crc = 0xFFFFFFFF;
 422.434 +    int idx, bit;
 422.435 +    uint8_t data;
 422.436 +
 422.437 +    for (idx = 0; idx < ETHER_ADDR_LEN; idx++) {
 422.438 +        for (data = *ether_addr++, bit = 0; bit < MULTICAST_FILTER_LEN; bit++) {
 422.439 +            crc = (crc >> 1) ^ (((crc ^ data) & 1) ? LNC_POLYNOMIAL : 0);
 422.440 +            data >>= 1;
 422.441 +        }
 422.442 +    }
 422.443 +    return crc;
 422.444 +#undef LNC_POLYNOMIAL
 422.445 +}
 422.446 +
 422.447 +#define MIN(X,Y) ((X>Y) ? (Y) : (X))
 422.448 +
 422.449 +#define CRC(crc, ch)	 (crc = (crc >> 8) ^ crctab[(crc ^ (ch)) & 0xff])
 422.450 +
 422.451 +/* generated using the AUTODIN II polynomial
 422.452 + *	x^32 + x^26 + x^23 + x^22 + x^16 +
 422.453 + *	x^12 + x^11 + x^10 + x^8 + x^7 + x^5 + x^4 + x^2 + x^1 + 1
 422.454 + */
 422.455 +static const uint32_t crctab[256] = {
 422.456 +	0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
 422.457 +	0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
 422.458 +	0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
 422.459 +	0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
 422.460 +	0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
 422.461 +	0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
 422.462 +	0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
 422.463 +	0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
 422.464 +	0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
 422.465 +	0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
 422.466 +	0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
 422.467 +	0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
 422.468 +	0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
 422.469 +	0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
 422.470 +	0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
 422.471 +	0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
 422.472 +	0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
 422.473 +	0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
 422.474 +	0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
 422.475 +	0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
 422.476 +	0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
 422.477 +	0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
 422.478 +	0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,
 422.479 +	0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
 422.480 +	0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,
 422.481 +	0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
 422.482 +	0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
 422.483 +	0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
 422.484 +	0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,
 422.485 +	0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
 422.486 +	0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,
 422.487 +	0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
 422.488 +	0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
 422.489 +	0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
 422.490 +	0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,
 422.491 +	0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
 422.492 +	0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,
 422.493 +	0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
 422.494 +	0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
 422.495 +	0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
 422.496 +	0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,
 422.497 +	0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
 422.498 +	0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,
 422.499 +	0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
 422.500 +	0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
 422.501 +	0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
 422.502 +	0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,
 422.503 +	0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
 422.504 +	0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,
 422.505 +	0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
 422.506 +	0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
 422.507 +	0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
 422.508 +	0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,
 422.509 +	0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
 422.510 +	0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
 422.511 +	0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
 422.512 +	0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
 422.513 +	0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
 422.514 +	0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,
 422.515 +	0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
 422.516 +	0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,
 422.517 +	0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
 422.518 +	0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
 422.519 +	0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
 422.520 +};
 422.521 +
 422.522 +static inline int padr_match(PCNetState *s, const uint8_t *buf, int size)
 422.523 +{
 422.524 +    struct ether_header *hdr = (void *)buf;
 422.525 +    uint8_t padr[6] = { 
 422.526 +        s->csr[12] & 0xff, s->csr[12] >> 8,
 422.527 +        s->csr[13] & 0xff, s->csr[13] >> 8,
 422.528 +        s->csr[14] & 0xff, s->csr[14] >> 8 
 422.529 +    };
 422.530 +    int result = (!CSR_DRCVPA(s)) && !bcmp(hdr->ether_dhost, padr, 6);
 422.531 +#ifdef PCNET_DEBUG_MATCH
 422.532 +    printf("packet dhost=%02x:%02x:%02x:%02x:%02x:%02x, "
 422.533 +           "padr=%02x:%02x:%02x:%02x:%02x:%02x\n",
 422.534 +           hdr->ether_dhost[0],hdr->ether_dhost[1],hdr->ether_dhost[2],
 422.535 +           hdr->ether_dhost[3],hdr->ether_dhost[4],hdr->ether_dhost[5],
 422.536 +           padr[0],padr[1],padr[2],padr[3],padr[4],padr[5]);
 422.537 +    printf("padr_match result=%d\n", result);
 422.538 +#endif
 422.539 +    return result;
 422.540 +}
 422.541 +
 422.542 +static inline int padr_bcast(PCNetState *s, const uint8_t *buf, int size)
 422.543 +{
 422.544 +    static uint8_t BCAST[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
 422.545 +    struct ether_header *hdr = (void *)buf;
 422.546 +    int result = !CSR_DRCVBC(s) && !bcmp(hdr->ether_dhost, BCAST, 6);
 422.547 +#ifdef PCNET_DEBUG_MATCH
 422.548 +    printf("padr_bcast result=%d\n", result);
 422.549 +#endif
 422.550 +    return result;
 422.551 +}
 422.552 +
 422.553 +static inline int ladr_match(PCNetState *s, const uint8_t *buf, int size)
 422.554 +{
 422.555 +    struct ether_header *hdr = (void *)buf;
 422.556 +    if ((*(hdr->ether_dhost)&0x01) && 
 422.557 +        ((uint64_t *)&s->csr[8])[0] != 0LL) {
 422.558 +        uint8_t ladr[8] = { 
 422.559 +            s->csr[8] & 0xff, s->csr[8] >> 8,
 422.560 +            s->csr[9] & 0xff, s->csr[9] >> 8,
 422.561 +            s->csr[10] & 0xff, s->csr[10] >> 8, 
 422.562 +            s->csr[11] & 0xff, s->csr[11] >> 8 
 422.563 +        };
 422.564 +        int index = lnc_mchash(hdr->ether_dhost) >> 26;
 422.565 +        return !!(ladr[index >> 3] & (1 << (index & 7)));
 422.566 +    }
 422.567 +    return 0;
 422.568 +}
 422.569 +
 422.570 +static inline target_phys_addr_t pcnet_rdra_addr(PCNetState *s, int idx) 
 422.571 +{
 422.572 +    while (idx < 1) idx += CSR_RCVRL(s);
 422.573 +    return s->rdra + ((CSR_RCVRL(s) - idx) * (BCR_SWSTYLE(s) ? 16 : 8));
 422.574 +}
 422.575 +
 422.576 +static inline int64_t pcnet_get_next_poll_time(PCNetState *s, int64_t current_time)
 422.577 +{
 422.578 +    int64_t next_time = current_time + 
 422.579 +        muldiv64(65536 - (CSR_SPND(s) ? 0 : CSR_POLL(s)), 
 422.580 +                 ticks_per_sec, 33000000L);
 422.581 +    if (next_time <= current_time)
 422.582 +        next_time = current_time + 1;
 422.583 +    return next_time;
 422.584 +}
 422.585 +
 422.586 +
   423.1 --- a/tools/ioemu/hw/vga.c	Wed Aug 31 14:37:21 2005 -0800
   423.2 +++ b/tools/ioemu/hw/vga.c	Wed Aug 31 15:22:45 2005 -0800
   423.3 @@ -1620,7 +1620,6 @@ static CPUWriteMemoryFunc *vga_mem_write
   423.4  static void vga_save(QEMUFile *f, void *opaque)
   423.5  {
   423.6      VGAState *s = opaque;
   423.7 -    int i;
   423.8  
   423.9      qemu_put_be32s(f, &s->latch);
  423.10      qemu_put_8s(f, &s->sr_index);
  423.11 @@ -1661,7 +1660,7 @@ static void vga_save(QEMUFile *f, void *
  423.12  static int vga_load(QEMUFile *f, void *opaque, int version_id)
  423.13  {
  423.14      VGAState *s = opaque;
  423.15 -    int is_vbe, i;
  423.16 +    int is_vbe;
  423.17  
  423.18      if (version_id != 1)
  423.19          return -EINVAL;
   425.1 --- a/tools/ioemu/target-i386-dm/Makefile	Wed Aug 31 14:37:21 2005 -0800
   425.2 +++ b/tools/ioemu/target-i386-dm/Makefile	Wed Aug 31 15:22:45 2005 -0800
   425.3 @@ -272,7 +272,7 @@ endif
   425.4  # Hardware support
   425.5  VL_OBJS+= ide.o ne2000.o pckbd.o vga.o dma.o
   425.6  VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pc.o port-e9.o
   425.7 -VL_OBJS+= cirrus_vga.o
   425.8 +VL_OBJS+= cirrus_vga.o pcnet.o
   425.9  
  425.10  ifeq ($(TARGET_ARCH), ppc)
  425.11  VL_OBJS+= ppc.o ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV)
   428.1 --- a/tools/ioemu/vl.c	Wed Aug 31 14:37:21 2005 -0800
   428.2 +++ b/tools/ioemu/vl.c	Wed Aug 31 15:22:45 2005 -0800
   428.3 @@ -125,6 +125,7 @@ QEMUTimer *gui_timer;
   428.4  QEMUTimer *polling_timer;
   428.5  int vm_running;
   428.6  int audio_enabled = 0;
   428.7 +int nic_pcnet = 1;
   428.8  int sb16_enabled = 1;
   428.9  int adlib_enabled = 1;
  428.10  int gus_enabled = 1;
  428.11 @@ -2115,6 +2116,7 @@ void help(void)
  428.12             "-prep           Simulate a PREP system (default is PowerMAC)\n"
  428.13             "-g WxH[xDEPTH]  Set the initial VGA graphic mode\n"
  428.14  #endif
  428.15 +           "-nic-pcnet     simulate an AMD PC-Net PCI ethernet adaptor\n"
  428.16             "\n"
  428.17             "Network options:\n"
  428.18             "-nics n         simulate 'n' network cards [default=1]\n"
  428.19 @@ -2229,6 +2231,7 @@ enum {
  428.20      QEMU_OPTION_L,
  428.21      QEMU_OPTION_no_code_copy,
  428.22      QEMU_OPTION_pci,
  428.23 +    QEMU_OPTION_nic_pcnet,
  428.24      QEMU_OPTION_isa,
  428.25      QEMU_OPTION_prep,
  428.26      QEMU_OPTION_k,
  428.27 @@ -2313,6 +2316,7 @@ const QEMUOption qemu_options[] = {
  428.28      
  428.29      /* temporary options */
  428.30      { "pci", 0, QEMU_OPTION_pci },
  428.31 +    { "nic-pcnet", 0, QEMU_OPTION_nic_pcnet },
  428.32      { "cirrusvga", 0, QEMU_OPTION_cirrusvga },
  428.33      { NULL },
  428.34  };
  428.35 @@ -2640,6 +2644,9 @@ int main(int argc, char **argv)
  428.36              case QEMU_OPTION_pci:
  428.37                  pci_enabled = 1;
  428.38                  break;
  428.39 +            case QEMU_OPTION_nic_pcnet:
  428.40 +                nic_pcnet = 1;
  428.41 +                break;
  428.42              case QEMU_OPTION_isa:
  428.43                  pci_enabled = 0;
  428.44                  break;
   429.1 --- a/tools/ioemu/vl.h	Wed Aug 31 14:37:21 2005 -0800
   429.2 +++ b/tools/ioemu/vl.h	Wed Aug 31 15:22:45 2005 -0800
   429.3 @@ -600,6 +600,12 @@ int fdctrl_get_drive_type(fdctrl_t *fdct
   429.4  void isa_ne2000_init(int base, int irq, NetDriverState *nd);
   429.5  void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
   429.6  
   429.7 +/* pcnet.c */
   429.8 +
   429.9 +extern int nic_pcnet;
  429.10 +
  429.11 +void pci_pcnet_init(PCIBus *bus, NetDriverState *nd);
  429.12 +
  429.13  /* pckbd.c */
  429.14  
  429.15  void kbd_init(void);
   439.1 --- a/tools/libxc/xc_load_aout9.c	Wed Aug 31 14:37:21 2005 -0800
   439.2 +++ b/tools/libxc/xc_load_aout9.c	Wed Aug 31 15:22:45 2005 -0800
   439.3 @@ -15,6 +15,8 @@
   439.4  
   439.5  #define round_pgup(_p)    (((_p)+(PAGE_SIZE-1))&PAGE_MASK)
   439.6  #define round_pgdown(_p)  ((_p)&PAGE_MASK)
   439.7 +#define KZERO             0x80000000
   439.8 +#define KOFFSET(_p)       ((_p)&~KZERO)
   439.9  
  439.10  static int parseaout9image(char *, unsigned long, struct domain_setup_info *);
  439.11  static int loadaout9image(char *, unsigned long, int, u32, unsigned long *, struct domain_setup_info *);
  439.12 @@ -63,7 +65,7 @@ parseaout9image(
  439.13      txtsz = round_pgup(ehdr.text);
  439.14      end = start + txtsz + ehdr.data + ehdr.bss;
  439.15  
  439.16 -    dsi->v_start	= start;
  439.17 +    dsi->v_start	= KZERO;
  439.18      dsi->v_kernstart	= start;
  439.19      dsi->v_kernend	= end;
  439.20      dsi->v_kernentry	= ehdr.entry;
  439.21 @@ -83,19 +85,19 @@ loadaout9image(
  439.22      struct domain_setup_info *dsi)
  439.23  {
  439.24      struct Exec ehdr;
  439.25 -    unsigned long txtsz;
  439.26 +    unsigned long start, txtsz;
  439.27  
  439.28      if (!get_header(image, image_size, &ehdr)) {
  439.29          ERROR("Kernel image does not have a a.out9 header.");
  439.30          return -EINVAL;
  439.31      }
  439.32  
  439.33 +    start = round_pgdown(ehdr.entry);
  439.34      txtsz = round_pgup(ehdr.text);
  439.35      copyout(xch, dom, parray, 
  439.36 -            0, image, sizeof ehdr + ehdr.text);
  439.37 +            start, image, sizeof ehdr + ehdr.text);
  439.38      copyout(xch, dom, parray, 
  439.39 -            txtsz, image + sizeof ehdr + ehdr.text, ehdr.data);
  439.40 -    /* XXX zeroing of BSS needed? */
  439.41 +            start+txtsz, image + sizeof ehdr + ehdr.text, ehdr.data);
  439.42  
  439.43      /* XXX load symbols */
  439.44  
  439.45 @@ -110,13 +112,14 @@ static void
  439.46  copyout(
  439.47      int xch, u32 dom,
  439.48      unsigned long *parray,
  439.49 -    unsigned long off,
  439.50 +    unsigned long addr,
  439.51      void *buf,
  439.52      int sz)
  439.53  {
  439.54 -    unsigned long pgoff, chunksz;
  439.55 +    unsigned long pgoff, chunksz, off;
  439.56      void *pg;
  439.57  
  439.58 +    off = KOFFSET(addr);
  439.59      while (sz > 0) {
  439.60          pgoff = off & (PAGE_SIZE-1);
  439.61          chunksz = sz;
   442.1 --- a/tools/libxc/xc_private.c	Wed Aug 31 14:37:21 2005 -0800
   442.2 +++ b/tools/libxc/xc_private.c	Wed Aug 31 15:22:45 2005 -0800
   442.3 @@ -422,3 +422,8 @@ int xc_dom0_op(int xc_handle, dom0_op_t 
   442.4  {
   442.5      return do_dom0_op(xc_handle, op);
   442.6  }
   442.7 +
   442.8 +int xc_version(int xc_handle, int cmd, void *arg)
   442.9 +{
  442.10 +    return do_xen_version(xc_handle, cmd, arg);
  442.11 +}
   443.1 --- a/tools/libxc/xc_private.h	Wed Aug 31 14:37:21 2005 -0800
   443.2 +++ b/tools/libxc/xc_private.h	Wed Aug 31 15:22:45 2005 -0800
   443.3 @@ -59,6 +59,17 @@ static inline int do_xen_hypercall(int x
   443.4                        (unsigned long)hypercall);
   443.5  }
   443.6  
   443.7 +static inline int do_xen_version(int xc_handle, int cmd, void *dest)
   443.8 +{
   443.9 +    privcmd_hypercall_t hypercall;
  443.10 +
  443.11 +    hypercall.op     = __HYPERVISOR_xen_version;
  443.12 +    hypercall.arg[0] = (unsigned long) cmd;
  443.13 +    hypercall.arg[1] = (unsigned long) dest;
  443.14 +    
  443.15 +    return do_xen_hypercall(xc_handle, &hypercall);
  443.16 +}
  443.17 +
  443.18  static inline int do_dom0_op(int xc_handle, dom0_op_t *op)
  443.19  {
  443.20      int ret = -1;
   446.1 --- a/tools/libxc/xenctrl.h	Wed Aug 31 14:37:21 2005 -0800
   446.2 +++ b/tools/libxc/xenctrl.h	Wed Aug 31 15:22:45 2005 -0800
   446.3 @@ -23,6 +23,7 @@ typedef int64_t            s64;
   446.4  #include <sys/ptrace.h>
   446.5  #include <xen/xen.h>
   446.6  #include <xen/dom0_ops.h>
   446.7 +#include <xen/version.h>
   446.8  #include <xen/event_channel.h>
   446.9  #include <xen/sched_ctl.h>
  446.10  #include <xen/acm.h>
  446.11 @@ -497,6 +498,8 @@ long xc_get_tot_pages(int xc_handle, u32
  446.12  /* Execute a privileged dom0 operation. */
  446.13  int xc_dom0_op(int xc_handle, dom0_op_t *op);
  446.14  
  446.15 +int xc_version(int xc_handle, int cmd, void *arg);
  446.16 +
  446.17  /* Initializes the store (for dom0)
  446.18     remote_port should be the remote end of a bound interdomain channel between
  446.19     the store and dom0.
   462.1 --- a/tools/python/xen/lowlevel/xc/xc.c	Wed Aug 31 14:37:21 2005 -0800
   462.2 +++ b/tools/python/xen/lowlevel/xc/xc.c	Wed Aug 31 15:22:45 2005 -0800
   462.3 @@ -707,6 +707,39 @@ static PyObject *pyxc_physinfo(PyObject 
   462.4                           "cpu_khz",          info.cpu_khz);
   462.5  }
   462.6  
   462.7 +static PyObject *pyxc_xeninfo(PyObject *self,
   462.8 +                              PyObject *args,
   462.9 +                              PyObject *kwds)
  462.10 +{
  462.11 +    XcObject *xc = (XcObject *)self;
  462.12 +    xen_extraversion_t xen_extra;
  462.13 +    xen_compile_info_t xen_cc;
  462.14 +    xen_changeset_info_t xen_chgset;
  462.15 +    long xen_version;
  462.16 +
  462.17 +    xen_version = xc_version(xc->xc_handle, XENVER_version, NULL);
  462.18 +
  462.19 +    if ( xc_version(xc->xc_handle, XENVER_extraversion, &xen_extra) != 0 )
  462.20 +        return PyErr_SetFromErrno(xc_error);
  462.21 +
  462.22 +    if ( xc_version(xc->xc_handle, XENVER_compile_info, &xen_cc) != 0 )
  462.23 +        return PyErr_SetFromErrno(xc_error);
  462.24 +
  462.25 +    if ( xc_version(xc->xc_handle, XENVER_changeset, &xen_chgset) != 0 )
  462.26 +        return PyErr_SetFromErrno(xc_error);
  462.27 +
  462.28 +    return Py_BuildValue("{s:i,s:i,s:s,s:s,s:s,s:s,s:s,s:s}",
  462.29 +                         "xen_major", xen_version >> 16,
  462.30 +                         "xen_minor", (xen_version & 0xffff),
  462.31 +                         "xen_extra", xen_extra,
  462.32 +                         "xen_changeset", xen_chgset,
  462.33 +                         "cc_compiler", xen_cc.compiler,
  462.34 +                         "cc_compile_by", xen_cc.compile_by,
  462.35 +                         "cc_compile_domain", xen_cc.compile_domain,
  462.36 +                         "cc_compile_date", xen_cc.compile_date);
  462.37 +}
  462.38 +
  462.39 +
  462.40  static PyObject *pyxc_sedf_domain_set(PyObject *self,
  462.41                                           PyObject *args,
  462.42                                           PyObject *kwds)
  462.43 @@ -1089,6 +1122,13 @@ static PyMethodDef pyxc_methods[] = {
  462.44        "Returns [dict]: information about the hardware"
  462.45        "        [None]: on failure.\n" },
  462.46  
  462.47 +    { "xeninfo",
  462.48 +      (PyCFunction)pyxc_xeninfo,
  462.49 +      METH_VARARGS, "\n"
  462.50 +      "Get information about the Xen host\n"
  462.51 +      "Returns [dict]: information about Xen"
  462.52 +      "        [None]: on failure.\n" },
  462.53 +
  462.54      { "shadow_control", 
  462.55        (PyCFunction)pyxc_shadow_control, 
  462.56        METH_VARARGS | METH_KEYWORDS, "\n"
   496.1 --- a/tools/python/xen/xend/XendDomainInfo.py	Wed Aug 31 14:37:21 2005 -0800
   496.2 +++ b/tools/python/xen/xend/XendDomainInfo.py	Wed Aug 31 15:22:45 2005 -0800
   496.3 @@ -1078,10 +1078,9 @@ class XendDomainInfo:
   496.4  
   496.5      def publish_console(self):
   496.6          db = DBMap(db=XenNode("/console/%d" % self.id))
   496.7 -        db.clear()
   496.8          db['domain'] = self.db.getPath()
   496.9          db.saveDB(save=True)
  496.10 -        
  496.11 +
  496.12      def configure_fields(self):
  496.13          """Process the vm configuration fields using the registered handlers.
  496.14          """
   499.1 --- a/tools/python/xen/xend/XendNode.py	Wed Aug 31 14:37:21 2005 -0800
   499.2 +++ b/tools/python/xen/xend/XendNode.py	Wed Aug 31 15:22:45 2005 -0800
   499.3 @@ -46,7 +46,7 @@ class XendNode:
   499.4          return self.xc.bvtsched_global_get()
   499.5      
   499.6      def info(self):
   499.7 -        return self.nodeinfo() + self.physinfo()
   499.8 +        return self.nodeinfo() + self.physinfo() + self.xeninfo()
   499.9  
  499.10      def nodeinfo(self):
  499.11          (sys, host, rel, ver, mch) = os.uname()
  499.12 @@ -65,7 +65,16 @@ class XendNode:
  499.13                  ['free_memory', pinfo['free_pages']/256]]
  499.14          return info
  499.15          
  499.16 -        
  499.17 +    def xeninfo(self):
  499.18 +        xinfo = self.xc.xeninfo()
  499.19 +	return [['xen_major', xinfo['xen_major']],
  499.20 +	        ['xen_minor', xinfo['xen_minor']],
  499.21 +	        ['xen_extra', xinfo['xen_extra']],
  499.22 +		['xen_changeset', xinfo['xen_changeset']],
  499.23 +		['cc_compiler', xinfo['cc_compiler']],
  499.24 +                ['cc_compile_by', xinfo['cc_compile_by']],
  499.25 +                ['cc_compile_domain', xinfo['cc_compile_domain']],
  499.26 +                ['cc_compile_date', xinfo['cc_compile_date']]]
  499.27  
  499.28  def instance():
  499.29      global inst
   530.1 --- a/tools/python/xen/xm/create.py	Wed Aug 31 14:37:21 2005 -0800
   530.2 +++ b/tools/python/xen/xm/create.py	Wed Aug 31 15:22:45 2005 -0800
   530.3 @@ -103,12 +103,13 @@ gopts.opt('console_autoconnect', short='
   530.4            fn=set_true, default=0,
   530.5            use="Connect to the console after the domain is created.")
   530.6  
   530.7 -gopts.var('vnc', val='no|yes',
   530.8 +gopts.var('vncviewer', val='no|yes',
   530.9            fn=set_bool, default=None,
  530.10            use="""Spawn a vncviewer listening for a vnc server in the domain.
  530.11            The address of the vncviewer is passed to the domain on the kernel command
  530.12            line using 'VNC_SERVER=<host>:<port>'. The port used by vnc is 5500 + DISPLAY.
  530.13            A display value with a free port is chosen if possible.
  530.14 +	  Only valid when vnc=1.
  530.15            """)
  530.16  
  530.17  gopts.var('name', val='NAME',
  530.18 @@ -321,6 +322,10 @@ gopts.var('nographic', val='no|yes',
  530.19            fn=set_bool, default=0,
  530.20            use="Should device models use graphics?")
  530.21  
  530.22 +gopts.var('vnc', val='',
  530.23 +          fn=set_value, default=None,
  530.24 +          use="""Should the device model use VNC?""")
  530.25 +
  530.26  gopts.var('sdl', val='',
  530.27            fn=set_value, default=None,
  530.28            use="""Should the device model use SDL?""")
  530.29 @@ -494,7 +499,7 @@ def configure_vmx(opts, config_devs, val
  530.30      """
  530.31      args = [ 'memmap', 'device_model', 'cdrom',
  530.32   	     'boot', 'fda', 'fdb', 'localtime', 'serial', 'macaddr', 'stdvga', 
  530.33 -             'isa', 'nographic', 'vnc', 'sdl', 'display']	  
  530.34 +             'isa', 'nographic', 'vnc', 'vncviewer', 'sdl', 'display']	  
  530.35      for a in args:
  530.36  	if (vals.__dict__[a]):
  530.37      	    config_devs.append([a, vals.__dict__[a]])
  530.38 @@ -693,7 +698,7 @@ def preprocess_vnc(opts, vals):
  530.39      """If vnc was specified, spawn a vncviewer in listen mode
  530.40      and pass its address to the domain on the kernel command line.
  530.41      """
  530.42 -    if not vals.vnc or vals.dryrun: return
  530.43 +    if not (vals.vnc and vals.vncviewer) or vals.dryrun: return
  530.44      vnc_display = choose_vnc_display()
  530.45      if not vnc_display:
  530.46          opts.warn("No free vnc display")
   680.1 --- a/tools/xentrace/formats	Wed Aug 31 14:37:21 2005 -0800
   680.2 +++ b/tools/xentrace/formats	Wed Aug 31 15:22:45 2005 -0800
   680.3 @@ -15,3 +15,7 @@ 0x0002000d	CPU%(cpu)d	%(tsc)d		dom_timer
   680.4  0x00080001	CPU%(cpu)d      %(tsc)d		VMX_VMEXIT		[ domid = 0x%(1)08x, eip = 0x%(2)08x, reason = 0x%(3)08x ]
   680.5  0x00080002	CPU%(cpu)d      %(tsc)d		VMX_VECTOR		[ domid = 0x%(1)08x, eip = 0x%(2)08x, vector = 0x%(3)08x ]
   680.6  0x00080003	CPU%(cpu)d      %(tsc)d		VMX_INT			[ domid = 0x%(1)08x, trap = 0x%(2)08x, va = 0x%(3)08x ]
   680.7 +
   680.8 +0x00090001      CPU%(cpu)d      %(tsc)d         VMENTRY                 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
   680.9 +0x00090002      CPU%(cpu)d      %(tsc)d         VMEXIT                  0x%(1)08x 0x%(2)08x 0x%(3)08x 
  680.10 +
   682.1 --- a/tools/xentrace/xentrace.c	Wed Aug 31 14:37:21 2005 -0800
   682.2 +++ b/tools/xentrace/xentrace.c	Wed Aug 31 15:22:45 2005 -0800
   682.3 @@ -525,7 +525,7 @@ int main(int argc, char **argv)
   682.4      }
   682.5  
   682.6      if (opts.cpu_mask != 0) {
   682.7 -        set_mask(opts.evt_mask, 1);
   682.8 +        set_mask(opts.cpu_mask, 1);
   682.9      }
  682.10  
  682.11      if ( opts.outfile )
   733.1 --- a/xen/arch/x86/domain_build.c	Wed Aug 31 14:37:21 2005 -0800
   733.2 +++ b/xen/arch/x86/domain_build.c	Wed Aug 31 15:22:45 2005 -0800
   733.3 @@ -20,6 +20,7 @@
   733.4  #include <asm/processor.h>
   733.5  #include <asm/desc.h>
   733.6  #include <asm/i387.h>
   733.7 +#include <asm/physdev.h>
   733.8  #include <asm/shadow.h>
   733.9  
  733.10  static long dom0_nrpages;
  733.11 @@ -707,6 +708,18 @@ int construct_dom0(struct domain *d,
  733.12          printk("dom0: shadow setup done\n");
  733.13      }
  733.14  
  733.15 +    /*
  733.16 +     * Modify I/O port access permissions.
  733.17 +     */
  733.18 +    /* Master Interrupt Controller (PIC). */
  733.19 +    physdev_modify_ioport_access_range(dom0, 0, 0x20, 2);
  733.20 +    /* Slave Interrupt Controller (PIC). */
  733.21 +    physdev_modify_ioport_access_range(dom0, 0, 0xA0, 2);
  733.22 +    /* Interval Timer (PIT). */
  733.23 +    physdev_modify_ioport_access_range(dom0, 0, 0x40, 4);
  733.24 +    /* PIT Channel 2 / PC Speaker Control. */
  733.25 +    physdev_modify_ioport_access_range(dom0, 0, 0x61, 1);
  733.26 +
  733.27      return 0;
  733.28  }
  733.29  
   741.1 --- a/xen/arch/x86/shadow.c	Wed Aug 31 14:37:21 2005 -0800
   741.2 +++ b/xen/arch/x86/shadow.c	Wed Aug 31 15:22:45 2005 -0800
   741.3 @@ -671,6 +671,7 @@ static void shadow_invlpg_32(struct vcpu
   741.4                           sizeof(gpte))) {*/
   741.5      if (unlikely(!__guest_get_l1e(v, va, &gpte))) {
   741.6          perfc_incrc(shadow_invlpg_faults);
   741.7 +        shadow_unlock(d);
   741.8          return;
   741.9      }
  741.10      l1pte_propagate_from_guest(d, gpte, &spte);
   742.1 --- a/xen/arch/x86/shadow32.c	Wed Aug 31 14:37:21 2005 -0800
   742.2 +++ b/xen/arch/x86/shadow32.c	Wed Aug 31 15:22:45 2005 -0800
   742.3 @@ -1685,6 +1685,7 @@ void shadow_invlpg(struct vcpu *v, unsig
   742.4      if (__copy_from_user(&gpte, &linear_pg_table[va >> PAGE_SHIFT],
   742.5                           sizeof(gpte))) {
   742.6          perfc_incrc(shadow_invlpg_faults);
   742.7 +        shadow_unlock(d);
   742.8          return;
   742.9      }
  742.10      l1pte_propagate_from_guest(d, gpte, &spte);
  742.11 @@ -1917,8 +1918,10 @@ static int snapshot_entry_matches(
  742.12      snapshot = map_domain_page(smfn);
  742.13  
  742.14      if (__copy_from_user(&gpte, &guest_pt[index],
  742.15 -                         sizeof(gpte)))
  742.16 +                         sizeof(gpte))) {
  742.17 +        unmap_domain_page(snapshot);
  742.18          return 0;
  742.19 +    }
  742.20  
  742.21      // This could probably be smarter, but this is sufficent for
  742.22      // our current needs.
   747.1 --- a/xen/arch/x86/vmx.c	Wed Aug 31 14:37:21 2005 -0800
   747.2 +++ b/xen/arch/x86/vmx.c	Wed Aug 31 15:22:45 2005 -0800
   747.3 @@ -50,6 +50,13 @@ int vmcs_size;
   747.4  unsigned int opt_vmx_debug_level = 0;
   747.5  integer_param("vmx_debug", opt_vmx_debug_level);
   747.6  
   747.7 +#ifdef TRACE_BUFFER
   747.8 +static unsigned long trace_values[NR_CPUS][4];
   747.9 +#define TRACE_VMEXIT(index,value) trace_values[current->processor][index]=value
  747.10 +#else
  747.11 +#define TRACE_VMEXIT(index,value) ((void)0)
  747.12 +#endif
  747.13 +
  747.14  #ifdef __x86_64__
  747.15  static struct msr_state percpu_msr[NR_CPUS];
  747.16  
  747.17 @@ -351,7 +358,7 @@ void stop_vmx(void)
  747.18   * Not all cases receive valid value in the VM-exit instruction length field.
  747.19   */
  747.20  #define __get_instruction_length(len) \
  747.21 -    __vmread(INSTRUCTION_LEN, &(len)); \
  747.22 +    __vmread(VM_EXIT_INSTRUCTION_LEN, &(len)); \
  747.23       if ((len) < 1 || (len) > 15) \
  747.24          __vmx_bug(&regs);
  747.25  
  747.26 @@ -381,6 +388,7 @@ static int vmx_do_page_fault(unsigned lo
  747.27  
  747.28      if (!vmx_paging_enabled(current)){
  747.29          handle_mmio(va, va);
  747.30 +        TRACE_VMEXIT (2,2);
  747.31          return 1;
  747.32      }
  747.33      gpa = gva_to_gpa(va);
  747.34 @@ -389,16 +397,17 @@ static int vmx_do_page_fault(unsigned lo
  747.35      if ( mmio_space(gpa) ){
  747.36          if (gpa >= 0xFEE00000) { /* workaround for local APIC */
  747.37              u32 inst_len;
  747.38 -            __vmread(INSTRUCTION_LEN, &(inst_len));
  747.39 +            __vmread(VM_EXIT_INSTRUCTION_LEN, &(inst_len));
  747.40              __update_guest_eip(inst_len);
  747.41              return 1;
  747.42          }
  747.43 +        TRACE_VMEXIT (2,2);
  747.44          handle_mmio(va, gpa);
  747.45          return 1;
  747.46      }
  747.47  
  747.48      result = shadow_fault(va, regs);
  747.49 -
  747.50 +    TRACE_VMEXIT (2,result);
  747.51  #if 0
  747.52      if ( !result )
  747.53      {
  747.54 @@ -542,7 +551,7 @@ static int check_for_null_selector(unsig
  747.55      int i, inst_len;
  747.56      int inst_copy_from_guest(unsigned char *, unsigned long, int);
  747.57  
  747.58 -    __vmread(INSTRUCTION_LEN, &inst_len);
  747.59 +    __vmread(VM_EXIT_INSTRUCTION_LEN, &inst_len);
  747.60      memset(inst, 0, MAX_INST_LEN);
  747.61      if (inst_copy_from_guest(inst, eip, inst_len) != inst_len) {
  747.62          printf("check_for_null_selector: get guest instruction failed\n");
  747.63 @@ -608,6 +617,7 @@ static void vmx_io_instruction(struct cp
  747.64          addr = (exit_qualification >> 16) & (0xffff);
  747.65      else
  747.66          addr = regs->edx & 0xffff;
  747.67 +    TRACE_VMEXIT (2,addr);
  747.68  
  747.69      vio = get_vio(d->domain, d->vcpu_id);
  747.70      if (vio == 0) {
  747.71 @@ -712,7 +722,7 @@ vmx_world_save(struct vcpu *d, struct vm
  747.72      unsigned long inst_len;
  747.73      int error = 0;
  747.74  
  747.75 -    error |= __vmread(INSTRUCTION_LEN, &inst_len);
  747.76 +    error |= __vmread(VM_EXIT_INSTRUCTION_LEN, &inst_len);
  747.77      error |= __vmread(GUEST_RIP, &c->eip);
  747.78      c->eip += inst_len; /* skip transition instruction */
  747.79      error |= __vmread(GUEST_RSP, &c->esp);
  747.80 @@ -1282,13 +1292,20 @@ static int vmx_cr_access(unsigned long e
  747.81      case TYPE_MOV_TO_CR:
  747.82          gp = exit_qualification & CONTROL_REG_ACCESS_REG;
  747.83          cr = exit_qualification & CONTROL_REG_ACCESS_NUM;
  747.84 +        TRACE_VMEXIT(1,TYPE_MOV_TO_CR);
  747.85 +        TRACE_VMEXIT(2,cr);
  747.86 +        TRACE_VMEXIT(3,gp);
  747.87          return mov_to_cr(gp, cr, regs);
  747.88      case TYPE_MOV_FROM_CR:
  747.89          gp = exit_qualification & CONTROL_REG_ACCESS_REG;
  747.90          cr = exit_qualification & CONTROL_REG_ACCESS_NUM;
  747.91 +        TRACE_VMEXIT(1,TYPE_MOV_FROM_CR);
  747.92 +        TRACE_VMEXIT(2,cr);
  747.93 +        TRACE_VMEXIT(3,gp);
  747.94          mov_from_cr(cr, gp, regs);
  747.95          break;
  747.96      case TYPE_CLTS:
  747.97 +        TRACE_VMEXIT(1,TYPE_CLTS);
  747.98          clts();
  747.99          setup_fpu(current);
 747.100  
 747.101 @@ -1301,6 +1318,7 @@ static int vmx_cr_access(unsigned long e
 747.102          __vmwrite(CR0_READ_SHADOW, value);
 747.103          break;
 747.104      case TYPE_LMSW:
 747.105 +        TRACE_VMEXIT(1,TYPE_LMSW);
 747.106          __vmread(CR0_READ_SHADOW, &value);
 747.107  	value = (value & ~0xF) |
 747.108  		(((exit_qualification & LMSW_SOURCE_DATA) >> 16) & 0xF);
 747.109 @@ -1544,6 +1562,7 @@ asmlinkage void vmx_vmexit_handler(struc
 747.110  
 747.111      __vmread(GUEST_RIP, &eip);
 747.112      TRACE_3D(TRC_VMX_VMEXIT, v->domain->domain_id, eip, exit_reason);
 747.113 +    TRACE_VMEXIT(0,exit_reason);
 747.114  
 747.115      switch (exit_reason) {
 747.116      case EXIT_REASON_EXCEPTION_NMI:
 747.117 @@ -1562,6 +1581,7 @@ asmlinkage void vmx_vmexit_handler(struc
 747.118              __vmx_bug(&regs);
 747.119          vector &= 0xff;
 747.120  
 747.121 +	 TRACE_VMEXIT(1,vector);
 747.122          perfc_incra(cause_vector, vector);
 747.123  
 747.124          TRACE_3D(TRC_VMX_VECTOR, v->domain->domain_id, eip, vector);
 747.125 @@ -1606,6 +1626,10 @@ asmlinkage void vmx_vmexit_handler(struc
 747.126          {
 747.127              __vmread(EXIT_QUALIFICATION, &va);
 747.128              __vmread(VM_EXIT_INTR_ERROR_CODE, &regs.error_code);
 747.129 +            
 747.130 +	    TRACE_VMEXIT(3,regs.error_code);
 747.131 +	    TRACE_VMEXIT(4,va);
 747.132 +
 747.133              VMX_DBG_LOG(DBG_LEVEL_VMMU, 
 747.134                          "eax=%lx, ebx=%lx, ecx=%lx, edx=%lx, esi=%lx, edi=%lx",
 747.135                          (unsigned long)regs.eax, (unsigned long)regs.ebx,
 747.136 @@ -1680,6 +1704,8 @@ asmlinkage void vmx_vmexit_handler(struc
 747.137                  eip, inst_len, exit_qualification);
 747.138          if (vmx_cr_access(exit_qualification, &regs))
 747.139  	    __update_guest_eip(inst_len);
 747.140 +	 TRACE_VMEXIT(3,regs.error_code);
 747.141 +        TRACE_VMEXIT(4,exit_qualification);
 747.142          break;
 747.143      }
 747.144      case EXIT_REASON_DR_ACCESS:
 747.145 @@ -1692,6 +1718,7 @@ asmlinkage void vmx_vmexit_handler(struc
 747.146          __vmread(EXIT_QUALIFICATION, &exit_qualification);
 747.147          __get_instruction_length(inst_len);
 747.148          vmx_io_instruction(&regs, exit_qualification, inst_len);
 747.149 +        TRACE_VMEXIT(4,exit_qualification);
 747.150          break;
 747.151      case EXIT_REASON_MSR_READ:
 747.152          __get_instruction_length(inst_len);
 747.153 @@ -1726,6 +1753,25 @@ asmlinkage void load_cr2(void)
 747.154  #endif
 747.155  }
 747.156  
 747.157 +#ifdef TRACE_BUFFER
 747.158 +asmlinkage void trace_vmentry (void)
 747.159 +{
 747.160 +    TRACE_5D(TRC_VMENTRY,trace_values[current->processor][0],
 747.161 +          trace_values[current->processor][1],trace_values[current->processor][2],
 747.162 +          trace_values[current->processor][3],trace_values[current->processor][4]);
 747.163 +    TRACE_VMEXIT(0,9);
 747.164 +    TRACE_VMEXIT(1,9);
 747.165 +    TRACE_VMEXIT(2,9);
 747.166 +    TRACE_VMEXIT(3,9);
 747.167 +    TRACE_VMEXIT(4,9);
 747.168 +    return;
 747.169 +}
 747.170 +asmlinkage void trace_vmexit (void)
 747.171 +{
 747.172 +    TRACE_3D(TRC_VMEXIT,0,0,0);
 747.173 +    return;
 747.174 +}
 747.175 +#endif 
 747.176  #endif /* CONFIG_VMX */
 747.177  
 747.178  /*
   750.1 --- a/xen/arch/x86/vmx_platform.c	Wed Aug 31 14:37:21 2005 -0800
   750.2 +++ b/xen/arch/x86/vmx_platform.c	Wed Aug 31 15:22:45 2005 -0800
   750.3 @@ -639,7 +639,7 @@ void handle_mmio(unsigned long va, unsig
   750.4      inst_decoder_regs = mpci_p->inst_decoder_regs;
   750.5  
   750.6      __vmread(GUEST_RIP, &eip);
   750.7 -    __vmread(INSTRUCTION_LEN, &inst_len);
   750.8 +    __vmread(VM_EXIT_INSTRUCTION_LEN, &inst_len);
   750.9      __vmread(GUEST_RFLAGS, &eflags);
  750.10      vm86 = eflags & X86_EFLAGS_VM;
  750.11  
   753.1 --- a/xen/arch/x86/x86_32/entry.S	Wed Aug 31 14:37:21 2005 -0800
   753.2 +++ b/xen/arch/x86/x86_32/entry.S	Wed Aug 31 15:22:45 2005 -0800
   753.3 @@ -126,6 +126,9 @@
   753.4  ENTRY(vmx_asm_vmexit_handler)
   753.5          /* selectors are restored/saved by VMX */
   753.6          VMX_SAVE_ALL_NOSEGREGS
   753.7 +#ifdef TRACE_BUFFER
   753.8 +        call trace_vmexit
   753.9 +#endif
  753.10          call vmx_vmexit_handler
  753.11          jmp vmx_asm_do_resume
  753.12  
  753.13 @@ -147,6 +150,9 @@ 1:
  753.14  /* vmx_restore_all_guest */
  753.15          call vmx_intr_assist
  753.16          call load_cr2
  753.17 +#ifdef TRACE_BUFFER
  753.18 +        call trace_vmentry
  753.19 +#endif
  753.20          .endif
  753.21          VMX_RESTORE_ALL_NOSEGREGS
  753.22          /* 
   763.1 --- a/xen/common/domain.c	Wed Aug 31 14:37:21 2005 -0800
   763.2 +++ b/xen/common/domain.c	Wed Aug 31 15:22:45 2005 -0800
   763.3 @@ -114,6 +114,8 @@ void domain_kill(struct domain *d)
   763.4              sched_rem_domain(v);
   763.5          domain_relinquish_resources(d);
   763.6          put_domain(d);
   763.7 +
   763.8 +        send_guest_virq(dom0->vcpu[0], VIRQ_DOM_EXC);
   763.9      }
  763.10  }
  763.11  
   766.1 --- a/xen/common/kernel.c	Wed Aug 31 14:37:21 2005 -0800
   766.2 +++ b/xen/common/kernel.c	Wed Aug 31 15:22:45 2005 -0800
   766.3 @@ -46,7 +46,7 @@ void cmdline_parse(char *cmdline)
   766.4          if ( optval != NULL )
   766.5              *optval++ = '\0';
   766.6  
   766.7 -        for ( param = &__setup_start; param != &__setup_end; param++ )
   766.8 +        for ( param = &__setup_start; param <= &__setup_end; param++ )
   766.9          {
  766.10              if ( strcmp(param->name, opt ) != 0 )
  766.11                  continue;
  766.12 @@ -110,6 +110,27 @@ long do_xen_version(int cmd, void *arg)
  766.13              return -EFAULT;
  766.14          return 0;
  766.15      }
  766.16 +
  766.17 +    case XENVER_capabilities:
  766.18 +    {
  766.19 +        struct xen_capabilities_info info;
  766.20 +        
  766.21 +        /* FIXME */
  766.22 +        info.arch = 0;
  766.23 +        info.pae = 0;
  766.24 +        if ( copy_to_user(arg, &info, sizeof(info)) )
  766.25 +            return -EFAULT;
  766.26 +        return 0;
  766.27 +    }
  766.28 +    
  766.29 +    case XENVER_changeset:
  766.30 +    {
  766.31 +        xen_changeset_info_t chgset;
  766.32 +        safe_strcpy(chgset, XEN_CHANGESET);
  766.33 +        if ( copy_to_user(arg, chgset, sizeof(chgset)) )
  766.34 +            return -EFAULT;
  766.35 +        return 0;
  766.36 +    }
  766.37      }
  766.38  
  766.39      return -ENOSYS;
   824.1 --- a/xen/include/asm-x86/vmx.h	Wed Aug 31 14:37:21 2005 -0800
   824.2 +++ b/xen/include/asm-x86/vmx.h	Wed Aug 31 15:22:45 2005 -0800
   824.3 @@ -275,7 +275,9 @@ static inline int __vmpclear (u64 addr)
   824.4      return 0;
   824.5  }
   824.6  
   824.7 -static inline int __vmread (unsigned long field, void *value)
   824.8 +#define __vmread(x, ptr) ___vmread((x), (ptr), sizeof(*(ptr)))
   824.9 +
  824.10 +static always_inline int ___vmread (const unsigned long field,  void *ptr, const int size)
  824.11  {
  824.12      unsigned long eflags;
  824.13      unsigned long ecx = 0;
  824.14 @@ -286,7 +288,23 @@ static inline int __vmread (unsigned lon
  824.15                             : "a" (field)
  824.16                             : "memory");
  824.17  
  824.18 -    *((long *) value) = ecx;
  824.19 +    switch (size) {
  824.20 +    case 1:
  824.21 +        *((u8 *) (ptr)) = ecx;
  824.22 +        break;
  824.23 +    case 2:
  824.24 +        *((u16 *) (ptr)) = ecx;
  824.25 +        break;
  824.26 +    case 4:
  824.27 +        *((u32 *) (ptr)) = ecx;
  824.28 +        break;
  824.29 +    case 8:
  824.30 +        *((u64 *) (ptr)) = ecx;
  824.31 +        break;
  824.32 +    default:
  824.33 +        domain_crash_synchronous();
  824.34 +        break;
  824.35 +    }
  824.36  
  824.37      __save_flags(eflags);
  824.38      if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
   827.1 --- a/xen/include/asm-x86/vmx_vmcs.h	Wed Aug 31 14:37:21 2005 -0800
   827.2 +++ b/xen/include/asm-x86/vmx_vmcs.h	Wed Aug 31 15:22:45 2005 -0800
   827.3 @@ -183,7 +183,7 @@ enum vmcs_field {
   827.4      VM_ENTRY_MSR_LOAD_COUNT         = 0x00004014,
   827.5      VM_ENTRY_INTR_INFO_FIELD        = 0x00004016,
   827.6      VM_ENTRY_EXCEPTION_ERROR_CODE   = 0x00004018,
   827.7 -    VM_ENTRY_INSTRUCTION_LENGTH     = 0x0000401a,
   827.8 +    VM_ENTRY_INSTRUCTION_LEN        = 0x0000401a,
   827.9      TPR_THRESHOLD                   = 0x0000401c,
  827.10      SECONDARY_VM_EXEC_CONTROL       = 0x0000401e,
  827.11      VM_INSTRUCTION_ERROR            = 0x00004400,
  827.12 @@ -192,7 +192,7 @@ enum vmcs_field {
  827.13      VM_EXIT_INTR_ERROR_CODE         = 0x00004406,
  827.14      IDT_VECTORING_INFO_FIELD        = 0x00004408,
  827.15      IDT_VECTORING_ERROR_CODE        = 0x0000440a,
  827.16 -    INSTRUCTION_LEN                 = 0x0000440c,
  827.17 +    VM_EXIT_INSTRUCTION_LEN         = 0x0000440c,
  827.18      VMX_INSTRUCTION_INFO            = 0x0000440e,
  827.19      GUEST_ES_LIMIT                  = 0x00004800,
  827.20      GUEST_CS_LIMIT                  = 0x00004802,
   841.1 --- a/xen/include/public/trace.h	Wed Aug 31 14:37:21 2005 -0800
   841.2 +++ b/xen/include/public/trace.h	Wed Aug 31 15:22:45 2005 -0800
   841.3 @@ -23,7 +23,7 @@
   841.4  #define TRC_VMXTIMER 0x00082000   /* VMX timer trace           */
   841.5  #define TRC_VMXINT   0x00084000   /* VMX interrupt trace       */
   841.6  #define TRC_VMXIO    0x00088000   /* VMX io emulation trace  */
   841.7 -
   841.8 +#define TRC_VMEXIT_HANDLER    0x00090000   /* VMX handler trace  */
   841.9  
  841.10  /* Trace events per class */
  841.11  
  841.12 @@ -49,6 +49,10 @@
  841.13  
  841.14  #define TRC_VMX_INT             (TRC_VMXINT + 1)
  841.15  
  841.16 +#define TRC_VMEXIT              (TRC_VMEXIT_HANDLER + 1)
  841.17 +#define TRC_VMENTRY             (TRC_VMEXIT_HANDLER + 2)
  841.18 +
  841.19 +
  841.20  /* This structure represents a single trace buffer record. */
  841.21  struct t_rec {
  841.22      u64 cycles;               /* cycle counter timestamp */
   842.1 --- a/xen/include/public/version.h	Wed Aug 31 14:37:21 2005 -0800
   842.2 +++ b/xen/include/public/version.h	Wed Aug 31 15:22:45 2005 -0800
   842.3 @@ -28,4 +28,13 @@ typedef struct xen_compile_info {
   842.4      char compile_date[32];
   842.5  } xen_compile_info_t;
   842.6  
   842.7 +#define XENVER_capabilities 3
   842.8 +typedef struct xen_capabilities_info {
   842.9 +    int pae;
  842.10 +    int arch;
  842.11 +} xen_capabilities_info_t;
  842.12 +
  842.13 +#define XENVER_changeset 4
  842.14 +typedef char xen_changeset_info_t[64];
  842.15 +
  842.16  #endif /* __XEN_PUBLIC_VERSION_H__ */