ia64/xen-unstable

changeset 6577:f0dc15fd3c1b

merge?
author shand@ubuntu.eng.hq.xensource.com
date Wed Aug 31 15:22:45 2005 -0800 (2005-08-31)
parents dd108e5ad24d 8af8ddf91078
children a11bf3a68e9b
files .hgignore Config.mk Makefile buildconfigs/Rules.mk buildconfigs/mk.linux-2.6-xen buildconfigs/mk.linux-2.6-xen0 buildconfigs/mk.linux-2.6-xenU docs/src/user.tex extras/mini-os/include/hypervisor.h extras/mini-os/include/lib.h extras/mini-os/include/mm.h extras/mini-os/include/time.h extras/mini-os/include/types.h extras/mini-os/include/xmalloc.h extras/mini-os/kernel.c extras/mini-os/lib/xmalloc.c extras/mini-os/mm.c extras/mini-os/time.c linux-2.4-xen-sparse/Makefile linux-2.4-xen-sparse/arch/xen/Makefile linux-2.4-xen-sparse/arch/xen/boot/Makefile linux-2.4-xen-sparse/arch/xen/config.in linux-2.4-xen-sparse/arch/xen/defconfig-xen0 linux-2.4-xen-sparse/arch/xen/defconfig-xenU linux-2.4-xen-sparse/arch/xen/drivers/balloon/Makefile linux-2.4-xen-sparse/arch/xen/drivers/blkif/Makefile linux-2.4-xen-sparse/arch/xen/drivers/blkif/backend/Makefile linux-2.4-xen-sparse/arch/xen/drivers/blkif/frontend/Makefile linux-2.4-xen-sparse/arch/xen/drivers/blkif/frontend/common.h linux-2.4-xen-sparse/arch/xen/drivers/blkif/frontend/vbd.c linux-2.4-xen-sparse/arch/xen/drivers/console/Makefile linux-2.4-xen-sparse/arch/xen/drivers/dom0/Makefile linux-2.4-xen-sparse/arch/xen/drivers/evtchn/Makefile linux-2.4-xen-sparse/arch/xen/drivers/netif/Makefile linux-2.4-xen-sparse/arch/xen/drivers/netif/backend/Makefile linux-2.4-xen-sparse/arch/xen/drivers/netif/frontend/Makefile linux-2.4-xen-sparse/arch/xen/kernel/Makefile linux-2.4-xen-sparse/arch/xen/kernel/entry.S linux-2.4-xen-sparse/arch/xen/kernel/head.S linux-2.4-xen-sparse/arch/xen/kernel/i386_ksyms.c linux-2.4-xen-sparse/arch/xen/kernel/irq.c linux-2.4-xen-sparse/arch/xen/kernel/ldt.c linux-2.4-xen-sparse/arch/xen/kernel/pci-pc.c linux-2.4-xen-sparse/arch/xen/kernel/process.c linux-2.4-xen-sparse/arch/xen/kernel/setup.c linux-2.4-xen-sparse/arch/xen/kernel/signal.c linux-2.4-xen-sparse/arch/xen/kernel/time.c linux-2.4-xen-sparse/arch/xen/kernel/traps.c linux-2.4-xen-sparse/arch/xen/lib/Makefile linux-2.4-xen-sparse/arch/xen/lib/delay.c linux-2.4-xen-sparse/arch/xen/mm/Makefile linux-2.4-xen-sparse/arch/xen/mm/fault.c linux-2.4-xen-sparse/arch/xen/mm/init.c linux-2.4-xen-sparse/arch/xen/mm/ioremap.c linux-2.4-xen-sparse/arch/xen/vmlinux.lds linux-2.4-xen-sparse/drivers/block/ll_rw_blk.c linux-2.4-xen-sparse/drivers/char/Makefile linux-2.4-xen-sparse/drivers/char/mem.c linux-2.4-xen-sparse/drivers/char/tty_io.c linux-2.4-xen-sparse/drivers/scsi/aic7xxx/Makefile linux-2.4-xen-sparse/include/asm-xen/bugs.h linux-2.4-xen-sparse/include/asm-xen/desc.h linux-2.4-xen-sparse/include/asm-xen/fixmap.h linux-2.4-xen-sparse/include/asm-xen/highmem.h linux-2.4-xen-sparse/include/asm-xen/hw_irq.h linux-2.4-xen-sparse/include/asm-xen/io.h linux-2.4-xen-sparse/include/asm-xen/irq.h linux-2.4-xen-sparse/include/asm-xen/keyboard.h linux-2.4-xen-sparse/include/asm-xen/mmu_context.h linux-2.4-xen-sparse/include/asm-xen/module.h linux-2.4-xen-sparse/include/asm-xen/page.h linux-2.4-xen-sparse/include/asm-xen/pci.h linux-2.4-xen-sparse/include/asm-xen/pgalloc.h linux-2.4-xen-sparse/include/asm-xen/pgtable-2level.h linux-2.4-xen-sparse/include/asm-xen/pgtable.h linux-2.4-xen-sparse/include/asm-xen/processor.h linux-2.4-xen-sparse/include/asm-xen/queues.h linux-2.4-xen-sparse/include/asm-xen/segment.h linux-2.4-xen-sparse/include/asm-xen/smp.h linux-2.4-xen-sparse/include/asm-xen/system.h linux-2.4-xen-sparse/include/asm-xen/vga.h linux-2.4-xen-sparse/include/asm-xen/xor.h linux-2.4-xen-sparse/include/linux/blk.h linux-2.4-xen-sparse/include/linux/highmem.h linux-2.4-xen-sparse/include/linux/irq.h linux-2.4-xen-sparse/include/linux/mm.h linux-2.4-xen-sparse/include/linux/sched.h linux-2.4-xen-sparse/include/linux/skbuff.h linux-2.4-xen-sparse/include/linux/timer.h linux-2.4-xen-sparse/kernel/time.c linux-2.4-xen-sparse/kernel/timer.c linux-2.4-xen-sparse/mkbuildtree linux-2.4-xen-sparse/mm/highmem.c linux-2.4-xen-sparse/mm/memory.c linux-2.4-xen-sparse/mm/mprotect.c linux-2.4-xen-sparse/mm/mremap.c linux-2.4-xen-sparse/mm/page_alloc.c linux-2.4-xen-sparse/net/core/skbuff.c linux-2.6-xen-sparse/arch/xen/Kconfig linux-2.6-xen-sparse/arch/xen/Kconfig.drivers linux-2.6-xen-sparse/arch/xen/Makefile linux-2.6-xen-sparse/arch/xen/boot/Makefile linux-2.6-xen-sparse/arch/xen/configs/xen0_defconfig_x86_32 linux-2.6-xen-sparse/arch/xen/configs/xen0_defconfig_x86_64 linux-2.6-xen-sparse/arch/xen/configs/xenU_defconfig_x86_32 linux-2.6-xen-sparse/arch/xen/configs/xenU_defconfig_x86_64 linux-2.6-xen-sparse/arch/xen/configs/xen_defconfig_x86_32 linux-2.6-xen-sparse/arch/xen/configs/xen_defconfig_x86_64 linux-2.6-xen-sparse/arch/xen/i386/Kconfig linux-2.6-xen-sparse/arch/xen/i386/Makefile linux-2.6-xen-sparse/arch/xen/i386/kernel/Makefile linux-2.6-xen-sparse/arch/xen/i386/kernel/acpi/Makefile linux-2.6-xen-sparse/arch/xen/i386/kernel/acpi/boot.c linux-2.6-xen-sparse/arch/xen/i386/kernel/apic.c linux-2.6-xen-sparse/arch/xen/i386/kernel/cpu/Makefile linux-2.6-xen-sparse/arch/xen/i386/kernel/cpu/common.c linux-2.6-xen-sparse/arch/xen/i386/kernel/cpu/mtrr/Makefile linux-2.6-xen-sparse/arch/xen/i386/kernel/cpu/mtrr/main.c linux-2.6-xen-sparse/arch/xen/i386/kernel/entry.S linux-2.6-xen-sparse/arch/xen/i386/kernel/head.S linux-2.6-xen-sparse/arch/xen/i386/kernel/i386_ksyms.c linux-2.6-xen-sparse/arch/xen/i386/kernel/init_task.c linux-2.6-xen-sparse/arch/xen/i386/kernel/io_apic.c linux-2.6-xen-sparse/arch/xen/i386/kernel/ioport.c linux-2.6-xen-sparse/arch/xen/i386/kernel/irq.c linux-2.6-xen-sparse/arch/xen/i386/kernel/ldt.c linux-2.6-xen-sparse/arch/xen/i386/kernel/microcode.c linux-2.6-xen-sparse/arch/xen/i386/kernel/mpparse.c linux-2.6-xen-sparse/arch/xen/i386/kernel/pci-dma.c linux-2.6-xen-sparse/arch/xen/i386/kernel/process.c linux-2.6-xen-sparse/arch/xen/i386/kernel/setup.c linux-2.6-xen-sparse/arch/xen/i386/kernel/signal.c linux-2.6-xen-sparse/arch/xen/i386/kernel/smp.c linux-2.6-xen-sparse/arch/xen/i386/kernel/smpboot.c linux-2.6-xen-sparse/arch/xen/i386/kernel/swiotlb.c linux-2.6-xen-sparse/arch/xen/i386/kernel/time.c linux-2.6-xen-sparse/arch/xen/i386/kernel/traps.c linux-2.6-xen-sparse/arch/xen/i386/kernel/vsyscall.S linux-2.6-xen-sparse/arch/xen/i386/mach-default/Makefile linux-2.6-xen-sparse/arch/xen/i386/mm/Makefile linux-2.6-xen-sparse/arch/xen/i386/mm/fault.c linux-2.6-xen-sparse/arch/xen/i386/mm/highmem.c linux-2.6-xen-sparse/arch/xen/i386/mm/hypervisor.c linux-2.6-xen-sparse/arch/xen/i386/mm/init.c linux-2.6-xen-sparse/arch/xen/i386/mm/ioremap.c linux-2.6-xen-sparse/arch/xen/i386/mm/pgtable.c linux-2.6-xen-sparse/arch/xen/i386/pci/Makefile linux-2.6-xen-sparse/arch/xen/i386/pci/irq.c linux-2.6-xen-sparse/arch/xen/kernel/Makefile linux-2.6-xen-sparse/arch/xen/kernel/ctrl_if.c linux-2.6-xen-sparse/arch/xen/kernel/devmem.c linux-2.6-xen-sparse/arch/xen/kernel/evtchn.c linux-2.6-xen-sparse/arch/xen/kernel/fixup.c linux-2.6-xen-sparse/arch/xen/kernel/gnttab.c linux-2.6-xen-sparse/arch/xen/kernel/reboot.c linux-2.6-xen-sparse/arch/xen/kernel/skbuff.c linux-2.6-xen-sparse/arch/xen/kernel/smp.c linux-2.6-xen-sparse/arch/xen/kernel/xen_proc.c linux-2.6-xen-sparse/arch/xen/x86_64/Kconfig linux-2.6-xen-sparse/arch/xen/x86_64/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/ia32/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/ia32/ia32entry.S linux-2.6-xen-sparse/arch/xen/x86_64/ia32/syscall32.c linux-2.6-xen-sparse/arch/xen/x86_64/ia32/vsyscall-int80.S linux-2.6-xen-sparse/arch/xen/x86_64/kernel/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/kernel/acpi/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/kernel/apic.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/e820.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/early_printk.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/entry.S linux-2.6-xen-sparse/arch/xen/x86_64/kernel/genapic.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/genapic_xen.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/head.S linux-2.6-xen-sparse/arch/xen/x86_64/kernel/head64.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/io_apic.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/ioport.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/irq.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/ldt.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/mpparse.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/pci-nommu.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/process.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/setup.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/setup64.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/signal.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/smp.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/smpboot.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/traps.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/vsyscall.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/x8664_ksyms.c linux-2.6-xen-sparse/arch/xen/x86_64/kernel/xen_entry.S linux-2.6-xen-sparse/arch/xen/x86_64/mm/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/mm/fault.c linux-2.6-xen-sparse/arch/xen/x86_64/mm/init.c linux-2.6-xen-sparse/arch/xen/x86_64/mm/pageattr.c linux-2.6-xen-sparse/arch/xen/x86_64/pci/Makefile linux-2.6-xen-sparse/arch/xen/x86_64/pci/Makefile-BUS linux-2.6-xen-sparse/drivers/Makefile linux-2.6-xen-sparse/drivers/acpi/tables.c linux-2.6-xen-sparse/drivers/char/mem.c linux-2.6-xen-sparse/drivers/char/tty_io.c linux-2.6-xen-sparse/drivers/xen/Makefile linux-2.6-xen-sparse/drivers/xen/balloon/Makefile linux-2.6-xen-sparse/drivers/xen/balloon/balloon.c linux-2.6-xen-sparse/drivers/xen/blkback/Makefile linux-2.6-xen-sparse/drivers/xen/blkback/blkback.c linux-2.6-xen-sparse/drivers/xen/blkback/common.h linux-2.6-xen-sparse/drivers/xen/blkback/interface.c linux-2.6-xen-sparse/drivers/xen/blkback/vbd.c linux-2.6-xen-sparse/drivers/xen/blkback/xenbus.c linux-2.6-xen-sparse/drivers/xen/blkfront/Kconfig linux-2.6-xen-sparse/drivers/xen/blkfront/Makefile linux-2.6-xen-sparse/drivers/xen/blkfront/blkfront.c linux-2.6-xen-sparse/drivers/xen/blkfront/block.h linux-2.6-xen-sparse/drivers/xen/blkfront/vbd.c linux-2.6-xen-sparse/drivers/xen/blktap/Makefile linux-2.6-xen-sparse/drivers/xen/blktap/blktap.c linux-2.6-xen-sparse/drivers/xen/blktap/blktap.h linux-2.6-xen-sparse/drivers/xen/blktap/blktap_controlmsg.c linux-2.6-xen-sparse/drivers/xen/blktap/blktap_datapath.c linux-2.6-xen-sparse/drivers/xen/blktap/blktap_userdev.c linux-2.6-xen-sparse/drivers/xen/console/Makefile linux-2.6-xen-sparse/drivers/xen/console/console.c linux-2.6-xen-sparse/drivers/xen/console/xencons_ring.c linux-2.6-xen-sparse/drivers/xen/console/xencons_ring.h linux-2.6-xen-sparse/drivers/xen/evtchn/Makefile linux-2.6-xen-sparse/drivers/xen/evtchn/evtchn.c linux-2.6-xen-sparse/drivers/xen/netback/Makefile linux-2.6-xen-sparse/drivers/xen/netback/common.h linux-2.6-xen-sparse/drivers/xen/netback/interface.c linux-2.6-xen-sparse/drivers/xen/netback/loopback.c linux-2.6-xen-sparse/drivers/xen/netback/netback.c linux-2.6-xen-sparse/drivers/xen/netback/xenbus.c linux-2.6-xen-sparse/drivers/xen/netfront/Kconfig linux-2.6-xen-sparse/drivers/xen/netfront/Makefile linux-2.6-xen-sparse/drivers/xen/netfront/netfront.c linux-2.6-xen-sparse/drivers/xen/privcmd/Makefile linux-2.6-xen-sparse/drivers/xen/privcmd/privcmd.c linux-2.6-xen-sparse/drivers/xen/usbback/common.h linux-2.6-xen-sparse/drivers/xen/usbback/control.c linux-2.6-xen-sparse/drivers/xen/usbback/interface.c linux-2.6-xen-sparse/drivers/xen/usbback/usbback.c linux-2.6-xen-sparse/drivers/xen/usbfront/usbfront.c linux-2.6-xen-sparse/drivers/xen/usbfront/xhci.h linux-2.6-xen-sparse/drivers/xen/xenbus/Makefile linux-2.6-xen-sparse/drivers/xen/xenbus/xenbus_comms.c linux-2.6-xen-sparse/drivers/xen/xenbus/xenbus_comms.h linux-2.6-xen-sparse/drivers/xen/xenbus/xenbus_probe.c linux-2.6-xen-sparse/drivers/xen/xenbus/xenbus_xs.c linux-2.6-xen-sparse/include/asm-generic/pgtable.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/agp.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/desc.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/dma-mapping.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/fixmap.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/floppy.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/highmem.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/hw_irq.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/hypercall.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/io.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/kmap_types.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mach-xen/irq_vectors.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mach-xen/setup_arch_post.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mach-xen/setup_arch_pre.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mach-xen/smpboot_hooks.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mmu.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/mmu_context.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/page.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/param.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/pci.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/pgalloc.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/pgtable-2level.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/pgtable-3level.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/pgtable.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/processor.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/ptrace.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/scatterlist.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/segment.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/setup.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/spinlock.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/swiotlb.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/synch_bitops.h linux-2.6-xen-sparse/include/asm-xen/asm-i386/system.h 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xen/include/asm-ia64/linux-xen/asm/pal.h xen/include/asm-ia64/linux-xen/asm/processor.h xen/include/asm-ia64/mm.h xen/include/asm-ia64/mmu_context.h xen/include/asm-ia64/privop.h xen/include/asm-ia64/regionreg.h xen/include/asm-ia64/regs.h xen/include/asm-ia64/serial.h xen/include/asm-ia64/tlb.h xen/include/asm-ia64/vcpu.h xen/include/asm-ia64/vmmu.h xen/include/asm-ia64/vmx.h xen/include/asm-ia64/vmx_uaccess.h xen/include/asm-ia64/vmx_vcpu.h xen/include/asm-ia64/vmx_vpd.h xen/include/asm-ia64/xenprocessor.h xen/include/asm-ia64/xensystem.h xen/include/asm-x86/apicdef.h xen/include/asm-x86/config.h xen/include/asm-x86/e820.h xen/include/asm-x86/event.h xen/include/asm-x86/fixmap.h xen/include/asm-x86/genapic.h xen/include/asm-x86/hpet.h xen/include/asm-x86/io.h xen/include/asm-x86/mach-bigsmp/mach_apic.h xen/include/asm-x86/mach-default/mach_apic.h xen/include/asm-x86/mach-es7000/mach_apic.h xen/include/asm-x86/mach-generic/mach_apic.h xen/include/asm-x86/mach-summit/mach_apic.h xen/include/asm-x86/mach-summit/mach_mpparse.h xen/include/asm-x86/mm.h xen/include/asm-x86/page.h xen/include/asm-x86/shadow.h xen/include/asm-x86/shadow_64.h xen/include/asm-x86/shadow_public.h xen/include/asm-x86/time.h xen/include/asm-x86/types.h xen/include/asm-x86/uaccess.h xen/include/asm-x86/vmx.h xen/include/asm-x86/vmx_platform.h xen/include/asm-x86/vmx_virpit.h xen/include/asm-x86/vmx_vmcs.h xen/include/asm-x86/x86_32/page-3level.h xen/include/asm-x86/x86_32/uaccess.h xen/include/asm-x86/x86_64/page.h xen/include/public/arch-ia64.h xen/include/public/arch-x86_32.h xen/include/public/arch-x86_64.h xen/include/public/dom0_ops.h xen/include/public/grant_table.h xen/include/public/io/blkif.h xen/include/public/io/domain_controller.h xen/include/public/io/netif.h xen/include/public/memory.h xen/include/public/physdev.h xen/include/public/trace.h xen/include/public/version.h xen/include/public/xen.h xen/include/xen/ac_timer.h xen/include/xen/domain.h xen/include/xen/event.h xen/include/xen/grant_table.h xen/include/xen/mm.h xen/include/xen/perfc.h xen/include/xen/perfc_defn.h xen/include/xen/sched.h xen/include/xen/serial.h xen/include/xen/symbols.h xen/include/xen/time.h xen/include/xen/trace.h xen/tools/Makefile xen/tools/symbols.c
line diff
     1.1 --- a/linux-2.6-xen-sparse/arch/xen/i386/kernel/acpi/boot.c	Wed Aug 31 14:37:21 2005 -0800
     1.2 +++ b/linux-2.6-xen-sparse/arch/xen/i386/kernel/acpi/boot.c	Wed Aug 31 15:22:45 2005 -0800
     1.3 @@ -469,6 +469,18 @@ unsigned int acpi_register_gsi(u32 gsi, 
     1.4  	unsigned int irq;
     1.5  	unsigned int plat_gsi = gsi;
     1.6  
     1.7 +#ifdef CONFIG_PCI
     1.8 +	/*
     1.9 +	 * Make sure all (legacy) PCI IRQs are set as level-triggered.
    1.10 +	 */
    1.11 +	if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
    1.12 +		extern void eisa_set_level_irq(unsigned int irq);
    1.13 +
    1.14 +		if (edge_level == ACPI_LEVEL_SENSITIVE)
    1.15 +				eisa_set_level_irq(gsi);
    1.16 +	}
    1.17 +#endif
    1.18 +
    1.19  #ifdef CONFIG_X86_IO_APIC
    1.20  	if (acpi_irq_model == ACPI_IRQ_MODEL_IOAPIC) {
    1.21  		plat_gsi = mp_register_gsi(gsi, edge_level, active_high_low);
     2.1 --- a/linux-2.6-xen-sparse/include/asm-xen/asm-i386/system.h	Wed Aug 31 14:37:21 2005 -0800
     2.2 +++ b/linux-2.6-xen-sparse/include/asm-xen/asm-i386/system.h	Wed Aug 31 15:22:45 2005 -0800
     2.3 @@ -561,8 +561,14 @@ do {									\
     2.4  #define local_irq_disable()	__cli()
     2.5  #define local_irq_enable()	__sti()
     2.6  
     2.7 +/* Don't use smp_processor_id: this is called in debug versions of that fn. */
     2.8 +#ifdef CONFIG_SMP
     2.9  #define irqs_disabled()			\
    2.10 -    HYPERVISOR_shared_info->vcpu_data[smp_processor_id()].evtchn_upcall_mask
    2.11 +    HYPERVISOR_shared_info->vcpu_data[__smp_processor_id()].evtchn_upcall_mask
    2.12 +#else
    2.13 +#define irqs_disabled()			\
    2.14 +    HYPERVISOR_shared_info->vcpu_data[0].evtchn_upcall_mask
    2.15 +#endif
    2.16  
    2.17  /*
    2.18   * disable hlt during certain critical i/o operations
     3.1 --- a/linux-2.6-xen-sparse/include/asm-xen/asm-x86_64/system.h	Wed Aug 31 14:37:21 2005 -0800
     3.2 +++ b/linux-2.6-xen-sparse/include/asm-xen/asm-x86_64/system.h	Wed Aug 31 15:22:45 2005 -0800
     3.3 @@ -387,8 +387,14 @@ void cpu_idle_wait(void);
     3.4  #define local_irq_disable()	__cli()
     3.5  #define local_irq_enable()	__sti()
     3.6  
     3.7 +/* Don't use smp_processor_id: this is called in debug versions of that fn. */
     3.8 +#ifdef CONFIG_SMP
     3.9  #define irqs_disabled()			\
    3.10 -    HYPERVISOR_shared_info->vcpu_data[smp_processor_id()].evtchn_upcall_mask
    3.11 +    HYPERVISOR_shared_info->vcpu_data[__smp_processor_id()].evtchn_upcall_mask
    3.12 +#else
    3.13 +#define irqs_disabled()			\
    3.14 +    HYPERVISOR_shared_info->vcpu_data[0].evtchn_upcall_mask
    3.15 +#endif
    3.16  
    3.17  /*
    3.18   * disable hlt during certain critical i/o operations
     4.1 --- a/tools/console/client/main.c	Wed Aug 31 14:37:21 2005 -0800
     4.2 +++ b/tools/console/client/main.c	Wed Aug 31 15:22:45 2005 -0800
     4.3 @@ -176,6 +176,7 @@ int main(int argc, char **argv)
     4.4  	unsigned int len = 0;
     4.5  	struct xs_handle *xs;
     4.6  	char *end;
     4.7 +	time_t now;
     4.8  
     4.9  	while((ch = getopt_long(argc, argv, sopt, lopt, &opt_ind)) != -1) {
    4.10  		switch(ch) {
    4.11 @@ -215,13 +216,37 @@ int main(int argc, char **argv)
    4.12  
    4.13  	snprintf(path, sizeof(path), "/console/%d/tty", domid);
    4.14  	str_pty = xs_read(xs, path, &len);
    4.15 +
    4.16  	/* FIXME consoled currently does not assume domain-0 doesn't have a
    4.17  	   console which is good when we break domain-0 up.  To keep us
    4.18  	   user friendly, we'll bail out here since no data will ever show
    4.19  	   up on domain-0. */
    4.20 -	if (domid == 0 || str_pty == NULL) {
    4.21 +	if (domid == 0) {
    4.22  		err(errno, "Could not read tty from store");
    4.23  	}
    4.24 +
    4.25 +	/* Wait a little bit for tty to appear.  There is a race
    4.26 +	   condition that occurs after xend creates a domain.  This
    4.27 +	   code might be running before consoled has noticed the new
    4.28 +	   domain and setup a pty for it.
    4.29 +
    4.30 +	   A xenstore watch would slightly improve responsiveness but
    4.31 +	   a timeout would still be needed since we don't want to
    4.32 +	   block forever if given an invalid domain or worse yet, a
    4.33 +	   domain that someone else has connected to. */
    4.34 +
    4.35 +	now = time(0);
    4.36 +	while (str_pty == NULL && (now + 5) > time(0)) {
    4.37 +		struct timeval tv = { 0, 500 };
    4.38 +		select(0, NULL, NULL, NULL, &tv); /* pause briefly */
    4.39 +
    4.40 +		str_pty = xs_read(xs, path, &len);
    4.41 +	}
    4.42 +
    4.43 +	if (str_pty == NULL) {
    4.44 +		err(errno, "Could not read tty from store");
    4.45 +	}
    4.46 +
    4.47  	spty = open(str_pty, O_RDWR | O_NOCTTY);
    4.48  	if (spty == -1) {
    4.49  		err(errno, "Could not open tty `%s'", str_pty);
     5.1 --- a/tools/console/daemon/io.c	Wed Aug 31 14:37:21 2005 -0800
     5.2 +++ b/tools/console/daemon/io.c	Wed Aug 31 15:22:45 2005 -0800
     5.3 @@ -215,9 +215,6 @@ static int domain_create_ring(struct dom
     5.4  	char *dompath, *path;
     5.5  	int err;
     5.6  
     5.7 -	dom->page = NULL;
     5.8 -	dom->evtchn_fd = -1;
     5.9 -
    5.10  	asprintf(&path, "/console/%d/domain", dom->domid);
    5.11  	dompath = xs_read(xs, path, NULL);
    5.12  	free(path);
    5.13 @@ -232,28 +229,35 @@ static int domain_create_ring(struct dom
    5.14  	if (err)
    5.15  		goto out;
    5.16  
    5.17 -	dom->page = xc_map_foreign_range(xc, dom->domid, getpagesize(),
    5.18 -					 PROT_READ|PROT_WRITE, dom->mfn);
    5.19  	if (dom->page == NULL) {
    5.20 -		err = EINVAL;
    5.21 -		goto out;
    5.22 +		dom->page = xc_map_foreign_range(xc, dom->domid, getpagesize(),
    5.23 +						 PROT_READ|PROT_WRITE,
    5.24 +						 dom->mfn);
    5.25 +		if (dom->page == NULL) {
    5.26 +			err = EINVAL;
    5.27 +			goto out;
    5.28 +		}
    5.29  	}
    5.30  
    5.31 -	/* Opening evtchn independently for each console is a bit
    5.32 -	 * wastefule, but that's how the code is structured... */
    5.33 -	err = open("/dev/xen/evtchn", O_RDWR);
    5.34 -	if (err == -1) {
    5.35 -		err = errno;
    5.36 -		goto out;
    5.37 -	}
    5.38 -	dom->evtchn_fd = err;
    5.39 -
    5.40 -	if (ioctl(dom->evtchn_fd, EVENTCHN_BIND, dom->local_port) == -1) {
    5.41 -		err = errno;
    5.42 -		munmap(dom->page, getpagesize());
    5.43 -		close(dom->evtchn_fd);
    5.44 -		dom->evtchn_fd = -1;
    5.45 -		goto out;
    5.46 +	if (dom->evtchn_fd == -1) {
    5.47 +		/* Opening evtchn independently for each console is a bit
    5.48 +		 * wastefule, but that's how the code is structured... */
    5.49 +		err = open("/dev/xen/evtchn", O_RDWR);
    5.50 +		if (err == -1) {
    5.51 +			err = errno;
    5.52 +			goto out;
    5.53 +		}
    5.54 +		dom->evtchn_fd = err;
    5.55 + 
    5.56 +		if (ioctl(dom->evtchn_fd, EVENTCHN_BIND,
    5.57 +			  dom->local_port) == -1) {
    5.58 +			err = errno;
    5.59 +			munmap(dom->page, getpagesize());
    5.60 +			dom->page = NULL;
    5.61 +			close(dom->evtchn_fd);
    5.62 +			dom->evtchn_fd = -1;
    5.63 +			goto out;
    5.64 +		}
    5.65  	}
    5.66  
    5.67   out:
    5.68 @@ -281,6 +285,9 @@ static struct domain *create_domain(int 
    5.69  	dom->buffer.max_capacity = 0;
    5.70  	dom->next = NULL;
    5.71  
    5.72 +	dom->page = NULL;
    5.73 +	dom->evtchn_fd = -1;
    5.74 +
    5.75  	domain_create_ring(dom);
    5.76  
    5.77  	dolog(LOG_DEBUG, "New domain %d", domid);
    5.78 @@ -290,22 +297,19 @@ static struct domain *create_domain(int 
    5.79  
    5.80  static struct domain *lookup_domain(int domid)
    5.81  {
    5.82 -	struct domain **pp;
    5.83 +	struct domain *dom;
    5.84  
    5.85 -	for (pp = &dom_head; *pp; pp = &(*pp)->next) {
    5.86 -		struct domain *dom = *pp;
    5.87 -
    5.88 -		if (dom->domid == domid) {
    5.89 +	for (dom = dom_head; dom; dom = dom->next)
    5.90 +		if (dom->domid == domid)
    5.91  			return dom;
    5.92 -		} else if (dom->domid > domid) {
    5.93 -			*pp = create_domain(domid);
    5.94 -			(*pp)->next = dom;
    5.95 -			return *pp;
    5.96 -		}
    5.97 -	}
    5.98  
    5.99 -	*pp = create_domain(domid);
   5.100 -	return *pp;
   5.101 +	dom = create_domain(domid);
   5.102 +	if (!dom)
   5.103 +		return NULL;
   5.104 +	dom->next = dom_head;
   5.105 +	dom_head = dom;
   5.106 +
   5.107 +	return dom;
   5.108  }
   5.109  
   5.110  static void remove_domain(struct domain *dom)
   5.111 @@ -345,6 +349,20 @@ static void remove_dead_domains(struct d
   5.112  	}
   5.113  }
   5.114  
   5.115 +void enum_domains(void)
   5.116 +{
   5.117 +	int domid = 1;
   5.118 +	xc_dominfo_t dominfo;
   5.119 +	struct domain *dom;
   5.120 +
   5.121 +	while (xc_domain_getinfo(xc, domid, 1, &dominfo) == 1) {
   5.122 +		dom = lookup_domain(dominfo.domid);
   5.123 +		if (dominfo.dying || dominfo.crashed || dominfo.shutdown)
   5.124 +			dom->is_dead = true;
   5.125 +		domid = dominfo.domid + 1;
   5.126 +	}
   5.127 +}
   5.128 +
   5.129  static void handle_tty_read(struct domain *dom)
   5.130  {
   5.131  	ssize_t len;
   5.132 @@ -353,7 +371,7 @@ static void handle_tty_read(struct domai
   5.133  		(struct ring_head *)(dom->page + PAGE_SIZE/2);
   5.134  	int i;
   5.135  
   5.136 -	len = read(dom->tty_fd, msg, MAX(XENCONS_SPACE(inring), sizeof(msg)));
   5.137 +	len = read(dom->tty_fd, msg, MIN(XENCONS_SPACE(inring), sizeof(msg)));
   5.138  	if (len < 1) {
   5.139  		close(dom->tty_fd);
   5.140  		dom->tty_fd = -1;
   5.141 @@ -415,20 +433,28 @@ static void handle_xcs_msg(int fd)
   5.142  		dolog(LOG_ERR, "read from xcs failed! %m");
   5.143  		exit(1);
   5.144  	}
   5.145 +
   5.146 +	enum_domains();
   5.147  }
   5.148  
   5.149 -static void enum_domains(void)
   5.150 +static void handle_xs(int fd)
   5.151  {
   5.152 -	int domid = 0;
   5.153 -	xc_dominfo_t dominfo;
   5.154 +	char **vec;
   5.155 +	int domid;
   5.156  	struct domain *dom;
   5.157  
   5.158 -	while (xc_domain_getinfo(xc, domid, 1, &dominfo) == 1) {
   5.159 -		dom = lookup_domain(dominfo.domid);
   5.160 -		if (dominfo.dying || dominfo.crashed || dominfo.shutdown)
   5.161 -			dom->is_dead = true;
   5.162 -		domid = dominfo.domid + 1;
   5.163 +	vec = xs_read_watch(xs);
   5.164 +	if (!vec)
   5.165 +		return;
   5.166 +
   5.167 +	if (sscanf(vec[0], "/console/%d", &domid) == 1) {
   5.168 +		dom = lookup_domain(domid);
   5.169 +		if (dom && (dom->evtchn_fd == -1 || dom->page == NULL))
   5.170 +			domain_create_ring(dom);
   5.171  	}
   5.172 +
   5.173 +	xs_acknowledge_watch(xs, vec[1]);
   5.174 +	free(vec);
   5.175  }
   5.176  
   5.177  void handle_io(void)
   5.178 @@ -438,7 +464,7 @@ void handle_io(void)
   5.179  
   5.180  	do {
   5.181  		struct domain *d;
   5.182 -		struct timeval tv = { 1, 0 };
   5.183 +		struct timeval tv = { 100, 0 };
   5.184  		int max_fd = -1;
   5.185  
   5.186  		FD_ZERO(&readfds);
   5.187 @@ -447,6 +473,9 @@ void handle_io(void)
   5.188  		FD_SET(xcs_data_fd, &readfds);
   5.189  		max_fd = MAX(xcs_data_fd, max_fd);
   5.190  
   5.191 +		FD_SET(xs_fileno(xs), &readfds);
   5.192 +		max_fd = MAX(xs_fileno(xs), max_fd);
   5.193 +
   5.194  		for (d = dom_head; d; d = d->next) {
   5.195  			if (d->tty_fd != -1) {
   5.196  				FD_SET(d->tty_fd, &readfds);
   5.197 @@ -463,7 +492,9 @@ void handle_io(void)
   5.198  		}
   5.199  
   5.200  		ret = select(max_fd + 1, &readfds, &writefds, 0, &tv);
   5.201 -		enum_domains();
   5.202 +
   5.203 +		if (FD_ISSET(xs_fileno(xs), &readfds))
   5.204 +			handle_xs(xs_fileno(xs));
   5.205  
   5.206  		if (FD_ISSET(xcs_data_fd, &readfds))
   5.207  			handle_xcs_msg(xcs_data_fd);
     6.1 --- a/tools/console/daemon/io.h	Wed Aug 31 14:37:21 2005 -0800
     6.2 +++ b/tools/console/daemon/io.h	Wed Aug 31 15:22:45 2005 -0800
     6.3 @@ -21,6 +21,7 @@
     6.4  #ifndef CONSOLED_IO_H
     6.5  #define CONSOLED_IO_H
     6.6  
     6.7 +void enum_domains(void);
     6.8  void handle_io(void);
     6.9  
    6.10  #endif
     7.1 --- a/tools/console/daemon/main.c	Wed Aug 31 14:37:21 2005 -0800
     7.2 +++ b/tools/console/daemon/main.c	Wed Aug 31 15:22:45 2005 -0800
     7.3 @@ -85,6 +85,8 @@ int main(int argc, char **argv)
     7.4  
     7.5  	xen_setup();
     7.6  
     7.7 +	enum_domains();
     7.8 +
     7.9  	handle_io();
    7.10  
    7.11  	closelog();
     8.1 --- a/tools/console/daemon/utils.c	Wed Aug 31 14:37:21 2005 -0800
     8.2 +++ b/tools/console/daemon/utils.c	Wed Aug 31 15:22:45 2005 -0800
     8.3 @@ -232,11 +232,16 @@ bool xen_setup(void)
     8.4  		dolog(LOG_ERR, "xcs virq bind failed.  Possible bug.");
     8.5  		goto out_close_data;
     8.6  	}
     8.7 -	
     8.8 +
     8.9 +	if (!xs_watch(xs, "/console", "console")) {
    8.10 +		dolog(LOG_ERR, "xenstore watch on /console failes.");
    8.11 +		goto out_close_data;
    8.12 +	}
    8.13 +
    8.14  	return true;
    8.15  
    8.16   out_close_data:
    8.17 -	close(xcs_ctrl_fd);
    8.18 +	close(xcs_data_fd);
    8.19  	xcs_data_fd = -1;
    8.20   out_close_ctrl:
    8.21  	close(xcs_ctrl_fd);
     9.1 --- a/tools/examples/xmexample.vmx	Wed Aug 31 14:37:21 2005 -0800
     9.2 +++ b/tools/examples/xmexample.vmx	Wed Aug 31 15:22:45 2005 -0800
     9.3 @@ -73,6 +73,10 @@ sdl=0
     9.4  vnc=1
     9.5  
     9.6  #----------------------------------------------------------------------------
     9.7 +# enable spawning vncviewer(only valid when vnc=1), default = 1
     9.8 +vncviewer=1
     9.9 +
    9.10 +#----------------------------------------------------------------------------
    9.11  # no graphics, use serial port
    9.12  #nographic=0
    9.13  
    10.1 --- a/tools/ioemu/cpu-all.h	Wed Aug 31 14:37:21 2005 -0800
    10.2 +++ b/tools/ioemu/cpu-all.h	Wed Aug 31 15:22:45 2005 -0800
    10.3 @@ -672,6 +672,8 @@ static inline void cpu_physical_memory_w
    10.4  int cpu_memory_rw_debug(CPUState *env, target_ulong addr, 
    10.5                          uint8_t *buf, int len, int is_write);
    10.6  
    10.7 +#define VGA_DIRTY_FLAG	0x01
    10.8 +
    10.9  /* read dirty bit (return 0 or 1) */
   10.10  static inline int cpu_physical_memory_is_dirty(target_ulong addr)
   10.11  {
    11.1 --- a/tools/ioemu/exec.c	Wed Aug 31 14:37:21 2005 -0800
    11.2 +++ b/tools/ioemu/exec.c	Wed Aug 31 15:22:45 2005 -0800
    11.3 @@ -461,4 +461,14 @@ int cpu_memory_rw_debug(CPUState *env, t
    11.4  
    11.5  void cpu_physical_memory_reset_dirty(target_ulong start, target_ulong end)
    11.6  {
    11.7 +	uint8_t *p;
    11.8 +	int len;
    11.9 +
   11.10 +	if ((len = (end - start)) <= 0)
   11.11 +		return;
   11.12 +	p = phys_ram_dirty + (start >> TARGET_PAGE_BITS);
   11.13 +	len = len >> TARGET_PAGE_BITS;
   11.14 +	while (len > 0)
   11.15 +		p[--len] &= ~VGA_DIRTY_FLAG;
   11.16 +	return;
   11.17  }
    12.1 --- a/tools/ioemu/hw/pc.c	Wed Aug 31 14:37:21 2005 -0800
    12.2 +++ b/tools/ioemu/hw/pc.c	Wed Aug 31 15:22:45 2005 -0800
    12.3 @@ -540,7 +540,10 @@ void pc_init(int ram_size, int vga_ram_s
    12.4  
    12.5      if (pci_enabled) {
    12.6          for(i = 0; i < nb_nics; i++) {
    12.7 -            pci_ne2000_init(pci_bus, &nd_table[i]);
    12.8 +            if (nic_pcnet)
    12.9 +                pci_pcnet_init(pci_bus, &nd_table[i]);
   12.10 +            else
   12.11 +                pci_ne2000_init(pci_bus, &nd_table[i]); 
   12.12          }
   12.13          pci_piix3_ide_init(pci_bus, bs_table);
   12.14  #ifdef APIC_SUPPORT
    13.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    13.2 +++ b/tools/ioemu/hw/pcnet.c	Wed Aug 31 15:22:45 2005 -0800
    13.3 @@ -0,0 +1,1205 @@
    13.4 +/*
    13.5 + * QEMU AMD PC-Net II (Am79C970A) emulation
    13.6 + * 
    13.7 + * Copyright (c) 2004 Antony T Curtis
    13.8 + * 
    13.9 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   13.10 + * of this software and associated documentation files (the "Software"), to deal
   13.11 + * in the Software without restriction, including without limitation the rights
   13.12 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   13.13 + * copies of the Software, and to permit persons to whom the Software is
   13.14 + * furnished to do so, subject to the following conditions:
   13.15 + *
   13.16 + * The above copyright notice and this permission notice shall be included in
   13.17 + * all copies or substantial portions of the Software.
   13.18 + *
   13.19 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   13.20 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   13.21 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
   13.22 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   13.23 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
   13.24 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
   13.25 + * THE SOFTWARE.
   13.26 + */
   13.27 + 
   13.28 +/* This software was written to be compatible with the specification:
   13.29 + * AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet
   13.30 + * AMD Publication# 19436  Rev:E  Amendment/0  Issue Date: June 2000
   13.31 + */
   13.32 + 
   13.33 +#include "vl.h"
   13.34 +#include <sys/times.h>
   13.35 +#include <arpa/inet.h>
   13.36 +#include <net/ethernet.h>
   13.37 +
   13.38 +//#define PCNET_DEBUG
   13.39 +//#define PCNET_DEBUG_IO
   13.40 +//#define PCNET_DEBUG_BCR
   13.41 +//#define PCNET_DEBUG_CSR
   13.42 +//#define PCNET_DEBUG_RMD
   13.43 +//#define PCNET_DEBUG_TMD
   13.44 +//#define PCNET_DEBUG_MATCH
   13.45 +
   13.46 +
   13.47 +#define PCNET_IOPORT_SIZE       0x20
   13.48 +#define PCNET_PNPMMIO_SIZE      0x20
   13.49 +
   13.50 +
   13.51 +typedef struct PCNetState_st PCNetState;
   13.52 +
   13.53 +struct PCNetState_st {
   13.54 +    PCIDevice dev;
   13.55 +    NetDriverState *nd;
   13.56 +    QEMUTimer *poll_timer;
   13.57 +    int mmio_io_addr, rap, isr, lnkst;
   13.58 +    target_phys_addr_t rdra, tdra;
   13.59 +    uint8_t prom[16];
   13.60 +    uint16_t csr[128];
   13.61 +    uint16_t bcr[32];
   13.62 +    uint64_t timer;
   13.63 +    int xmit_pos, recv_pos;
   13.64 +    uint8_t buffer[4096];
   13.65 +};
   13.66 +
   13.67 +#include "pcnet.h"
   13.68 +
   13.69 +static void pcnet_poll(PCNetState *s);
   13.70 +static void pcnet_poll_timer(void *opaque);
   13.71 +
   13.72 +static uint32_t pcnet_csr_readw(PCNetState *s, uint32_t rap);
   13.73 +static void pcnet_csr_writew(PCNetState *s, uint32_t rap, uint32_t new_value);
   13.74 +static void pcnet_bcr_writew(PCNetState *s, uint32_t rap, uint32_t val);
   13.75 +static uint32_t pcnet_bcr_readw(PCNetState *s, uint32_t rap);
   13.76 +
   13.77 +static void pcnet_s_reset(PCNetState *s)
   13.78 +{
   13.79 +#ifdef PCNET_DEBUG
   13.80 +    printf("pcnet_s_reset\n");
   13.81 +#endif
   13.82 +
   13.83 +    s->lnkst = 0x40;
   13.84 +    s->rdra = 0;
   13.85 +    s->tdra = 0;
   13.86 +    s->rap = 0;
   13.87 +    
   13.88 +    s->bcr[BCR_BSBC] &= ~0x0080;
   13.89 +
   13.90 +    s->csr[0]   = 0x0004;
   13.91 +    s->csr[3]   = 0x0000;
   13.92 +    s->csr[4]   = 0x0115;
   13.93 +    s->csr[5]   = 0x0000;
   13.94 +    s->csr[6]   = 0x0000;
   13.95 +    s->csr[8]   = 0;
   13.96 +    s->csr[9]   = 0;
   13.97 +    s->csr[10]  = 0;
   13.98 +    s->csr[11]  = 0;
   13.99 +    s->csr[12]  = le16_to_cpu(((uint16_t *)&s->prom[0])[0]);
  13.100 +    s->csr[13]  = le16_to_cpu(((uint16_t *)&s->prom[0])[1]);
  13.101 +    s->csr[14]  = le16_to_cpu(((uint16_t *)&s->prom[0])[2]);
  13.102 +    s->csr[15] &= 0x21c4;
  13.103 +    s->csr[72]  = 1;
  13.104 +    s->csr[74]  = 1;
  13.105 +    s->csr[76]  = 1;
  13.106 +    s->csr[78]  = 1;
  13.107 +    s->csr[80]  = 0x1410;
  13.108 +    s->csr[88]  = 0x1003;
  13.109 +    s->csr[89]  = 0x0262;
  13.110 +    s->csr[94]  = 0x0000;
  13.111 +    s->csr[100] = 0x0200;
  13.112 +    s->csr[103] = 0x0105;
  13.113 +    s->csr[103] = 0x0105;
  13.114 +    s->csr[112] = 0x0000;
  13.115 +    s->csr[114] = 0x0000;
  13.116 +    s->csr[122] = 0x0000;
  13.117 +    s->csr[124] = 0x0000;
  13.118 +}
  13.119 +
  13.120 +static void pcnet_update_irq(PCNetState *s)
  13.121 +{
  13.122 +    int isr = 0;
  13.123 +    s->csr[0] &= ~0x0080;
  13.124 +    
  13.125 +#if 1
  13.126 +    if (((s->csr[0] & ~s->csr[3]) & 0x5f00) ||
  13.127 +        (((s->csr[4]>>1) & ~s->csr[4]) & 0x0115) ||
  13.128 +        (((s->csr[5]>>1) & s->csr[5]) & 0x0048))
  13.129 +#else
  13.130 +    if ((!(s->csr[3] & 0x4000) && !!(s->csr[0] & 0x4000)) /* BABL */ ||
  13.131 +        (!(s->csr[3] & 0x1000) && !!(s->csr[0] & 0x1000)) /* MISS */ ||
  13.132 +        (!(s->csr[3] & 0x0100) && !!(s->csr[0] & 0x0100)) /* IDON */ ||
  13.133 +        (!(s->csr[3] & 0x0200) && !!(s->csr[0] & 0x0200)) /* TINT */ ||
  13.134 +        (!(s->csr[3] & 0x0400) && !!(s->csr[0] & 0x0400)) /* RINT */ ||
  13.135 +        (!(s->csr[3] & 0x0800) && !!(s->csr[0] & 0x0800)) /* MERR */ ||
  13.136 +        (!(s->csr[4] & 0x0001) && !!(s->csr[4] & 0x0002)) /* JAB */ ||
  13.137 +        (!(s->csr[4] & 0x0004) && !!(s->csr[4] & 0x0008)) /* TXSTRT */ ||
  13.138 +        (!(s->csr[4] & 0x0010) && !!(s->csr[4] & 0x0020)) /* RCVO */ ||
  13.139 +        (!(s->csr[4] & 0x0100) && !!(s->csr[4] & 0x0200)) /* MFCO */ ||
  13.140 +        (!!(s->csr[5] & 0x0040) && !!(s->csr[5] & 0x0080)) /* EXDINT */ ||
  13.141 +        (!!(s->csr[5] & 0x0008) && !!(s->csr[5] & 0x0010)) /* MPINT */)
  13.142 +#endif
  13.143 +    {
  13.144 +       
  13.145 +        isr = CSR_INEA(s);
  13.146 +        s->csr[0] |= 0x0080;
  13.147 +    }
  13.148 +    
  13.149 +    if (!!(s->csr[4] & 0x0080) && CSR_INEA(s)) { /* UINT */
  13.150 +        s->csr[4] &= ~0x0080;
  13.151 +        s->csr[4] |= 0x0040;
  13.152 +        s->csr[0] |= 0x0080;
  13.153 +        isr = 1;
  13.154 +#ifdef PCNET_DEBUG
  13.155 +        printf("pcnet user int\n");
  13.156 +#endif
  13.157 +    }
  13.158 +
  13.159 +#if 1
  13.160 +    if (((s->csr[5]>>1) & s->csr[5]) & 0x0500) 
  13.161 +#else
  13.162 +    if ((!!(s->csr[5] & 0x0400) && !!(s->csr[5] & 0x0800)) /* SINT */ ||
  13.163 +        (!!(s->csr[5] & 0x0100) && !!(s->csr[5] & 0x0200)) /* SLPINT */ )
  13.164 +#endif
  13.165 +    {
  13.166 +        isr = 1;
  13.167 +        s->csr[0] |= 0x0080;
  13.168 +    }
  13.169 +
  13.170 +    if (isr != s->isr) {
  13.171 +#ifdef PCNET_DEBUG
  13.172 +        printf("pcnet: INTA=%d\n", isr);
  13.173 +#endif
  13.174 +    }
  13.175 +        pci_set_irq(&s->dev, 0, isr);
  13.176 +        s->isr = isr;
  13.177 +}
  13.178 +
  13.179 +static void pcnet_init(PCNetState *s)
  13.180 +{
  13.181 +#ifdef PCNET_DEBUG
  13.182 +    printf("pcnet_init init_addr=0x%08x\n", PHYSADDR(s,CSR_IADR(s)));
  13.183 +#endif
  13.184 +    
  13.185 +#define PCNET_INIT() do { \
  13.186 +        cpu_physical_memory_read(PHYSADDR(s,CSR_IADR(s)),       \
  13.187 +                (uint8_t *)&initblk, sizeof(initblk));          \
  13.188 +        s->csr[15] = le16_to_cpu(initblk.mode);                 \
  13.189 +        CSR_RCVRL(s) = (initblk.rlen < 9) ? (1 << initblk.rlen) : 512;  \
  13.190 +        CSR_XMTRL(s) = (initblk.tlen < 9) ? (1 << initblk.tlen) : 512;  \
  13.191 +        s->csr[ 6] = (initblk.tlen << 12) | (initblk.rlen << 8);        \
  13.192 +        s->csr[ 8] = le16_to_cpu(initblk.ladrf1);                       \
  13.193 +        s->csr[ 9] = le16_to_cpu(initblk.ladrf2);                       \
  13.194 +        s->csr[10] = le16_to_cpu(initblk.ladrf3);                       \
  13.195 +        s->csr[11] = le16_to_cpu(initblk.ladrf4);                       \
  13.196 +        s->csr[12] = le16_to_cpu(initblk.padr1);                        \
  13.197 +        s->csr[13] = le16_to_cpu(initblk.padr2);                        \
  13.198 +        s->csr[14] = le16_to_cpu(initblk.padr3);                        \
  13.199 +        s->rdra = PHYSADDR(s,initblk.rdra);                             \
  13.200 +        s->tdra = PHYSADDR(s,initblk.tdra);                             \
  13.201 +} while (0)
  13.202 +    
  13.203 +    if (BCR_SSIZE32(s)) {
  13.204 +        struct pcnet_initblk32 initblk;
  13.205 +        PCNET_INIT();
  13.206 +#ifdef PCNET_DEBUG
  13.207 +        printf("initblk.rlen=0x%02x, initblk.tlen=0x%02x\n",
  13.208 +                initblk.rlen, initblk.tlen);
  13.209 +#endif
  13.210 +    } else {
  13.211 +        struct pcnet_initblk16 initblk;
  13.212 +        PCNET_INIT();
  13.213 +#ifdef PCNET_DEBUG
  13.214 +        printf("initblk.rlen=0x%02x, initblk.tlen=0x%02x\n",
  13.215 +                initblk.rlen, initblk.tlen);
  13.216 +#endif
  13.217 +    }
  13.218 +
  13.219 +#undef PCNET_INIT
  13.220 +
  13.221 +    CSR_RCVRC(s) = CSR_RCVRL(s);
  13.222 +    CSR_XMTRC(s) = CSR_XMTRL(s);
  13.223 +
  13.224 +#ifdef PCNET_DEBUG
  13.225 +    printf("pcnet ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]\n", 
  13.226 +        BCR_SSIZE32(s),
  13.227 +        s->rdra, CSR_RCVRL(s), s->tdra, CSR_XMTRL(s));
  13.228 +#endif
  13.229 +
  13.230 +    s->csr[0] |= 0x0101;    
  13.231 +    s->csr[0] &= ~0x0004;       /* clear STOP bit */
  13.232 +}
  13.233 +
  13.234 +static void pcnet_start(PCNetState *s)
  13.235 +{
  13.236 +#ifdef PCNET_DEBUG
  13.237 +    printf("pcnet_start\n");
  13.238 +#endif
  13.239 +
  13.240 +    if (!CSR_DTX(s))
  13.241 +        s->csr[0] |= 0x0010;    /* set TXON */
  13.242 +        
  13.243 +    if (!CSR_DRX(s))
  13.244 +        s->csr[0] |= 0x0020;    /* set RXON */
  13.245 +
  13.246 +    s->csr[0] &= ~0x0004;       /* clear STOP bit */
  13.247 +    s->csr[0] |= 0x0002;
  13.248 +}
  13.249 +
  13.250 +static void pcnet_stop(PCNetState *s)
  13.251 +{
  13.252 +#ifdef PCNET_DEBUG
  13.253 +    printf("pcnet_stop\n");
  13.254 +#endif
  13.255 +    s->csr[0] &= ~0x7feb;
  13.256 +    s->csr[0] |= 0x0014;
  13.257 +    s->csr[4] &= ~0x02c2;
  13.258 +    s->csr[5] &= ~0x0011;
  13.259 +    pcnet_poll_timer(s);
  13.260 +}
  13.261 +
  13.262 +static void pcnet_rdte_poll(PCNetState *s)
  13.263 +{
  13.264 +    s->csr[28] = s->csr[29] = 0;
  13.265 +    if (s->rdra) {
  13.266 +        int bad = 0;
  13.267 +#if 1
  13.268 +        target_phys_addr_t crda = pcnet_rdra_addr(s, CSR_RCVRC(s));
  13.269 +        target_phys_addr_t nrda = pcnet_rdra_addr(s, -1 + CSR_RCVRC(s));
  13.270 +        target_phys_addr_t nnrd = pcnet_rdra_addr(s, -2 + CSR_RCVRC(s));
  13.271 +#else
  13.272 +        target_phys_addr_t crda = s->rdra + 
  13.273 +            (CSR_RCVRL(s) - CSR_RCVRC(s)) *
  13.274 +            (BCR_SWSTYLE(s) ? 16 : 8 );
  13.275 +        int nrdc = CSR_RCVRC(s)<=1 ? CSR_RCVRL(s) : CSR_RCVRC(s)-1;
  13.276 +        target_phys_addr_t nrda = s->rdra + 
  13.277 +            (CSR_RCVRL(s) - nrdc) *
  13.278 +            (BCR_SWSTYLE(s) ? 16 : 8 );
  13.279 +        int nnrc = nrdc<=1 ? CSR_RCVRL(s) : nrdc-1;
  13.280 +        target_phys_addr_t nnrd = s->rdra + 
  13.281 +            (CSR_RCVRL(s) - nnrc) *
  13.282 +            (BCR_SWSTYLE(s) ? 16 : 8 );
  13.283 +#endif
  13.284 +
  13.285 +        CHECK_RMD(PHYSADDR(s,crda), bad);
  13.286 +        if (!bad) {
  13.287 +            CHECK_RMD(PHYSADDR(s,nrda), bad);
  13.288 +            if (bad || (nrda == crda)) nrda = 0;
  13.289 +            CHECK_RMD(PHYSADDR(s,nnrd), bad);
  13.290 +            if (bad || (nnrd == crda)) nnrd = 0;
  13.291 +
  13.292 +            s->csr[28] = crda & 0xffff;
  13.293 +            s->csr[29] = crda >> 16;
  13.294 +            s->csr[26] = nrda & 0xffff;
  13.295 +            s->csr[27] = nrda >> 16;
  13.296 +            s->csr[36] = nnrd & 0xffff;
  13.297 +            s->csr[37] = nnrd >> 16;
  13.298 +#ifdef PCNET_DEBUG
  13.299 +            if (bad) {
  13.300 +                printf("pcnet: BAD RMD RECORDS AFTER 0x%08x\n",
  13.301 +                       PHYSADDR(s,crda));
  13.302 +            }
  13.303 +        } else {
  13.304 +            printf("pcnet: BAD RMD RDA=0x%08x\n", PHYSADDR(s,crda));
  13.305 +#endif
  13.306 +        }
  13.307 +    }
  13.308 +    
  13.309 +    if (CSR_CRDA(s)) {
  13.310 +        struct pcnet_RMD rmd;
  13.311 +        RMDLOAD(&rmd, PHYSADDR(s,CSR_CRDA(s)));
  13.312 +        CSR_CRBC(s) = rmd.rmd1.bcnt;
  13.313 +        CSR_CRST(s) = ((uint32_t *)&rmd)[1] >> 16;
  13.314 +#ifdef PCNET_DEBUG_RMD_X
  13.315 +        printf("CRDA=0x%08x CRST=0x%04x RCVRC=%d RMD1=0x%08x RMD2=0x%08x\n",
  13.316 +                PHYSADDR(s,CSR_CRDA(s)), CSR_CRST(s), CSR_RCVRC(s),
  13.317 +                ((uint32_t *)&rmd)[1], ((uint32_t *)&rmd)[2]);
  13.318 +        PRINT_RMD(&rmd);
  13.319 +#endif
  13.320 +    } else {
  13.321 +        CSR_CRBC(s) = CSR_CRST(s) = 0;
  13.322 +    }
  13.323 +    
  13.324 +    if (CSR_NRDA(s)) {
  13.325 +        struct pcnet_RMD rmd;
  13.326 +        RMDLOAD(&rmd, PHYSADDR(s,CSR_NRDA(s)));
  13.327 +        CSR_NRBC(s) = rmd.rmd1.bcnt;
  13.328 +        CSR_NRST(s) = ((uint32_t *)&rmd)[1] >> 16;
  13.329 +    } else {
  13.330 +        CSR_NRBC(s) = CSR_NRST(s) = 0;
  13.331 +    }
  13.332 +
  13.333 +}
  13.334 +
  13.335 +static int pcnet_tdte_poll(PCNetState *s)
  13.336 +{
  13.337 +    s->csr[34] = s->csr[35] = 0;
  13.338 +    if (s->tdra) {
  13.339 +        target_phys_addr_t cxda = s->tdra + 
  13.340 +            (CSR_XMTRL(s) - CSR_XMTRC(s)) *
  13.341 +            (BCR_SWSTYLE(s) ? 16 : 8 );
  13.342 +        int bad = 0;
  13.343 +        CHECK_TMD(PHYSADDR(s, cxda),bad);
  13.344 +        if (!bad) {
  13.345 +            if (CSR_CXDA(s) != cxda) {
  13.346 +                s->csr[60] = s->csr[34];
  13.347 +                s->csr[61] = s->csr[35];
  13.348 +                s->csr[62] = CSR_CXBC(s);
  13.349 +                s->csr[63] = CSR_CXST(s);
  13.350 +            }
  13.351 +            s->csr[34] = cxda & 0xffff;
  13.352 +            s->csr[35] = cxda >> 16;
  13.353 +#ifdef PCNET_DEBUG
  13.354 +        } else {
  13.355 +            printf("pcnet: BAD TMD XDA=0x%08x\n", PHYSADDR(s,cxda));
  13.356 +#endif
  13.357 +        }
  13.358 +    }
  13.359 +
  13.360 +    if (CSR_CXDA(s)) {
  13.361 +        struct pcnet_TMD tmd;
  13.362 +
  13.363 +        TMDLOAD(&tmd, PHYSADDR(s,CSR_CXDA(s)));                
  13.364 +
  13.365 +        CSR_CXBC(s) = tmd.tmd1.bcnt;
  13.366 +        CSR_CXST(s) = ((uint32_t *)&tmd)[1] >> 16;
  13.367 +    } else {
  13.368 +        CSR_CXBC(s) = CSR_CXST(s) = 0;
  13.369 +    }
  13.370 +    
  13.371 +    return !!(CSR_CXST(s) & 0x8000);
  13.372 +}
  13.373 +
  13.374 +static int pcnet_can_receive(void *opaque)
  13.375 +{
  13.376 +    PCNetState *s = opaque;
  13.377 +    if (CSR_STOP(s) || CSR_SPND(s))
  13.378 +        return 0;
  13.379 +        
  13.380 +    if (s->recv_pos > 0)
  13.381 +        return 0;
  13.382 +
  13.383 +    return sizeof(s->buffer)-16;
  13.384 +}
  13.385 +
  13.386 +static void pcnet_receive(void *opaque, const uint8_t *buf, int size)
  13.387 +{
  13.388 +    PCNetState *s = opaque;
  13.389 +    int is_padr = 0, is_bcast = 0, is_ladr = 0;
  13.390 +
  13.391 +    if (CSR_DRX(s) || CSR_STOP(s) || CSR_SPND(s) || !size)
  13.392 +        return;
  13.393 +
  13.394 +#ifdef PCNET_DEBUG
  13.395 +    printf("pcnet_receive size=%d\n", size);
  13.396 +#endif
  13.397 +
  13.398 +    if (CSR_PROM(s) 
  13.399 +        || (is_padr=padr_match(s, buf, size)) 
  13.400 +        || (is_bcast=padr_bcast(s, buf, size))
  13.401 +        || (is_ladr=ladr_match(s, buf, size))) {
  13.402 +
  13.403 +        pcnet_rdte_poll(s);
  13.404 +
  13.405 +        if (!(CSR_CRST(s) & 0x8000) && s->rdra) {
  13.406 +            struct pcnet_RMD rmd;
  13.407 +            int rcvrc = CSR_RCVRC(s)-1,i;
  13.408 +            target_phys_addr_t nrda;
  13.409 +            for (i = CSR_RCVRL(s)-1; i > 0; i--, rcvrc--) {
  13.410 +                if (rcvrc <= 1)
  13.411 +                    rcvrc = CSR_RCVRL(s);
  13.412 +                nrda = s->rdra +
  13.413 +                    (CSR_RCVRL(s) - rcvrc) *
  13.414 +                    (BCR_SWSTYLE(s) ? 16 : 8 );
  13.415 +                RMDLOAD(&rmd, PHYSADDR(s,nrda));                  
  13.416 +                if (rmd.rmd1.own) {                
  13.417 +#ifdef PCNET_DEBUG_RMD
  13.418 +                    printf("pcnet - scan buffer: RCVRC=%d PREV_RCVRC=%d\n", 
  13.419 +                                rcvrc, CSR_RCVRC(s));
  13.420 +#endif
  13.421 +                    CSR_RCVRC(s) = rcvrc;
  13.422 +                    pcnet_rdte_poll(s);
  13.423 +                    break;
  13.424 +                }
  13.425 +            }
  13.426 +        }
  13.427 +
  13.428 +        if (!(CSR_CRST(s) & 0x8000)) {
  13.429 +#ifdef PCNET_DEBUG_RMD
  13.430 +            printf("pcnet - no buffer: RCVRC=%d\n", CSR_RCVRC(s));
  13.431 +#endif
  13.432 +            s->csr[0] |= 0x1000; /* Set MISS flag */
  13.433 +            CSR_MISSC(s)++;
  13.434 +        } else {
  13.435 +            uint8_t *src = &s->buffer[8];
  13.436 +            target_phys_addr_t crda = CSR_CRDA(s);
  13.437 +            struct pcnet_RMD rmd;
  13.438 +            int pktcount = 0;
  13.439 +
  13.440 +            memcpy(src, buf, size);
  13.441 +            
  13.442 +            if (!CSR_ASTRP_RCV(s)) {
  13.443 +                uint32_t fcs = ~0;
  13.444 +#if 0            
  13.445 +                uint8_t *p = s->buffer;
  13.446 +                
  13.447 +                ((uint32_t *)p)[0] = ((uint32_t *)p)[1] = 0xaaaaaaaa;
  13.448 +                p[7] = 0xab;
  13.449 +#else
  13.450 +                uint8_t *p = src;
  13.451 +#endif
  13.452 +
  13.453 +                while (size < 46) {
  13.454 +                    src[size++] = 0;
  13.455 +                }
  13.456 +                
  13.457 +                while (p != &src[size]) {
  13.458 +                    CRC(fcs, *p++);
  13.459 +                }
  13.460 +                ((uint32_t *)&src[size])[0] = htonl(fcs);
  13.461 +                size += 4; /* FCS at end of packet */
  13.462 +            } else size += 4;
  13.463 +
  13.464 +#ifdef PCNET_DEBUG_MATCH
  13.465 +            PRINT_PKTHDR(buf);
  13.466 +#endif
  13.467 +
  13.468 +            RMDLOAD(&rmd, PHYSADDR(s,crda));
  13.469 +            /*if (!CSR_LAPPEN(s))*/
  13.470 +                rmd.rmd1.stp = 1;
  13.471 +
  13.472 +#define PCNET_RECV_STORE() do {                                 \
  13.473 +    int count = MIN(4096 - rmd.rmd1.bcnt,size);                 \
  13.474 +    target_phys_addr_t rbadr = PHYSADDR(s, rmd.rmd0.rbadr);     \
  13.475 +    cpu_physical_memory_write(rbadr, src, count);               \
  13.476 +    cpu_physical_memory_set_dirty(rbadr);                       \
  13.477 +    cpu_physical_memory_set_dirty(rbadr+count);                 \
  13.478 +    src += count; size -= count;                                \
  13.479 +    rmd.rmd2.mcnt = count; rmd.rmd1.own = 0;                    \
  13.480 +    RMDSTORE(&rmd, PHYSADDR(s,crda));                           \
  13.481 +    pktcount++;                                                 \
  13.482 +} while (0)
  13.483 +
  13.484 +            PCNET_RECV_STORE();
  13.485 +            if ((size > 0) && CSR_NRDA(s)) {
  13.486 +                target_phys_addr_t nrda = CSR_NRDA(s);
  13.487 +                RMDLOAD(&rmd, PHYSADDR(s,nrda));
  13.488 +                if (rmd.rmd1.own) {
  13.489 +                    crda = nrda;
  13.490 +                    PCNET_RECV_STORE();
  13.491 +                    if ((size > 0) && (nrda=CSR_NNRD(s))) {
  13.492 +                        RMDLOAD(&rmd, PHYSADDR(s,nrda));
  13.493 +                        if (rmd.rmd1.own) {
  13.494 +                            crda = nrda;
  13.495 +                            PCNET_RECV_STORE();
  13.496 +                        }
  13.497 +                    }
  13.498 +                }                
  13.499 +            }
  13.500 +
  13.501 +#undef PCNET_RECV_STORE
  13.502 +
  13.503 +            RMDLOAD(&rmd, PHYSADDR(s,crda));
  13.504 +            if (size == 0) {
  13.505 +                rmd.rmd1.enp = 1;
  13.506 +                rmd.rmd1.pam = !CSR_PROM(s) && is_padr;
  13.507 +                rmd.rmd1.lafm = !CSR_PROM(s) && is_ladr;
  13.508 +                rmd.rmd1.bam = !CSR_PROM(s) && is_bcast;
  13.509 +            } else {
  13.510 +                rmd.rmd1.oflo = 1;
  13.511 +                rmd.rmd1.buff = 1;
  13.512 +                rmd.rmd1.err = 1;
  13.513 +            }
  13.514 +            RMDSTORE(&rmd, PHYSADDR(s,crda));
  13.515 +            s->csr[0] |= 0x0400;
  13.516 +
  13.517 +#ifdef PCNET_DEBUG
  13.518 +            printf("RCVRC=%d CRDA=0x%08x BLKS=%d\n", 
  13.519 +                CSR_RCVRC(s), PHYSADDR(s,CSR_CRDA(s)), pktcount);
  13.520 +#endif
  13.521 +#ifdef PCNET_DEBUG_RMD
  13.522 +            PRINT_RMD(&rmd);
  13.523 +#endif        
  13.524 +
  13.525 +            while (pktcount--) {
  13.526 +                if (CSR_RCVRC(s) <= 1)
  13.527 +                    CSR_RCVRC(s) = CSR_RCVRL(s);
  13.528 +                else
  13.529 +                    CSR_RCVRC(s)--;            
  13.530 +            }
  13.531 +            
  13.532 +            pcnet_rdte_poll(s);
  13.533 +
  13.534 +        }        
  13.535 +    }
  13.536 +
  13.537 +    pcnet_poll(s);
  13.538 +    pcnet_update_irq(s);    
  13.539 +}
  13.540 +
  13.541 +static void pcnet_transmit(PCNetState *s)
  13.542 +{
  13.543 +    target_phys_addr_t xmit_cxda = 0;
  13.544 +    int count = CSR_XMTRL(s)-1;
  13.545 +    s->xmit_pos = -1;
  13.546 +    
  13.547 +    if (!CSR_TXON(s)) {
  13.548 +        s->csr[0] &= ~0x0008;
  13.549 +        return;
  13.550 +    }
  13.551 +    
  13.552 +    txagain:
  13.553 +    if (pcnet_tdte_poll(s)) {
  13.554 +        struct pcnet_TMD tmd;
  13.555 +
  13.556 +        TMDLOAD(&tmd, PHYSADDR(s,CSR_CXDA(s)));                
  13.557 +
  13.558 +#ifdef PCNET_DEBUG_TMD
  13.559 +        printf("  TMDLOAD 0x%08x\n", PHYSADDR(s,CSR_CXDA(s)));
  13.560 +        PRINT_TMD(&tmd);
  13.561 +#endif
  13.562 +        if (tmd.tmd1.stp) {
  13.563 +            s->xmit_pos = 0;                
  13.564 +            if (!tmd.tmd1.enp) {
  13.565 +                cpu_physical_memory_read(PHYSADDR(s, tmd.tmd0.tbadr),
  13.566 +                        s->buffer, 4096 - tmd.tmd1.bcnt);
  13.567 +                s->xmit_pos += 4096 - tmd.tmd1.bcnt;
  13.568 +            } 
  13.569 +            xmit_cxda = PHYSADDR(s,CSR_CXDA(s));
  13.570 +        }
  13.571 +        if (tmd.tmd1.enp && (s->xmit_pos >= 0)) {
  13.572 +            cpu_physical_memory_read(PHYSADDR(s, tmd.tmd0.tbadr),
  13.573 +                    s->buffer + s->xmit_pos, 4096 - tmd.tmd1.bcnt);
  13.574 +            s->xmit_pos += 4096 - tmd.tmd1.bcnt;
  13.575 +#ifdef PCNET_DEBUG
  13.576 +            printf("pcnet_transmit size=%d\n", s->xmit_pos);
  13.577 +#endif            
  13.578 +            if (CSR_LOOP(s))
  13.579 +                pcnet_receive(s, s->buffer, s->xmit_pos);
  13.580 +            else
  13.581 +                qemu_send_packet(s->nd, s->buffer, s->xmit_pos);
  13.582 +
  13.583 +            s->csr[0] &= ~0x0008;   /* clear TDMD */
  13.584 +            s->csr[4] |= 0x0004;    /* set TXSTRT */
  13.585 +            s->xmit_pos = -1;
  13.586 +        }
  13.587 +
  13.588 +        tmd.tmd1.own = 0;
  13.589 +        TMDSTORE(&tmd, PHYSADDR(s,CSR_CXDA(s)));
  13.590 +        if (!CSR_TOKINTD(s) || (CSR_LTINTEN(s) && tmd.tmd1.ltint))
  13.591 +            s->csr[0] |= 0x0200;    /* set TINT */
  13.592 +
  13.593 +        if (CSR_XMTRC(s)<=1)
  13.594 +            CSR_XMTRC(s) = CSR_XMTRL(s);
  13.595 +        else
  13.596 +            CSR_XMTRC(s)--;
  13.597 +        if (count--)
  13.598 +            goto txagain;
  13.599 +
  13.600 +    } else 
  13.601 +    if (s->xmit_pos >= 0) {
  13.602 +        struct pcnet_TMD tmd;
  13.603 +        TMDLOAD(&tmd, PHYSADDR(s,xmit_cxda));                
  13.604 +        tmd.tmd2.buff = tmd.tmd2.uflo = tmd.tmd1.err = 1;
  13.605 +        tmd.tmd1.own = 0;
  13.606 +        TMDSTORE(&tmd, PHYSADDR(s,xmit_cxda));
  13.607 +        s->csr[0] |= 0x0200;    /* set TINT */
  13.608 +        if (!CSR_DXSUFLO(s)) {
  13.609 +            s->csr[0] &= ~0x0010;
  13.610 +        } else
  13.611 +        if (count--)
  13.612 +          goto txagain;
  13.613 +    }
  13.614 +}
  13.615 +
  13.616 +static void pcnet_poll(PCNetState *s)
  13.617 +{
  13.618 +    if (CSR_RXON(s)) {
  13.619 +        pcnet_rdte_poll(s);
  13.620 +    }
  13.621 +
  13.622 +    if (CSR_TDMD(s) || 
  13.623 +        (CSR_TXON(s) && !CSR_DPOLL(s) && pcnet_tdte_poll(s)))
  13.624 +        pcnet_transmit(s);
  13.625 +}
  13.626 +
  13.627 +static void pcnet_poll_timer(void *opaque)
  13.628 +{
  13.629 +    PCNetState *s = opaque;
  13.630 +
  13.631 +    qemu_del_timer(s->poll_timer);
  13.632 +
  13.633 +    if (CSR_TDMD(s)) {
  13.634 +        pcnet_transmit(s);
  13.635 +    }
  13.636 +
  13.637 +    pcnet_update_irq(s);    
  13.638 +
  13.639 +    if (!CSR_STOP(s) && !CSR_SPND(s) && !CSR_DPOLL(s)) {
  13.640 +        uint64_t now = qemu_get_clock(vm_clock) * 33;
  13.641 +        if (!s->timer || !now)
  13.642 +            s->timer = now;
  13.643 +        else {
  13.644 +            uint64_t t = now - s->timer + CSR_POLL(s);
  13.645 +            if (t > 0xffffLL) {
  13.646 +                pcnet_poll(s);
  13.647 +                CSR_POLL(s) = CSR_PINT(s);
  13.648 +            } else
  13.649 +                CSR_POLL(s) = t;
  13.650 +        }
  13.651 +        qemu_mod_timer(s->poll_timer, 
  13.652 +            pcnet_get_next_poll_time(s,qemu_get_clock(vm_clock)));
  13.653 +    }
  13.654 +}
  13.655 +
  13.656 +
  13.657 +static void pcnet_csr_writew(PCNetState *s, uint32_t rap, uint32_t new_value)
  13.658 +{
  13.659 +    uint16_t val = new_value;
  13.660 +#ifdef PCNET_DEBUG_CSR
  13.661 +    printf("pcnet_csr_writew rap=%d val=0x%04x\n", rap, val);
  13.662 +#endif
  13.663 +    switch (rap) {
  13.664 +    case 0:
  13.665 +        s->csr[0] &= ~(val & 0x7f00); /* Clear any interrupt flags */
  13.666 +
  13.667 +        s->csr[0] = (s->csr[0] & ~0x0040) | (val & 0x0048);
  13.668 +
  13.669 +        val = (val & 0x007f) | (s->csr[0] & 0x7f00);
  13.670 +
  13.671 +        /* IFF STOP, STRT and INIT are set, clear STRT and INIT */
  13.672 +        if ((val&7) == 7)
  13.673 +          val &= ~3;
  13.674 +
  13.675 +        if (!CSR_STOP(s) && (val & 4))
  13.676 +            pcnet_stop(s);
  13.677 +
  13.678 +        if (!CSR_INIT(s) && (val & 1))
  13.679 +            pcnet_init(s);
  13.680 +
  13.681 +        if (!CSR_STRT(s) && (val & 2))
  13.682 +            pcnet_start(s);
  13.683 +
  13.684 +        if (CSR_TDMD(s)) 
  13.685 +            pcnet_transmit(s);
  13.686 +
  13.687 +        return;
  13.688 +    case 1:
  13.689 +    case 2:
  13.690 +    case 8:
  13.691 +    case 9:
  13.692 +    case 10:
  13.693 +    case 11:
  13.694 +    case 12:
  13.695 +    case 13:
  13.696 +    case 14:
  13.697 +    case 15:
  13.698 +    case 18: /* CRBAL */
  13.699 +    case 19: /* CRBAU */
  13.700 +    case 20: /* CXBAL */
  13.701 +    case 21: /* CXBAU */
  13.702 +    case 22: /* NRBAU */
  13.703 +    case 23: /* NRBAU */
  13.704 +    case 24:
  13.705 +    case 25:
  13.706 +    case 26:
  13.707 +    case 27:
  13.708 +    case 28:
  13.709 +    case 29:
  13.710 +    case 30:
  13.711 +    case 31:
  13.712 +    case 32:
  13.713 +    case 33:
  13.714 +    case 34:
  13.715 +    case 35:
  13.716 +    case 36:
  13.717 +    case 37:
  13.718 +    case 38:
  13.719 +    case 39:
  13.720 +    case 40: /* CRBC */
  13.721 +    case 41:
  13.722 +    case 42: /* CXBC */
  13.723 +    case 43:
  13.724 +    case 44:
  13.725 +    case 45:
  13.726 +    case 46: /* POLL */
  13.727 +    case 47: /* POLLINT */
  13.728 +    case 72:
  13.729 +    case 74:
  13.730 +    case 76: /* RCVRL */
  13.731 +    case 78: /* XMTRL */
  13.732 +    case 112:
  13.733 +       if (CSR_STOP(s) || CSR_SPND(s))
  13.734 +           break;
  13.735 +       return;
  13.736 +    case 3:
  13.737 +        break;
  13.738 +    case 4:
  13.739 +        s->csr[4] &= ~(val & 0x026a); 
  13.740 +        val &= ~0x026a; val |= s->csr[4] & 0x026a;
  13.741 +        break;
  13.742 +    case 5:
  13.743 +        s->csr[5] &= ~(val & 0x0a90); 
  13.744 +        val &= ~0x0a90; val |= s->csr[5] & 0x0a90;
  13.745 +        break;
  13.746 +    case 16:
  13.747 +        pcnet_csr_writew(s,1,val);
  13.748 +        return;
  13.749 +    case 17:
  13.750 +        pcnet_csr_writew(s,2,val);
  13.751 +        return;
  13.752 +    case 58:
  13.753 +        pcnet_bcr_writew(s,BCR_SWS,val);
  13.754 +        break;
  13.755 +    default:
  13.756 +        return;
  13.757 +    }
  13.758 +    s->csr[rap] = val;
  13.759 +}
  13.760 +
  13.761 +static uint32_t pcnet_csr_readw(PCNetState *s, uint32_t rap)
  13.762 +{
  13.763 +    uint32_t val;
  13.764 +    switch (rap) {
  13.765 +    case 0:
  13.766 +        pcnet_update_irq(s);
  13.767 +        val = s->csr[0];
  13.768 +        val |= (val & 0x7800) ? 0x8000 : 0;
  13.769 +        break;
  13.770 +    case 16:
  13.771 +        return pcnet_csr_readw(s,1);
  13.772 +    case 17:
  13.773 +        return pcnet_csr_readw(s,2);
  13.774 +    case 58:
  13.775 +        return pcnet_bcr_readw(s,BCR_SWS);
  13.776 +    case 88:
  13.777 +        val = s->csr[89];
  13.778 +        val <<= 16;
  13.779 +        val |= s->csr[88];
  13.780 +        break;
  13.781 +    default:
  13.782 +        val = s->csr[rap];
  13.783 +    }
  13.784 +#ifdef PCNET_DEBUG_CSR
  13.785 +    printf("pcnet_csr_readw rap=%d val=0x%04x\n", rap, val);
  13.786 +#endif
  13.787 +    return val;
  13.788 +}
  13.789 +
  13.790 +static void pcnet_bcr_writew(PCNetState *s, uint32_t rap, uint32_t val)
  13.791 +{
  13.792 +    rap &= 127;
  13.793 +#ifdef PCNET_DEBUG_BCR
  13.794 +    printf("pcnet_bcr_writew rap=%d val=0x%04x\n", rap, val);
  13.795 +#endif
  13.796 +    switch (rap) {
  13.797 +    case BCR_SWS:
  13.798 +        if (!(CSR_STOP(s) || CSR_SPND(s)))
  13.799 +            return;
  13.800 +        val &= ~0x0300;
  13.801 +        switch (val & 0x00ff) {
  13.802 +        case 0:
  13.803 +            val |= 0x0200;
  13.804 +            break;
  13.805 +        case 1:
  13.806 +            val |= 0x0100;
  13.807 +            break;
  13.808 +        case 2:
  13.809 +        case 3:
  13.810 +            val |= 0x0300;
  13.811 +            break;
  13.812 +        default:
  13.813 +            printf("Bad SWSTYLE=0x%02x\n", val & 0xff);
  13.814 +            val = 0x0200;
  13.815 +            break;
  13.816 +        }
  13.817 +#ifdef PCNET_DEBUG
  13.818 +       printf("BCR_SWS=0x%04x\n", val);
  13.819 +#endif
  13.820 +    case BCR_LNKST:
  13.821 +    case BCR_LED1:
  13.822 +    case BCR_LED2:
  13.823 +    case BCR_LED3:
  13.824 +    case BCR_MC:
  13.825 +    case BCR_FDC:
  13.826 +    case BCR_BSBC:
  13.827 +    case BCR_EECAS:
  13.828 +    case BCR_PLAT:
  13.829 +        s->bcr[rap] = val;
  13.830 +        break;
  13.831 +    default:
  13.832 +        break;
  13.833 +    }
  13.834 +}
  13.835 +
  13.836 +static uint32_t pcnet_bcr_readw(PCNetState *s, uint32_t rap)
  13.837 +{
  13.838 +    uint32_t val;
  13.839 +    rap &= 127;
  13.840 +    switch (rap) {
  13.841 +    case BCR_LNKST:
  13.842 +    case BCR_LED1:
  13.843 +    case BCR_LED2:
  13.844 +    case BCR_LED3:
  13.845 +        val = s->bcr[rap] & ~0x8000;
  13.846 +        val |= (val & 0x017f & s->lnkst) ? 0x8000 : 0;
  13.847 +        break;
  13.848 +    default:
  13.849 +        val = rap < 32 ? s->bcr[rap] : 0;
  13.850 +        break;
  13.851 +    }
  13.852 +#ifdef PCNET_DEBUG_BCR
  13.853 +    printf("pcnet_bcr_readw rap=%d val=0x%04x\n", rap, val);
  13.854 +#endif
  13.855 +    return val;
  13.856 +}
  13.857 +
  13.858 +static void pcnet_h_reset(PCNetState *s)
  13.859 +{
  13.860 +    int i;
  13.861 +    uint16_t checksum;
  13.862 +
  13.863 +    /* Initialize the PROM */
  13.864 +
  13.865 +    memcpy(s->prom, s->nd->macaddr, 6);
  13.866 +    s->prom[12] = s->prom[13] = 0x00;
  13.867 +    s->prom[14] = s->prom[15] = 0x57;
  13.868 +
  13.869 +    for (i = 0,checksum = 0; i < 16; i++)
  13.870 +        checksum += s->prom[i];
  13.871 +    *(uint16_t *)&s->prom[12] = cpu_to_le16(checksum);
  13.872 +
  13.873 +
  13.874 +    s->bcr[BCR_MSRDA] = 0x0005;
  13.875 +    s->bcr[BCR_MSWRA] = 0x0005;
  13.876 +    s->bcr[BCR_MC   ] = 0x0002;
  13.877 +    s->bcr[BCR_LNKST] = 0x00c0;
  13.878 +    s->bcr[BCR_LED1 ] = 0x0084;
  13.879 +    s->bcr[BCR_LED2 ] = 0x0088;
  13.880 +    s->bcr[BCR_LED3 ] = 0x0090;
  13.881 +    s->bcr[BCR_FDC  ] = 0x0000;
  13.882 +    s->bcr[BCR_BSBC ] = 0x9001;
  13.883 +    s->bcr[BCR_EECAS] = 0x0002;
  13.884 +    s->bcr[BCR_SWS  ] = 0x0200;
  13.885 +    s->bcr[BCR_PLAT ] = 0xff06;
  13.886 +
  13.887 +    pcnet_s_reset(s);
  13.888 +}
  13.889 +
  13.890 +static void pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val)
  13.891 +{
  13.892 +    PCNetState *s = opaque;
  13.893 +#ifdef PCNET_DEBUG
  13.894 +    printf("pcnet_aprom_writeb addr=0x%08x val=0x%02x\n", addr, val);
  13.895 +#endif    
  13.896 +    /* Check APROMWE bit to enable write access */
  13.897 +    if (pcnet_bcr_readw(s,2) & 0x80)
  13.898 +        s->prom[addr & 15] = val;
  13.899 +}       
  13.900 +
  13.901 +static uint32_t pcnet_aprom_readb(void *opaque, uint32_t addr)
  13.902 +{
  13.903 +    PCNetState *s = opaque;
  13.904 +    uint32_t val = s->prom[addr &= 15];
  13.905 +#ifdef PCNET_DEBUG
  13.906 +    printf("pcnet_aprom_readb addr=0x%08x val=0x%02x\n", addr, val);
  13.907 +#endif
  13.908 +    return val;
  13.909 +}
  13.910 +
  13.911 +static void pcnet_ioport_writew(void *opaque, uint32_t addr, uint32_t val)
  13.912 +{
  13.913 +    PCNetState *s = opaque;
  13.914 +    pcnet_poll_timer(s);
  13.915 +#ifdef PCNET_DEBUG_IO
  13.916 +    printf("pcnet_ioport_writew addr=0x%08x val=0x%04x\n", addr, val);
  13.917 +#endif
  13.918 +    if (!BCR_DWIO(s)) {
  13.919 +        switch (addr & 0x0f) {
  13.920 +        case 0x00: /* RDP */
  13.921 +            pcnet_csr_writew(s, s->rap, val);
  13.922 +            break;
  13.923 +        case 0x02:
  13.924 +            s->rap = val & 0x7f;
  13.925 +            break;
  13.926 +        case 0x06:
  13.927 +            pcnet_bcr_writew(s, s->rap, val);
  13.928 +            break;
  13.929 +        }
  13.930 +    }
  13.931 +    pcnet_update_irq(s);
  13.932 +}
  13.933 +
  13.934 +static uint32_t pcnet_ioport_readw(void *opaque, uint32_t addr)
  13.935 +{
  13.936 +    PCNetState *s = opaque;
  13.937 +    uint32_t val = -1;
  13.938 +    pcnet_poll_timer(s);
  13.939 +    if (!BCR_DWIO(s)) {
  13.940 +        switch (addr & 0x0f) {
  13.941 +        case 0x00: /* RDP */
  13.942 +            val = pcnet_csr_readw(s, s->rap);
  13.943 +            break;
  13.944 +        case 0x02:
  13.945 +            val = s->rap;
  13.946 +            break;
  13.947 +        case 0x04:
  13.948 +            pcnet_s_reset(s);
  13.949 +            val = 0;
  13.950 +            break;
  13.951 +        case 0x06:
  13.952 +            val = pcnet_bcr_readw(s, s->rap);
  13.953 +            break;
  13.954 +        }
  13.955 +    }
  13.956 +    pcnet_update_irq(s);
  13.957 +#ifdef PCNET_DEBUG_IO
  13.958 +    printf("pcnet_ioport_readw addr=0x%08x val=0x%04x\n", addr, val & 0xffff);
  13.959 +#endif
  13.960 +    return val;
  13.961 +}
  13.962 +
  13.963 +static void pcnet_ioport_writel(void *opaque, uint32_t addr, uint32_t val)
  13.964 +{
  13.965 +    PCNetState *s = opaque;
  13.966 +    pcnet_poll_timer(s);
  13.967 +#ifdef PCNET_DEBUG_IO
  13.968 +    printf("pcnet_ioport_writel addr=0x%08x val=0x%08x\n", addr, val);
  13.969 +#endif
  13.970 +    if (BCR_DWIO(s)) {
  13.971 +        switch (addr & 0x0f) {
  13.972 +        case 0x00: /* RDP */
  13.973 +            pcnet_csr_writew(s, s->rap, val & 0xffff);
  13.974 +            break;
  13.975 +        case 0x04:
  13.976 +            s->rap = val & 0x7f;
  13.977 +            break;
  13.978 +        case 0x0c:
  13.979 +            pcnet_bcr_writew(s, s->rap, val & 0xffff);
  13.980 +            break;
  13.981 +        }
  13.982 +    } else
  13.983 +    if ((addr & 0x0f) == 0) {
  13.984 +        /* switch device to dword i/o mode */
  13.985 +        pcnet_bcr_writew(s, BCR_BSBC, pcnet_bcr_readw(s, BCR_BSBC) | 0x0080);
  13.986 +#ifdef PCNET_DEBUG_IO
  13.987 +        printf("device switched into dword i/o mode\n");
  13.988 +#endif        
  13.989 +    }
  13.990 +    pcnet_update_irq(s);
  13.991 +}
  13.992 +
  13.993 +static uint32_t pcnet_ioport_readl(void *opaque, uint32_t addr)
  13.994 +{
  13.995 +    PCNetState *s = opaque;
  13.996 +    uint32_t val = -1;
  13.997 +    pcnet_poll_timer(s);
  13.998 +    if (BCR_DWIO(s)) {  
  13.999 +        switch (addr & 0x0f) {
 13.1000 +        case 0x00: /* RDP */
 13.1001 +            val = pcnet_csr_readw(s, s->rap);
 13.1002 +            break;
 13.1003 +        case 0x04:
 13.1004 +            val = s->rap;
 13.1005 +            break;
 13.1006 +        case 0x08:
 13.1007 +            pcnet_s_reset(s);
 13.1008 +            val = 0;
 13.1009 +            break;
 13.1010 +        case 0x0c:
 13.1011 +            val = pcnet_bcr_readw(s, s->rap);
 13.1012 +            break;
 13.1013 +        }
 13.1014 +    }
 13.1015 +    pcnet_update_irq(s);
 13.1016 +#ifdef PCNET_DEBUG_IO
 13.1017 +    printf("pcnet_ioport_readl addr=0x%08x val=0x%08x\n", addr, val);
 13.1018 +#endif
 13.1019 +    return val;
 13.1020 +}
 13.1021 +
 13.1022 +static void pcnet_ioport_map(PCIDevice *pci_dev, int region_num, 
 13.1023 +                             uint32_t addr, uint32_t size, int type)
 13.1024 +{
 13.1025 +    PCNetState *d = (PCNetState *)pci_dev;
 13.1026 +
 13.1027 +#ifdef PCNET_DEBUG_IO
 13.1028 +    printf("pcnet_ioport_map addr=0x%04x size=0x%04x\n", addr, size);
 13.1029 +#endif
 13.1030 +
 13.1031 +    register_ioport_write(addr, 16, 1, pcnet_aprom_writeb, d);
 13.1032 +    register_ioport_read(addr, 16, 1, pcnet_aprom_readb, d);
 13.1033 +    
 13.1034 +    register_ioport_write(addr + 0x10, 0x10, 2, pcnet_ioport_writew, d);
 13.1035 +    register_ioport_read(addr + 0x10, 0x10, 2, pcnet_ioport_readw, d);
 13.1036 +    register_ioport_write(addr + 0x10, 0x10, 4, pcnet_ioport_writel, d);
 13.1037 +    register_ioport_read(addr + 0x10, 0x10, 4, pcnet_ioport_readl, d);
 13.1038 +}
 13.1039 +
 13.1040 +static void pcnet_mmio_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
 13.1041 +{
 13.1042 +    PCNetState *d = opaque;
 13.1043 +#ifdef PCNET_DEBUG_IO
 13.1044 +    printf("pcnet_mmio_writeb addr=0x%08x val=0x%02x\n", addr, val);
 13.1045 +#endif
 13.1046 +    if (!(addr & 0x10))
 13.1047 +        pcnet_aprom_writeb(d, addr & 0x0f, val);
 13.1048 +}
 13.1049 +
 13.1050 +static uint32_t pcnet_mmio_readb(void *opaque, target_phys_addr_t addr) 
 13.1051 +{
 13.1052 +    PCNetState *d = opaque;
 13.1053 +    uint32_t val = -1;
 13.1054 +    if (!(addr & 0x10))
 13.1055 +        val = pcnet_aprom_readb(d, addr & 0x0f);
 13.1056 +#ifdef PCNET_DEBUG_IO
 13.1057 +    printf("pcnet_mmio_readb addr=0x%08x val=0x%02x\n", addr, val & 0xff);
 13.1058 +#endif
 13.1059 +    return val;
 13.1060 +}
 13.1061 +
 13.1062 +static void pcnet_mmio_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
 13.1063 +{
 13.1064 +    PCNetState *d = opaque;
 13.1065 +#ifdef PCNET_DEBUG_IO
 13.1066 +    printf("pcnet_mmio_writew addr=0x%08x val=0x%04x\n", addr, val);
 13.1067 +#endif
 13.1068 +    if (addr & 0x10)
 13.1069 +        pcnet_ioport_writew(d, addr & 0x0f, val);
 13.1070 +    else {
 13.1071 +        addr &= 0x0f;
 13.1072 +        pcnet_aprom_writeb(d, addr, val & 0xff);
 13.1073 +        pcnet_aprom_writeb(d, addr+1, (val & 0xff00) >> 8);
 13.1074 +    }
 13.1075 +}
 13.1076 +
 13.1077 +static uint32_t pcnet_mmio_readw(void *opaque, target_phys_addr_t addr) 
 13.1078 +{
 13.1079 +    PCNetState *d = opaque;
 13.1080 +    uint32_t val = -1;
 13.1081 +    if (addr & 0x10)
 13.1082 +        val = pcnet_ioport_readw(d, addr & 0x0f);
 13.1083 +    else {
 13.1084 +        addr &= 0x0f;
 13.1085 +        val = pcnet_aprom_readb(d, addr+1);
 13.1086 +        val <<= 8;
 13.1087 +        val |= pcnet_aprom_readb(d, addr);
 13.1088 +    }
 13.1089 +#ifdef PCNET_DEBUG_IO
 13.1090 +    printf("pcnet_mmio_readw addr=0x%08x val = 0x%04x\n", addr, val & 0xffff);
 13.1091 +#endif
 13.1092 +    return val;
 13.1093 +}
 13.1094 +
 13.1095 +static void pcnet_mmio_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
 13.1096 +{
 13.1097 +    PCNetState *d = opaque;
 13.1098 +#ifdef PCNET_DEBUG_IO
 13.1099 +    printf("pcnet_mmio_writel addr=0x%08x val=0x%08x\n", addr, val);
 13.1100 +#endif
 13.1101 +    if (addr & 0x10)
 13.1102 +        pcnet_ioport_writel(d, addr & 0x0f, val);
 13.1103 +    else {
 13.1104 +        addr &= 0x0f;
 13.1105 +        pcnet_aprom_writeb(d, addr, val & 0xff);
 13.1106 +        pcnet_aprom_writeb(d, addr+1, (val & 0xff00) >> 8);
 13.1107 +        pcnet_aprom_writeb(d, addr+2, (val & 0xff0000) >> 16);
 13.1108 +        pcnet_aprom_writeb(d, addr+3, (val & 0xff000000) >> 24);
 13.1109 +    }
 13.1110 +}
 13.1111 +
 13.1112 +static uint32_t pcnet_mmio_readl(void *opaque, target_phys_addr_t addr) 
 13.1113 +{
 13.1114 +    PCNetState *d = opaque;
 13.1115 +    uint32_t val;
 13.1116 +    if (addr & 0x10)
 13.1117 +        val = pcnet_ioport_readl(d, addr & 0x0f);
 13.1118 +    else {
 13.1119 +        addr &= 0x0f;
 13.1120 +        val = pcnet_aprom_readb(d, addr+3);
 13.1121 +        val <<= 8;
 13.1122 +        val |= pcnet_aprom_readb(d, addr+2);
 13.1123 +        val <<= 8;
 13.1124 +        val |= pcnet_aprom_readb(d, addr+1);
 13.1125 +        val <<= 8;
 13.1126 +        val |= pcnet_aprom_readb(d, addr);
 13.1127 +    }
 13.1128 +#ifdef PCNET_DEBUG_IO
 13.1129 +    printf("pcnet_mmio_readl addr=0x%08x val=0x%08x\n", addr, val);
 13.1130 +#endif
 13.1131 +    return val;
 13.1132 +}
 13.1133 +
 13.1134 +
 13.1135 +static CPUWriteMemoryFunc *pcnet_mmio_write[] = {
 13.1136 +    (CPUWriteMemoryFunc *)&pcnet_mmio_writeb,
 13.1137 +    (CPUWriteMemoryFunc *)&pcnet_mmio_writew,
 13.1138 +    (CPUWriteMemoryFunc *)&pcnet_mmio_writel
 13.1139 +};
 13.1140 +
 13.1141 +static CPUReadMemoryFunc *pcnet_mmio_read[] = {
 13.1142 +    (CPUReadMemoryFunc *)&pcnet_mmio_readb,
 13.1143 +    (CPUReadMemoryFunc *)&pcnet_mmio_readw,
 13.1144 +    (CPUReadMemoryFunc *)&pcnet_mmio_readl
 13.1145 +};
 13.1146 +
 13.1147 +static void pcnet_mmio_map(PCIDevice *pci_dev, int region_num, 
 13.1148 +                            uint32_t addr, uint32_t size, int type)
 13.1149 +{
 13.1150 +    PCNetState *d = (PCNetState *)pci_dev;
 13.1151 +
 13.1152 +#ifdef PCNET_DEBUG_IO
 13.1153 +    printf("pcnet_ioport_map addr=0x%08x 0x%08x\n", addr, size);
 13.1154 +#endif
 13.1155 +
 13.1156 +    cpu_register_physical_memory(addr, PCNET_PNPMMIO_SIZE, d->mmio_io_addr);
 13.1157 +}
 13.1158 +
 13.1159 +void pci_pcnet_init(PCIBus *bus, NetDriverState *nd)
 13.1160 +{
 13.1161 +    PCNetState *d;
 13.1162 +    uint8_t *pci_conf;
 13.1163 +
 13.1164 +#if 0
 13.1165 +    printf("sizeof(RMD)=%d, sizeof(TMD)=%d\n", 
 13.1166 +        sizeof(struct pcnet_RMD), sizeof(struct pcnet_TMD));
 13.1167 +#endif
 13.1168 +
 13.1169 +    d = (PCNetState *)pci_register_device(bus, "PCNet", sizeof(PCNetState),
 13.1170 +                                          -1, NULL, NULL);
 13.1171 +                                          
 13.1172 +    pci_conf = d->dev.config;
 13.1173 +    
 13.1174 +    *(uint16_t *)&pci_conf[0x00] = cpu_to_le16(0x1022);
 13.1175 +    *(uint16_t *)&pci_conf[0x02] = cpu_to_le16(0x2000);    
 13.1176 +    *(uint16_t *)&pci_conf[0x04] = cpu_to_le16(0x0007); 
 13.1177 +    *(uint16_t *)&pci_conf[0x06] = cpu_to_le16(0x0280);
 13.1178 +    pci_conf[0x08] = 0x10;
 13.1179 +    pci_conf[0x09] = 0x00;
 13.1180 +    pci_conf[0x0a] = 0x00; // ethernet network controller 
 13.1181 +    pci_conf[0x0b] = 0x02;
 13.1182 +    pci_conf[0x0e] = 0x00; // header_type
 13.1183 +    
 13.1184 +    *(uint32_t *)&pci_conf[0x10] = cpu_to_le32(0x00000001);
 13.1185 +    *(uint32_t *)&pci_conf[0x14] = cpu_to_le32(0x00000000);
 13.1186 +    
 13.1187 +    pci_conf[0x3d] = 1; // interrupt pin 0
 13.1188 +    pci_conf[0x3e] = 0x06;
 13.1189 +    pci_conf[0x3f] = 0xff;
 13.1190 +
 13.1191 +    /* Handler for memory-mapped I/O */
 13.1192 +    d->mmio_io_addr =
 13.1193 +      cpu_register_io_memory(0, pcnet_mmio_read, pcnet_mmio_write, d);
 13.1194 +
 13.1195 +    pci_register_io_region((PCIDevice *)d, 0, PCNET_IOPORT_SIZE, 
 13.1196 +                           PCI_ADDRESS_SPACE_IO, pcnet_ioport_map);
 13.1197 +                           
 13.1198 +    pci_register_io_region((PCIDevice *)d, 1, PCNET_PNPMMIO_SIZE, 
 13.1199 +                           PCI_ADDRESS_SPACE_MEM, pcnet_mmio_map);
 13.1200 +                           
 13.1201 +    d->poll_timer = qemu_new_timer(vm_clock, pcnet_poll_timer, d);
 13.1202 +
 13.1203 +    d->nd = nd;
 13.1204 +
 13.1205 +    pcnet_h_reset(d);
 13.1206 +
 13.1207 +    qemu_add_read_packet(nd, pcnet_can_receive, pcnet_receive, d);
 13.1208 +}
    14.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    14.2 +++ b/tools/ioemu/hw/pcnet.h	Wed Aug 31 15:22:45 2005 -0800
    14.3 @@ -0,0 +1,583 @@
    14.4 +/*
    14.5 + * QEMU AMD PC-Net II (Am79C970A) emulation
    14.6 + * 
    14.7 + * Copyright (c) 2004 Antony T Curtis
    14.8 + * 
    14.9 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   14.10 + * of this software and associated documentation files (the "Software"), to deal
   14.11 + * in the Software without restriction, including without limitation the rights
   14.12 + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
   14.13 + * copies of the Software, and to permit persons to whom the Software is
   14.14 + * furnished to do so, subject to the following conditions:
   14.15 + *
   14.16 + * The above copyright notice and this permission notice shall be included in
   14.17 + * all copies or substantial portions of the Software.
   14.18 + *
   14.19 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   14.20 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   14.21 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
   14.22 + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   14.23 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
   14.24 + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
   14.25 + * THE SOFTWARE.
   14.26 + */
   14.27 +
   14.28 +/* This software was written to be compatible with the specification:
   14.29 + * AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet
   14.30 + * AMD Publication# 19436  Rev:E  Amendment/0  Issue Date: June 2000
   14.31 + */
   14.32 +
   14.33 +#ifdef __GNUC__
   14.34 +#define PACKED(A) A __attribute__ ((packed))
   14.35 +#else
   14.36 +#error FixMe
   14.37 +#endif
   14.38 +
   14.39 +/* BUS CONFIGURATION REGISTERS */
   14.40 +#define BCR_MSRDA    0
   14.41 +#define BCR_MSWRA    1
   14.42 +#define BCR_MC       2
   14.43 +#define BCR_LNKST    4
   14.44 +#define BCR_LED1     5
   14.45 +#define BCR_LED2     6
   14.46 +#define BCR_LED3     7
   14.47 +#define BCR_FDC      9
   14.48 +#define BCR_BSBC     18
   14.49 +#define BCR_EECAS    19
   14.50 +#define BCR_SWS      20
   14.51 +#define BCR_PLAT     22
   14.52 +
   14.53 +#define BCR_DWIO(S)      !!((S)->bcr[BCR_BSBC] & 0x0080)
   14.54 +#define BCR_SSIZE32(S)   !!((S)->bcr[BCR_SWS ] & 0x0100)
   14.55 +#define BCR_SWSTYLE(S)     ((S)->bcr[BCR_SWS ] & 0x00FF)
   14.56 +
   14.57 +#define CSR_INIT(S)      !!(((S)->csr[0])&0x0001)
   14.58 +#define CSR_STRT(S)      !!(((S)->csr[0])&0x0002)
   14.59 +#define CSR_STOP(S)      !!(((S)->csr[0])&0x0004)
   14.60 +#define CSR_TDMD(S)      !!(((S)->csr[0])&0x0008)
   14.61 +#define CSR_TXON(S)      !!(((S)->csr[0])&0x0010)
   14.62 +#define CSR_RXON(S)      !!(((S)->csr[0])&0x0020)
   14.63 +#define CSR_INEA(S)      !!(((S)->csr[0])&0x0040)
   14.64 +#define CSR_LAPPEN(S)    !!(((S)->csr[3])&0x0020)
   14.65 +#define CSR_DXSUFLO(S)   !!(((S)->csr[3])&0x0040)
   14.66 +#define CSR_ASTRP_RCV(S) !!(((S)->csr[4])&0x0800)
   14.67 +#define CSR_DPOLL(S)     !!(((S)->csr[4])&0x1000)
   14.68 +#define CSR_SPND(S)      !!(((S)->csr[5])&0x0001)
   14.69 +#define CSR_LTINTEN(S)   !!(((S)->csr[5])&0x4000)
   14.70 +#define CSR_TOKINTD(S)   !!(((S)->csr[5])&0x8000)
   14.71 +#define CSR_DRX(S)       !!(((S)->csr[15])&0x0001)
   14.72 +#define CSR_DTX(S)       !!(((S)->csr[15])&0x0002)
   14.73 +#define CSR_LOOP(S)      !!(((S)->csr[15])&0x0004)
   14.74 +#define CSR_DRCVPA(S)    !!(((S)->csr[15])&0x2000)
   14.75 +#define CSR_DRCVBC(S)    !!(((S)->csr[15])&0x4000)
   14.76 +#define CSR_PROM(S)      !!(((S)->csr[15])&0x8000)
   14.77 +
   14.78 +#define CSR_CRBC(S)      ((S)->csr[40])
   14.79 +#define CSR_CRST(S)      ((S)->csr[41])
   14.80 +#define CSR_CXBC(S)      ((S)->csr[42])
   14.81 +#define CSR_CXST(S)      ((S)->csr[43])
   14.82 +#define CSR_NRBC(S)      ((S)->csr[44])
   14.83 +#define CSR_NRST(S)      ((S)->csr[45])
   14.84 +#define CSR_POLL(S)      ((S)->csr[46])
   14.85 +#define CSR_PINT(S)      ((S)->csr[47])
   14.86 +#define CSR_RCVRC(S)     ((S)->csr[72])
   14.87 +#define CSR_XMTRC(S)     ((S)->csr[74])
   14.88 +#define CSR_RCVRL(S)     ((S)->csr[76])
   14.89 +#define CSR_XMTRL(S)     ((S)->csr[78])
   14.90 +#define CSR_MISSC(S)     ((S)->csr[112])
   14.91 +
   14.92 +#define CSR_IADR(S)      ((S)->csr[ 1] | ((S)->csr[ 2] << 16))
   14.93 +#define CSR_CRBA(S)      ((S)->csr[18] | ((S)->csr[19] << 16))
   14.94 +#define CSR_CXBA(S)      ((S)->csr[20] | ((S)->csr[21] << 16))
   14.95 +#define CSR_NRBA(S)      ((S)->csr[22] | ((S)->csr[23] << 16))
   14.96 +#define CSR_BADR(S)      ((S)->csr[24] | ((S)->csr[25] << 16))
   14.97 +#define CSR_NRDA(S)      ((S)->csr[26] | ((S)->csr[27] << 16))
   14.98 +#define CSR_CRDA(S)      ((S)->csr[28] | ((S)->csr[29] << 16))
   14.99 +#define CSR_BADX(S)      ((S)->csr[30] | ((S)->csr[31] << 16))
  14.100 +#define CSR_NXDA(S)      ((S)->csr[32] | ((S)->csr[33] << 16))
  14.101 +#define CSR_CXDA(S)      ((S)->csr[34] | ((S)->csr[35] << 16))
  14.102 +#define CSR_NNRD(S)      ((S)->csr[36] | ((S)->csr[37] << 16))
  14.103 +#define CSR_NNXD(S)      ((S)->csr[38] | ((S)->csr[39] << 16))
  14.104 +#define CSR_PXDA(S)      ((S)->csr[60] | ((S)->csr[61] << 16))
  14.105 +#define CSR_NXBA(S)      ((S)->csr[64] | ((S)->csr[65] << 16))
  14.106 +
  14.107 +#define PHYSADDR(S,A) \
  14.108 +  (BCR_SSIZE32(S) ? (A) : (A) | ((0xff00 & (uint32_t)(s)->csr[2])<<16))
  14.109 +
  14.110 +struct pcnet_initblk16 {
  14.111 +    uint16_t mode;
  14.112 +    uint16_t padr1;
  14.113 +    uint16_t padr2;
  14.114 +    uint16_t padr3;
  14.115 +    uint16_t ladrf1;
  14.116 +    uint16_t ladrf2;
  14.117 +    uint16_t ladrf3;
  14.118 +    uint16_t ladrf4;
  14.119 +    unsigned PACKED(rdra:24);
  14.120 +    unsigned PACKED(res1:5);
  14.121 +    unsigned PACKED(rlen:3);
  14.122 +    unsigned PACKED(tdra:24);
  14.123 +    unsigned PACKED(res2:5);
  14.124 +    unsigned PACKED(tlen:3);
  14.125 +};
  14.126 +
  14.127 +struct pcnet_initblk32 {
  14.128 +    uint16_t mode;
  14.129 +    unsigned PACKED(res1:4);
  14.130 +    unsigned PACKED(rlen:4);
  14.131 +    unsigned PACKED(res2:4);
  14.132 +    unsigned PACKED(tlen:4);
  14.133 +    uint16_t padr1;
  14.134 +    uint16_t padr2;
  14.135 +    uint16_t padr3;
  14.136 +    uint16_t _res;
  14.137 +    uint16_t ladrf1;
  14.138 +    uint16_t ladrf2;
  14.139 +    uint16_t ladrf3;
  14.140 +    uint16_t ladrf4;
  14.141 +    uint32_t rdra;
  14.142 +    uint32_t tdra;
  14.143 +};
  14.144 +
  14.145 +struct pcnet_TMD {
  14.146 +    struct {
  14.147 +        unsigned tbadr:32;
  14.148 +    } tmd0;
  14.149 +    struct {
  14.150 +        unsigned PACKED(bcnt:12), PACKED(ones:4), PACKED(res:7), PACKED(bpe:1);
  14.151 +        unsigned PACKED(enp:1), PACKED(stp:1), PACKED(def:1), PACKED(one:1);
  14.152 +        unsigned PACKED(ltint:1), PACKED(nofcs:1), PACKED(err:1), PACKED(own:1);
  14.153 +    } tmd1;
  14.154 +    struct {
  14.155 +        unsigned PACKED(trc:4), PACKED(res:12);
  14.156 +        unsigned PACKED(tdr:10), PACKED(rtry:1), PACKED(lcar:1);
  14.157 +        unsigned PACKED(lcol:1), PACKED(exdef:1), PACKED(uflo:1), PACKED(buff:1);
  14.158 +    } tmd2;
  14.159 +    struct {
  14.160 +        unsigned res:32;
  14.161 +    } tmd3;    
  14.162 +};
  14.163 +
  14.164 +struct pcnet_RMD {
  14.165 +    struct {
  14.166 +        unsigned rbadr:32;
  14.167 +    } rmd0;
  14.168 +    struct {
  14.169 +        unsigned PACKED(bcnt:12), PACKED(ones:4), PACKED(res:4);
  14.170 +        unsigned PACKED(bam:1), PACKED(lafm:1), PACKED(pam:1), PACKED(bpe:1);
  14.171 +        unsigned PACKED(enp:1), PACKED(stp:1), PACKED(buff:1), PACKED(crc:1);
  14.172 +        unsigned PACKED(oflo:1), PACKED(fram:1), PACKED(err:1), PACKED(own:1);
  14.173 +    } rmd1;
  14.174 +    struct {
  14.175 +        unsigned PACKED(mcnt:12), PACKED(zeros:4);
  14.176 +        unsigned PACKED(rpc:8), PACKED(rcc:8);
  14.177 +    } rmd2;    
  14.178 +    struct {
  14.179 +        unsigned res:32;
  14.180 +    } rmd3;    
  14.181 +};
  14.182 +
  14.183 +
  14.184 +#define PRINT_TMD(T) printf(    \
  14.185 +        "TMD0 : TBADR=0x%08x\n" \
  14.186 +        "TMD1 : OWN=%d, ERR=%d, FCS=%d, LTI=%d, "       \
  14.187 +        "ONE=%d, DEF=%d, STP=%d, ENP=%d,\n"             \
  14.188 +        "       BPE=%d, BCNT=%d\n"                      \
  14.189 +        "TMD2 : BUF=%d, UFL=%d, EXD=%d, LCO=%d, "       \
  14.190 +        "LCA=%d, RTR=%d,\n"                             \
  14.191 +        "       TDR=%d, TRC=%d\n",                      \
  14.192 +        (T)->tmd0.tbadr,                                \
  14.193 +        (T)->tmd1.own, (T)->tmd1.err, (T)->tmd1.nofcs,  \
  14.194 +        (T)->tmd1.ltint, (T)->tmd1.one, (T)->tmd1.def,  \
  14.195 +        (T)->tmd1.stp, (T)->tmd1.enp, (T)->tmd1.bpe,    \
  14.196 +        4096-(T)->tmd1.bcnt,                            \
  14.197 +        (T)->tmd2.buff, (T)->tmd2.uflo, (T)->tmd2.exdef,\
  14.198 +        (T)->tmd2.lcol, (T)->tmd2.lcar, (T)->tmd2.rtry, \
  14.199 +        (T)->tmd2.tdr, (T)->tmd2.trc)
  14.200 +
  14.201 +#define PRINT_RMD(R) printf(    \
  14.202 +        "RMD0 : RBADR=0x%08x\n" \
  14.203 +        "RMD1 : OWN=%d, ERR=%d, FRAM=%d, OFLO=%d, "     \
  14.204 +        "CRC=%d, BUFF=%d, STP=%d, ENP=%d,\n       "     \
  14.205 +        "BPE=%d, PAM=%d, LAFM=%d, BAM=%d, ONES=%d, BCNT=%d\n"    \
  14.206 +        "RMD2 : RCC=%d, RPC=%d, MCNT=%d, ZEROS=%d\n",   \
  14.207 +        (R)->rmd0.rbadr,                                \
  14.208 +        (R)->rmd1.own, (R)->rmd1.err, (R)->rmd1.fram,   \
  14.209 +        (R)->rmd1.oflo, (R)->rmd1.crc, (R)->rmd1.buff,  \
  14.210 +        (R)->rmd1.stp, (R)->rmd1.enp, (R)->rmd1.bpe,    \
  14.211 +        (R)->rmd1.pam, (R)->rmd1.lafm, (R)->rmd1.bam,   \
  14.212 +        (R)->rmd1.ones, 4096-(R)->rmd1.bcnt,            \
  14.213 +        (R)->rmd2.rcc, (R)->rmd2.rpc, (R)->rmd2.mcnt,   \
  14.214 +        (R)->rmd2.zeros)
  14.215 +
  14.216 +static inline void pcnet_tmd_load(PCNetState *s, struct pcnet_TMD *tmd, target_phys_addr_t addr)
  14.217 +{
  14.218 +    if (!BCR_SWSTYLE(s)) {
  14.219 +        uint16_t xda[4];
  14.220 +        cpu_physical_memory_read(addr,
  14.221 +                (void *)&xda[0], sizeof(xda));
  14.222 +        ((uint32_t *)tmd)[0] = (xda[0]&0xffff) |
  14.223 +                ((xda[1]&0x00ff) << 16);
  14.224 +        ((uint32_t *)tmd)[1] = (xda[2]&0xffff)|
  14.225 +                ((xda[1] & 0xff00) << 16);
  14.226 +        ((uint32_t *)tmd)[2] =
  14.227 +                (xda[3] & 0xffff) << 16;
  14.228 +        ((uint32_t *)tmd)[3] = 0;
  14.229 +    }
  14.230 +    else
  14.231 +    if (BCR_SWSTYLE(s) != 3)
  14.232 +        cpu_physical_memory_read(addr, (void *)tmd, 16);
  14.233 +    else {
  14.234 +        uint32_t xda[4];
  14.235 +        cpu_physical_memory_read(addr,
  14.236 +                (void *)&xda[0], sizeof(xda));
  14.237 +        ((uint32_t *)tmd)[0] = xda[2];
  14.238 +        ((uint32_t *)tmd)[1] = xda[1];
  14.239 +        ((uint32_t *)tmd)[2] = xda[0];
  14.240 +        ((uint32_t *)tmd)[3] = xda[3];
  14.241 +    }
  14.242 +}
  14.243 +
  14.244 +static inline void pcnet_tmd_store(PCNetState *s, struct pcnet_TMD *tmd, target_phys_addr_t addr)
  14.245 +{
  14.246 +    cpu_physical_memory_set_dirty(addr);
  14.247 +    if (!BCR_SWSTYLE(s)) {
  14.248 +        uint16_t xda[4];
  14.249 +        xda[0] = ((uint32_t *)tmd)[0] & 0xffff;
  14.250 +        xda[1] = ((((uint32_t *)tmd)[0]>>16)&0x00ff) |
  14.251 +            ((((uint32_t *)tmd)[1]>>16)&0xff00);
  14.252 +        xda[2] = ((uint32_t *)tmd)[1] & 0xffff;
  14.253 +        xda[3] = ((uint32_t *)tmd)[2] >> 16;
  14.254 +        cpu_physical_memory_write(addr,
  14.255 +                (void *)&xda[0], sizeof(xda));
  14.256 +        cpu_physical_memory_set_dirty(addr+7);
  14.257 +    }
  14.258 +    else {
  14.259 +        if (BCR_SWSTYLE(s) != 3)
  14.260 +            cpu_physical_memory_write(addr, (void *)tmd, 16);
  14.261 +        else {
  14.262 +            uint32_t xda[4];
  14.263 +            xda[0] = ((uint32_t *)tmd)[2];
  14.264 +            xda[1] = ((uint32_t *)tmd)[1];
  14.265 +            xda[2] = ((uint32_t *)tmd)[0];
  14.266 +            xda[3] = ((uint32_t *)tmd)[3];
  14.267 +            cpu_physical_memory_write(addr,
  14.268 +                    (void *)&xda[0], sizeof(xda));
  14.269 +        }
  14.270 +        cpu_physical_memory_set_dirty(addr+15);
  14.271 +    }
  14.272 +}
  14.273 +
  14.274 +static inline void pcnet_rmd_load(PCNetState *s, struct pcnet_RMD *rmd, target_phys_addr_t addr)
  14.275 +{
  14.276 +    if (!BCR_SWSTYLE(s)) {
  14.277 +        uint16_t rda[4];
  14.278 +        cpu_physical_memory_read(addr,
  14.279 +                (void *)&rda[0], sizeof(rda));
  14.280 +        ((uint32_t *)rmd)[0] = (rda[0]&0xffff)|
  14.281 +                ((rda[1] & 0x00ff) << 16);
  14.282 +        ((uint32_t *)rmd)[1] = (rda[2]&0xffff)|
  14.283 +                ((rda[1] & 0xff00) << 16);
  14.284 +        ((uint32_t *)rmd)[2] = rda[3] & 0xffff;
  14.285 +        ((uint32_t *)rmd)[3] = 0;
  14.286 +    }
  14.287 +    else
  14.288 +    if (BCR_SWSTYLE(s) != 3)
  14.289 +        cpu_physical_memory_read(addr, (void *)rmd, 16);
  14.290 +    else {
  14.291 +        uint32_t rda[4];
  14.292 +        cpu_physical_memory_read(addr,
  14.293 +                (void *)&rda[0], sizeof(rda));
  14.294 +        ((uint32_t *)rmd)[0] = rda[2];
  14.295 +        ((uint32_t *)rmd)[1] = rda[1];
  14.296 +        ((uint32_t *)rmd)[2] = rda[0];
  14.297 +        ((uint32_t *)rmd)[3] = rda[3];
  14.298 +    }
  14.299 +}
  14.300 +
  14.301 +static inline void pcnet_rmd_store(PCNetState *s, struct pcnet_RMD *rmd, target_phys_addr_t addr)
  14.302 +{
  14.303 +    cpu_physical_memory_set_dirty(addr);
  14.304 +    if (!BCR_SWSTYLE(s)) {
  14.305 +        uint16_t rda[4];                        \
  14.306 +        rda[0] = ((uint32_t *)rmd)[0] & 0xffff; \
  14.307 +        rda[1] = ((((uint32_t *)rmd)[0]>>16)&0xff)|\
  14.308 +            ((((uint32_t *)rmd)[1]>>16)&0xff00);\
  14.309 +        rda[2] = ((uint32_t *)rmd)[1] & 0xffff; \
  14.310 +        rda[3] = ((uint32_t *)rmd)[2] & 0xffff; \
  14.311 +        cpu_physical_memory_write(addr,         \
  14.312 +                (void *)&rda[0], sizeof(rda));  \
  14.313 +        cpu_physical_memory_set_dirty(addr+7);
  14.314 +    }
  14.315 +    else {
  14.316 +        if (BCR_SWSTYLE(s) != 3)
  14.317 +            cpu_physical_memory_write(addr, (void *)rmd, 16);
  14.318 +        else {
  14.319 +            uint32_t rda[4];
  14.320 +            rda[0] = ((uint32_t *)rmd)[2];
  14.321 +            rda[1] = ((uint32_t *)rmd)[1];
  14.322 +            rda[2] = ((uint32_t *)rmd)[0];
  14.323 +            rda[3] = ((uint32_t *)rmd)[3];
  14.324 +            cpu_physical_memory_write(addr,
  14.325 +                    (void *)&rda[0], sizeof(rda));
  14.326 +        }
  14.327 +        cpu_physical_memory_set_dirty(addr+15);
  14.328 +    }
  14.329 +}
  14.330 +
  14.331 +
  14.332 +#define TMDLOAD(TMD,ADDR) pcnet_tmd_load(s,TMD,ADDR)
  14.333 +
  14.334 +#define TMDSTORE(TMD,ADDR) pcnet_tmd_store(s,TMD,ADDR)
  14.335 +
  14.336 +#define RMDLOAD(RMD,ADDR) pcnet_rmd_load(s,RMD,ADDR)
  14.337 +
  14.338 +#define RMDSTORE(RMD,ADDR) pcnet_rmd_store(s,RMD,ADDR)
  14.339 +
  14.340 +#if 1
  14.341 +
  14.342 +#define CHECK_RMD(ADDR,RES) do {                \
  14.343 +    struct pcnet_RMD rmd;                       \
  14.344 +    RMDLOAD(&rmd,(ADDR));                       \
  14.345 +    (RES) |= (rmd.rmd1.ones != 15)              \
  14.346 +          || (rmd.rmd2.zeros != 0);             \
  14.347 +} while (0)
  14.348 +
  14.349 +#define CHECK_TMD(ADDR,RES) do {                \
  14.350 +    struct pcnet_TMD tmd;                       \
  14.351 +    TMDLOAD(&tmd,(ADDR));                       \
  14.352 +    (RES) |= (tmd.tmd1.ones != 15);             \
  14.353 +} while (0)
  14.354 +
  14.355 +#else
  14.356 +
  14.357 +#define CHECK_RMD(ADDR,RES) do {                \
  14.358 +    switch (BCR_SWSTYLE(s)) {                   \
  14.359 +    case 0x00:                                  \
  14.360 +        do {                                    \
  14.361 +            uint16_t rda[4];                    \
  14.362 +            cpu_physical_memory_read((ADDR),    \
  14.363 +                (void *)&rda[0], sizeof(rda));  \
  14.364 +            (RES) |= (rda[2] & 0xf000)!=0xf000; \
  14.365 +            (RES) |= (rda[3] & 0xf000)!=0x0000; \
  14.366 +        } while (0);                            \
  14.367 +        break;                                  \
  14.368 +    case 0x01:                                  \
  14.369 +    case 0x02:                                  \
  14.370 +        do {                                    \
  14.371 +            uint32_t rda[4];                    \
  14.372 +            cpu_physical_memory_read((ADDR),    \
  14.373 +                (void *)&rda[0], sizeof(rda)); \
  14.374 +            (RES) |= (rda[1] & 0x0000f000L)!=0x0000f000L; \
  14.375 +            (RES) |= (rda[2] & 0x0000f000L)!=0x00000000L; \
  14.376 +        } while (0);                            \
  14.377 +        break;                                  \
  14.378 +    case 0x03:                                  \
  14.379 +        do {                                    \
  14.380 +            uint32_t rda[4];                    \
  14.381 +            cpu_physical_memory_read((ADDR),    \
  14.382 +                (void *)&rda[0], sizeof(rda)); \
  14.383 +            (RES) |= (rda[0] & 0x0000f000L)!=0x00000000L; \
  14.384 +            (RES) |= (rda[1] & 0x0000f000L)!=0x0000f000L; \
  14.385 +        } while (0);                            \
  14.386 +        break;                                  \
  14.387 +    }                                           \
  14.388 +} while (0)
  14.389 +
  14.390 +#define CHECK_TMD(ADDR,RES) do {                \
  14.391 +    switch (BCR_SWSTYLE(s)) {                   \
  14.392 +    case 0x00:                                  \
  14.393 +        do {                                    \
  14.394 +            uint16_t xda[4];                    \
  14.395 +            cpu_physical_memory_read((ADDR),    \
  14.396 +                (void *)&xda[0], sizeof(xda));  \
  14.397 +            (RES) |= (xda[2] & 0xf000)!=0xf000;\
  14.398 +        } while (0);                            \
  14.399 +        break;                                  \
  14.400 +    case 0x01:                                  \
  14.401 +    case 0x02:                                  \
  14.402 +    case 0x03:                                  \
  14.403 +        do {                                    \
  14.404 +            uint32_t xda[4];                    \
  14.405 +            cpu_physical_memory_read((ADDR),    \
  14.406 +                (void *)&xda[0], sizeof(xda));  \
  14.407 +            (RES) |= (xda[1] & 0x0000f000L)!=0x0000f000L; \
  14.408 +        } while (0);                            \
  14.409 +        break;                                  \
  14.410 +    }                                           \
  14.411 +} while (0)
  14.412 +
  14.413 +#endif
  14.414 +
  14.415 +#define PRINT_PKTHDR(BUF) do {                  \
  14.416 +    struct ether_header *hdr = (void *)(BUF);   \
  14.417 +    printf("packet dhost=%02x:%02x:%02x:%02x:%02x:%02x, "       \
  14.418 +           "shost=%02x:%02x:%02x:%02x:%02x:%02x, "              \
  14.419 +           "type=0x%04x (bcast=%d)\n",                          \
  14.420 +           hdr->ether_dhost[0],hdr->ether_dhost[1],hdr->ether_dhost[2], \
  14.421 +           hdr->ether_dhost[3],hdr->ether_dhost[4],hdr->ether_dhost[5], \
  14.422 +           hdr->ether_shost[0],hdr->ether_shost[1],hdr->ether_shost[2], \
  14.423 +           hdr->ether_shost[3],hdr->ether_shost[4],hdr->ether_shost[5], \
  14.424 +           htons(hdr->ether_type),                                      \
  14.425 +           !!ETHER_IS_MULTICAST(hdr->ether_dhost));                     \
  14.426 +} while (0)
  14.427 +
  14.428 +#define MULTICAST_FILTER_LEN 8
  14.429 +
  14.430 +static inline uint32_t lnc_mchash(const uint8_t *ether_addr)
  14.431 +{
  14.432 +#define LNC_POLYNOMIAL          0xEDB88320UL
  14.433 +    uint32_t crc = 0xFFFFFFFF;
  14.434 +    int idx, bit;
  14.435 +    uint8_t data;
  14.436 +
  14.437 +    for (idx = 0; idx < ETHER_ADDR_LEN; idx++) {
  14.438 +        for (data = *ether_addr++, bit = 0; bit < MULTICAST_FILTER_LEN; bit++) {
  14.439 +            crc = (crc >> 1) ^ (((crc ^ data) & 1) ? LNC_POLYNOMIAL : 0);
  14.440 +            data >>= 1;
  14.441 +        }
  14.442 +    }
  14.443 +    return crc;
  14.444 +#undef LNC_POLYNOMIAL
  14.445 +}
  14.446 +
  14.447 +#define MIN(X,Y) ((X>Y) ? (Y) : (X))
  14.448 +
  14.449 +#define CRC(crc, ch)	 (crc = (crc >> 8) ^ crctab[(crc ^ (ch)) & 0xff])
  14.450 +
  14.451 +/* generated using the AUTODIN II polynomial
  14.452 + *	x^32 + x^26 + x^23 + x^22 + x^16 +
  14.453 + *	x^12 + x^11 + x^10 + x^8 + x^7 + x^5 + x^4 + x^2 + x^1 + 1
  14.454 + */
  14.455 +static const uint32_t crctab[256] = {
  14.456 +	0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
  14.457 +	0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
  14.458 +	0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
  14.459 +	0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
  14.460 +	0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
  14.461 +	0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
  14.462 +	0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
  14.463 +	0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
  14.464 +	0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
  14.465 +	0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
  14.466 +	0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
  14.467 +	0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
  14.468 +	0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
  14.469 +	0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
  14.470 +	0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
  14.471 +	0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
  14.472 +	0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
  14.473 +	0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
  14.474 +	0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
  14.475 +	0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
  14.476 +	0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
  14.477 +	0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
  14.478 +	0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,
  14.479 +	0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
  14.480 +	0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,
  14.481 +	0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
  14.482 +	0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
  14.483 +	0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
  14.484 +	0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,
  14.485 +	0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
  14.486 +	0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,
  14.487 +	0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
  14.488 +	0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
  14.489 +	0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
  14.490 +	0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,
  14.491 +	0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
  14.492 +	0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,
  14.493 +	0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
  14.494 +	0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
  14.495 +	0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
  14.496 +	0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,
  14.497 +	0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
  14.498 +	0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,
  14.499 +	0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
  14.500 +	0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
  14.501 +	0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
  14.502 +	0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,
  14.503 +	0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
  14.504 +	0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,
  14.505 +	0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
  14.506 +	0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
  14.507 +	0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
  14.508 +	0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,
  14.509 +	0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
  14.510 +	0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
  14.511 +	0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
  14.512 +	0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
  14.513 +	0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
  14.514 +	0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,
  14.515 +	0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
  14.516 +	0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,
  14.517 +	0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
  14.518 +	0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
  14.519 +	0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
  14.520 +};
  14.521 +
  14.522 +static inline int padr_match(PCNetState *s, const uint8_t *buf, int size)
  14.523 +{
  14.524 +    struct ether_header *hdr = (void *)buf;
  14.525 +    uint8_t padr[6] = { 
  14.526 +        s->csr[12] & 0xff, s->csr[12] >> 8,
  14.527 +        s->csr[13] & 0xff, s->csr[13] >> 8,
  14.528 +        s->csr[14] & 0xff, s->csr[14] >> 8 
  14.529 +    };
  14.530 +    int result = (!CSR_DRCVPA(s)) && !bcmp(hdr->ether_dhost, padr, 6);
  14.531 +#ifdef PCNET_DEBUG_MATCH
  14.532 +    printf("packet dhost=%02x:%02x:%02x:%02x:%02x:%02x, "
  14.533 +           "padr=%02x:%02x:%02x:%02x:%02x:%02x\n",
  14.534 +           hdr->ether_dhost[0],hdr->ether_dhost[1],hdr->ether_dhost[2],
  14.535 +           hdr->ether_dhost[3],hdr->ether_dhost[4],hdr->ether_dhost[5],
  14.536 +           padr[0],padr[1],padr[2],padr[3],padr[4],padr[5]);
  14.537 +    printf("padr_match result=%d\n", result);
  14.538 +#endif
  14.539 +    return result;
  14.540 +}
  14.541 +
  14.542 +static inline int padr_bcast(PCNetState *s, const uint8_t *buf, int size)
  14.543 +{
  14.544 +    static uint8_t BCAST[6] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
  14.545 +    struct ether_header *hdr = (void *)buf;
  14.546 +    int result = !CSR_DRCVBC(s) && !bcmp(hdr->ether_dhost, BCAST, 6);
  14.547 +#ifdef PCNET_DEBUG_MATCH
  14.548 +    printf("padr_bcast result=%d\n", result);
  14.549 +#endif
  14.550 +    return result;
  14.551 +}
  14.552 +
  14.553 +static inline int ladr_match(PCNetState *s, const uint8_t *buf, int size)
  14.554 +{
  14.555 +    struct ether_header *hdr = (void *)buf;
  14.556 +    if ((*(hdr->ether_dhost)&0x01) && 
  14.557 +        ((uint64_t *)&s->csr[8])[0] != 0LL) {
  14.558 +        uint8_t ladr[8] = { 
  14.559 +            s->csr[8] & 0xff, s->csr[8] >> 8,
  14.560 +            s->csr[9] & 0xff, s->csr[9] >> 8,
  14.561 +            s->csr[10] & 0xff, s->csr[10] >> 8, 
  14.562 +            s->csr[11] & 0xff, s->csr[11] >> 8 
  14.563 +        };
  14.564 +        int index = lnc_mchash(hdr->ether_dhost) >> 26;
  14.565 +        return !!(ladr[index >> 3] & (1 << (index & 7)));
  14.566 +    }
  14.567 +    return 0;
  14.568 +}
  14.569 +
  14.570 +static inline target_phys_addr_t pcnet_rdra_addr(PCNetState *s, int idx) 
  14.571 +{
  14.572 +    while (idx < 1) idx += CSR_RCVRL(s);
  14.573 +    return s->rdra + ((CSR_RCVRL(s) - idx) * (BCR_SWSTYLE(s) ? 16 : 8));
  14.574 +}
  14.575 +
  14.576 +static inline int64_t pcnet_get_next_poll_time(PCNetState *s, int64_t current_time)
  14.577 +{
  14.578 +    int64_t next_time = current_time + 
  14.579 +        muldiv64(65536 - (CSR_SPND(s) ? 0 : CSR_POLL(s)), 
  14.580 +                 ticks_per_sec, 33000000L);
  14.581 +    if (next_time <= current_time)
  14.582 +        next_time = current_time + 1;
  14.583 +    return next_time;
  14.584 +}
  14.585 +
  14.586 +
    15.1 --- a/tools/ioemu/hw/vga.c	Wed Aug 31 14:37:21 2005 -0800
    15.2 +++ b/tools/ioemu/hw/vga.c	Wed Aug 31 15:22:45 2005 -0800
    15.3 @@ -1620,7 +1620,6 @@ static CPUWriteMemoryFunc *vga_mem_write
    15.4  static void vga_save(QEMUFile *f, void *opaque)
    15.5  {
    15.6      VGAState *s = opaque;
    15.7 -    int i;
    15.8  
    15.9      qemu_put_be32s(f, &s->latch);
   15.10      qemu_put_8s(f, &s->sr_index);
   15.11 @@ -1661,7 +1660,7 @@ static void vga_save(QEMUFile *f, void *
   15.12  static int vga_load(QEMUFile *f, void *opaque, int version_id)
   15.13  {
   15.14      VGAState *s = opaque;
   15.15 -    int is_vbe, i;
   15.16 +    int is_vbe;
   15.17  
   15.18      if (version_id != 1)
   15.19          return -EINVAL;
    16.1 --- a/tools/ioemu/target-i386-dm/Makefile	Wed Aug 31 14:37:21 2005 -0800
    16.2 +++ b/tools/ioemu/target-i386-dm/Makefile	Wed Aug 31 15:22:45 2005 -0800
    16.3 @@ -272,7 +272,7 @@ endif
    16.4  # Hardware support
    16.5  VL_OBJS+= ide.o ne2000.o pckbd.o vga.o dma.o
    16.6  VL_OBJS+= fdc.o mc146818rtc.o serial.o i8259.o i8254.o pc.o port-e9.o
    16.7 -VL_OBJS+= cirrus_vga.o
    16.8 +VL_OBJS+= cirrus_vga.o pcnet.o
    16.9  
   16.10  ifeq ($(TARGET_ARCH), ppc)
   16.11  VL_OBJS+= ppc.o ide.o ne2000.o pckbd.o vga.o $(SOUND_HW) dma.o $(AUDIODRV)
    17.1 --- a/tools/ioemu/vl.c	Wed Aug 31 14:37:21 2005 -0800
    17.2 +++ b/tools/ioemu/vl.c	Wed Aug 31 15:22:45 2005 -0800
    17.3 @@ -125,6 +125,7 @@ QEMUTimer *gui_timer;
    17.4  QEMUTimer *polling_timer;
    17.5  int vm_running;
    17.6  int audio_enabled = 0;
    17.7 +int nic_pcnet = 1;
    17.8  int sb16_enabled = 1;
    17.9  int adlib_enabled = 1;
   17.10  int gus_enabled = 1;
   17.11 @@ -2115,6 +2116,7 @@ void help(void)
   17.12             "-prep           Simulate a PREP system (default is PowerMAC)\n"
   17.13             "-g WxH[xDEPTH]  Set the initial VGA graphic mode\n"
   17.14  #endif
   17.15 +           "-nic-pcnet     simulate an AMD PC-Net PCI ethernet adaptor\n"
   17.16             "\n"
   17.17             "Network options:\n"
   17.18             "-nics n         simulate 'n' network cards [default=1]\n"
   17.19 @@ -2229,6 +2231,7 @@ enum {
   17.20      QEMU_OPTION_L,
   17.21      QEMU_OPTION_no_code_copy,
   17.22      QEMU_OPTION_pci,
   17.23 +    QEMU_OPTION_nic_pcnet,
   17.24      QEMU_OPTION_isa,
   17.25      QEMU_OPTION_prep,
   17.26      QEMU_OPTION_k,
   17.27 @@ -2313,6 +2316,7 @@ const QEMUOption qemu_options[] = {
   17.28      
   17.29      /* temporary options */
   17.30      { "pci", 0, QEMU_OPTION_pci },
   17.31 +    { "nic-pcnet", 0, QEMU_OPTION_nic_pcnet },
   17.32      { "cirrusvga", 0, QEMU_OPTION_cirrusvga },
   17.33      { NULL },
   17.34  };
   17.35 @@ -2640,6 +2644,9 @@ int main(int argc, char **argv)
   17.36              case QEMU_OPTION_pci:
   17.37                  pci_enabled = 1;
   17.38                  break;
   17.39 +            case QEMU_OPTION_nic_pcnet:
   17.40 +                nic_pcnet = 1;
   17.41 +                break;
   17.42              case QEMU_OPTION_isa:
   17.43                  pci_enabled = 0;
   17.44                  break;
    18.1 --- a/tools/ioemu/vl.h	Wed Aug 31 14:37:21 2005 -0800
    18.2 +++ b/tools/ioemu/vl.h	Wed Aug 31 15:22:45 2005 -0800
    18.3 @@ -600,6 +600,12 @@ int fdctrl_get_drive_type(fdctrl_t *fdct
    18.4  void isa_ne2000_init(int base, int irq, NetDriverState *nd);
    18.5  void pci_ne2000_init(PCIBus *bus, NetDriverState *nd);
    18.6  
    18.7 +/* pcnet.c */
    18.8 +
    18.9 +extern int nic_pcnet;
   18.10 +
   18.11 +void pci_pcnet_init(PCIBus *bus, NetDriverState *nd);
   18.12 +
   18.13  /* pckbd.c */
   18.14  
   18.15  void kbd_init(void);
    19.1 --- a/tools/libxc/xc_load_aout9.c	Wed Aug 31 14:37:21 2005 -0800
    19.2 +++ b/tools/libxc/xc_load_aout9.c	Wed Aug 31 15:22:45 2005 -0800
    19.3 @@ -15,6 +15,8 @@
    19.4  
    19.5  #define round_pgup(_p)    (((_p)+(PAGE_SIZE-1))&PAGE_MASK)
    19.6  #define round_pgdown(_p)  ((_p)&PAGE_MASK)
    19.7 +#define KZERO             0x80000000
    19.8 +#define KOFFSET(_p)       ((_p)&~KZERO)
    19.9  
   19.10  static int parseaout9image(char *, unsigned long, struct domain_setup_info *);
   19.11  static int loadaout9image(char *, unsigned long, int, u32, unsigned long *, struct domain_setup_info *);
   19.12 @@ -63,7 +65,7 @@ parseaout9image(
   19.13      txtsz = round_pgup(ehdr.text);
   19.14      end = start + txtsz + ehdr.data + ehdr.bss;
   19.15  
   19.16 -    dsi->v_start	= start;
   19.17 +    dsi->v_start	= KZERO;
   19.18      dsi->v_kernstart	= start;
   19.19      dsi->v_kernend	= end;
   19.20      dsi->v_kernentry	= ehdr.entry;
   19.21 @@ -83,19 +85,19 @@ loadaout9image(
   19.22      struct domain_setup_info *dsi)
   19.23  {
   19.24      struct Exec ehdr;
   19.25 -    unsigned long txtsz;
   19.26 +    unsigned long start, txtsz;
   19.27  
   19.28      if (!get_header(image, image_size, &ehdr)) {
   19.29          ERROR("Kernel image does not have a a.out9 header.");
   19.30          return -EINVAL;
   19.31      }
   19.32  
   19.33 +    start = round_pgdown(ehdr.entry);
   19.34      txtsz = round_pgup(ehdr.text);
   19.35      copyout(xch, dom, parray, 
   19.36 -            0, image, sizeof ehdr + ehdr.text);
   19.37 +            start, image, sizeof ehdr + ehdr.text);
   19.38      copyout(xch, dom, parray, 
   19.39 -            txtsz, image + sizeof ehdr + ehdr.text, ehdr.data);
   19.40 -    /* XXX zeroing of BSS needed? */
   19.41 +            start+txtsz, image + sizeof ehdr + ehdr.text, ehdr.data);
   19.42  
   19.43      /* XXX load symbols */
   19.44  
   19.45 @@ -110,13 +112,14 @@ static void
   19.46  copyout(
   19.47      int xch, u32 dom,
   19.48      unsigned long *parray,
   19.49 -    unsigned long off,
   19.50 +    unsigned long addr,
   19.51      void *buf,
   19.52      int sz)
   19.53  {
   19.54 -    unsigned long pgoff, chunksz;
   19.55 +    unsigned long pgoff, chunksz, off;
   19.56      void *pg;
   19.57  
   19.58 +    off = KOFFSET(addr);
   19.59      while (sz > 0) {
   19.60          pgoff = off & (PAGE_SIZE-1);
   19.61          chunksz = sz;
    20.1 --- a/tools/libxc/xc_private.c	Wed Aug 31 14:37:21 2005 -0800
    20.2 +++ b/tools/libxc/xc_private.c	Wed Aug 31 15:22:45 2005 -0800
    20.3 @@ -422,3 +422,8 @@ int xc_dom0_op(int xc_handle, dom0_op_t 
    20.4  {
    20.5      return do_dom0_op(xc_handle, op);
    20.6  }
    20.7 +
    20.8 +int xc_version(int xc_handle, int cmd, void *arg)
    20.9 +{
   20.10 +    return do_xen_version(xc_handle, cmd, arg);
   20.11 +}
    21.1 --- a/tools/libxc/xc_private.h	Wed Aug 31 14:37:21 2005 -0800
    21.2 +++ b/tools/libxc/xc_private.h	Wed Aug 31 15:22:45 2005 -0800
    21.3 @@ -59,6 +59,17 @@ static inline int do_xen_hypercall(int x
    21.4                        (unsigned long)hypercall);
    21.5  }
    21.6  
    21.7 +static inline int do_xen_version(int xc_handle, int cmd, void *dest)
    21.8 +{
    21.9 +    privcmd_hypercall_t hypercall;
   21.10 +
   21.11 +    hypercall.op     = __HYPERVISOR_xen_version;
   21.12 +    hypercall.arg[0] = (unsigned long) cmd;
   21.13 +    hypercall.arg[1] = (unsigned long) dest;
   21.14 +    
   21.15 +    return do_xen_hypercall(xc_handle, &hypercall);
   21.16 +}
   21.17 +
   21.18  static inline int do_dom0_op(int xc_handle, dom0_op_t *op)
   21.19  {
   21.20      int ret = -1;
    22.1 --- a/tools/libxc/xenctrl.h	Wed Aug 31 14:37:21 2005 -0800
    22.2 +++ b/tools/libxc/xenctrl.h	Wed Aug 31 15:22:45 2005 -0800
    22.3 @@ -23,6 +23,7 @@ typedef int64_t            s64;
    22.4  #include <sys/ptrace.h>
    22.5  #include <xen/xen.h>
    22.6  #include <xen/dom0_ops.h>
    22.7 +#include <xen/version.h>
    22.8  #include <xen/event_channel.h>
    22.9  #include <xen/sched_ctl.h>
   22.10  #include <xen/acm.h>
   22.11 @@ -497,6 +498,8 @@ long xc_get_tot_pages(int xc_handle, u32
   22.12  /* Execute a privileged dom0 operation. */
   22.13  int xc_dom0_op(int xc_handle, dom0_op_t *op);
   22.14  
   22.15 +int xc_version(int xc_handle, int cmd, void *arg);
   22.16 +
   22.17  /* Initializes the store (for dom0)
   22.18     remote_port should be the remote end of a bound interdomain channel between
   22.19     the store and dom0.
    23.1 --- a/tools/python/xen/lowlevel/xc/xc.c	Wed Aug 31 14:37:21 2005 -0800
    23.2 +++ b/tools/python/xen/lowlevel/xc/xc.c	Wed Aug 31 15:22:45 2005 -0800
    23.3 @@ -707,6 +707,39 @@ static PyObject *pyxc_physinfo(PyObject 
    23.4                           "cpu_khz",          info.cpu_khz);
    23.5  }
    23.6  
    23.7 +static PyObject *pyxc_xeninfo(PyObject *self,
    23.8 +                              PyObject *args,
    23.9 +                              PyObject *kwds)
   23.10 +{
   23.11 +    XcObject *xc = (XcObject *)self;
   23.12 +    xen_extraversion_t xen_extra;
   23.13 +    xen_compile_info_t xen_cc;
   23.14 +    xen_changeset_info_t xen_chgset;
   23.15 +    long xen_version;
   23.16 +
   23.17 +    xen_version = xc_version(xc->xc_handle, XENVER_version, NULL);
   23.18 +
   23.19 +    if ( xc_version(xc->xc_handle, XENVER_extraversion, &xen_extra) != 0 )
   23.20 +        return PyErr_SetFromErrno(xc_error);
   23.21 +
   23.22 +    if ( xc_version(xc->xc_handle, XENVER_compile_info, &xen_cc) != 0 )
   23.23 +        return PyErr_SetFromErrno(xc_error);
   23.24 +
   23.25 +    if ( xc_version(xc->xc_handle, XENVER_changeset, &xen_chgset) != 0 )
   23.26 +        return PyErr_SetFromErrno(xc_error);
   23.27 +
   23.28 +    return Py_BuildValue("{s:i,s:i,s:s,s:s,s:s,s:s,s:s,s:s}",
   23.29 +                         "xen_major", xen_version >> 16,
   23.30 +                         "xen_minor", (xen_version & 0xffff),
   23.31 +                         "xen_extra", xen_extra,
   23.32 +                         "xen_changeset", xen_chgset,
   23.33 +                         "cc_compiler", xen_cc.compiler,
   23.34 +                         "cc_compile_by", xen_cc.compile_by,
   23.35 +                         "cc_compile_domain", xen_cc.compile_domain,
   23.36 +                         "cc_compile_date", xen_cc.compile_date);
   23.37 +}
   23.38 +
   23.39 +
   23.40  static PyObject *pyxc_sedf_domain_set(PyObject *self,
   23.41                                           PyObject *args,
   23.42                                           PyObject *kwds)
   23.43 @@ -1089,6 +1122,13 @@ static PyMethodDef pyxc_methods[] = {
   23.44        "Returns [dict]: information about the hardware"
   23.45        "        [None]: on failure.\n" },
   23.46  
   23.47 +    { "xeninfo",
   23.48 +      (PyCFunction)pyxc_xeninfo,
   23.49 +      METH_VARARGS, "\n"
   23.50 +      "Get information about the Xen host\n"
   23.51 +      "Returns [dict]: information about Xen"
   23.52 +      "        [None]: on failure.\n" },
   23.53 +
   23.54      { "shadow_control", 
   23.55        (PyCFunction)pyxc_shadow_control, 
   23.56        METH_VARARGS | METH_KEYWORDS, "\n"
    24.1 --- a/tools/python/xen/xend/XendDomainInfo.py	Wed Aug 31 14:37:21 2005 -0800
    24.2 +++ b/tools/python/xen/xend/XendDomainInfo.py	Wed Aug 31 15:22:45 2005 -0800
    24.3 @@ -1078,10 +1078,9 @@ class XendDomainInfo:
    24.4  
    24.5      def publish_console(self):
    24.6          db = DBMap(db=XenNode("/console/%d" % self.id))
    24.7 -        db.clear()
    24.8          db['domain'] = self.db.getPath()
    24.9          db.saveDB(save=True)
   24.10 -        
   24.11 +
   24.12      def configure_fields(self):
   24.13          """Process the vm configuration fields using the registered handlers.
   24.14          """
    25.1 --- a/tools/python/xen/xend/XendNode.py	Wed Aug 31 14:37:21 2005 -0800
    25.2 +++ b/tools/python/xen/xend/XendNode.py	Wed Aug 31 15:22:45 2005 -0800
    25.3 @@ -46,7 +46,7 @@ class XendNode:
    25.4          return self.xc.bvtsched_global_get()
    25.5      
    25.6      def info(self):
    25.7 -        return self.nodeinfo() + self.physinfo()
    25.8 +        return self.nodeinfo() + self.physinfo() + self.xeninfo()
    25.9  
   25.10      def nodeinfo(self):
   25.11          (sys, host, rel, ver, mch) = os.uname()
   25.12 @@ -65,7 +65,16 @@ class XendNode:
   25.13                  ['free_memory', pinfo['free_pages']/256]]
   25.14          return info
   25.15          
   25.16 -        
   25.17 +    def xeninfo(self):
   25.18 +        xinfo = self.xc.xeninfo()
   25.19 +	return [['xen_major', xinfo['xen_major']],
   25.20 +	        ['xen_minor', xinfo['xen_minor']],
   25.21 +	        ['xen_extra', xinfo['xen_extra']],
   25.22 +		['xen_changeset', xinfo['xen_changeset']],
   25.23 +		['cc_compiler', xinfo['cc_compiler']],
   25.24 +                ['cc_compile_by', xinfo['cc_compile_by']],
   25.25 +                ['cc_compile_domain', xinfo['cc_compile_domain']],
   25.26 +                ['cc_compile_date', xinfo['cc_compile_date']]]
   25.27  
   25.28  def instance():
   25.29      global inst
    26.1 --- a/tools/python/xen/xm/create.py	Wed Aug 31 14:37:21 2005 -0800
    26.2 +++ b/tools/python/xen/xm/create.py	Wed Aug 31 15:22:45 2005 -0800
    26.3 @@ -103,12 +103,13 @@ gopts.opt('console_autoconnect', short='
    26.4            fn=set_true, default=0,
    26.5            use="Connect to the console after the domain is created.")
    26.6  
    26.7 -gopts.var('vnc', val='no|yes',
    26.8 +gopts.var('vncviewer', val='no|yes',
    26.9            fn=set_bool, default=None,
   26.10            use="""Spawn a vncviewer listening for a vnc server in the domain.
   26.11            The address of the vncviewer is passed to the domain on the kernel command
   26.12            line using 'VNC_SERVER=<host>:<port>'. The port used by vnc is 5500 + DISPLAY.
   26.13            A display value with a free port is chosen if possible.
   26.14 +	  Only valid when vnc=1.
   26.15            """)
   26.16  
   26.17  gopts.var('name', val='NAME',
   26.18 @@ -321,6 +322,10 @@ gopts.var('nographic', val='no|yes',
   26.19            fn=set_bool, default=0,
   26.20            use="Should device models use graphics?")
   26.21  
   26.22 +gopts.var('vnc', val='',
   26.23 +          fn=set_value, default=None,
   26.24 +          use="""Should the device model use VNC?""")
   26.25 +
   26.26  gopts.var('sdl', val='',
   26.27            fn=set_value, default=None,
   26.28            use="""Should the device model use SDL?""")
   26.29 @@ -494,7 +499,7 @@ def configure_vmx(opts, config_devs, val
   26.30      """
   26.31      args = [ 'memmap', 'device_model', 'cdrom',
   26.32   	     'boot', 'fda', 'fdb', 'localtime', 'serial', 'macaddr', 'stdvga', 
   26.33 -             'isa', 'nographic', 'vnc', 'sdl', 'display']	  
   26.34 +             'isa', 'nographic', 'vnc', 'vncviewer', 'sdl', 'display']	  
   26.35      for a in args:
   26.36  	if (vals.__dict__[a]):
   26.37      	    config_devs.append([a, vals.__dict__[a]])
   26.38 @@ -693,7 +698,7 @@ def preprocess_vnc(opts, vals):
   26.39      """If vnc was specified, spawn a vncviewer in listen mode
   26.40      and pass its address to the domain on the kernel command line.
   26.41      """
   26.42 -    if not vals.vnc or vals.dryrun: return
   26.43 +    if not (vals.vnc and vals.vncviewer) or vals.dryrun: return
   26.44      vnc_display = choose_vnc_display()
   26.45      if not vnc_display:
   26.46          opts.warn("No free vnc display")
    27.1 --- a/tools/xentrace/formats	Wed Aug 31 14:37:21 2005 -0800
    27.2 +++ b/tools/xentrace/formats	Wed Aug 31 15:22:45 2005 -0800
    27.3 @@ -15,3 +15,7 @@ 0x0002000d	CPU%(cpu)d	%(tsc)d		dom_timer
    27.4  0x00080001	CPU%(cpu)d      %(tsc)d		VMX_VMEXIT		[ domid = 0x%(1)08x, eip = 0x%(2)08x, reason = 0x%(3)08x ]
    27.5  0x00080002	CPU%(cpu)d      %(tsc)d		VMX_VECTOR		[ domid = 0x%(1)08x, eip = 0x%(2)08x, vector = 0x%(3)08x ]
    27.6  0x00080003	CPU%(cpu)d      %(tsc)d		VMX_INT			[ domid = 0x%(1)08x, trap = 0x%(2)08x, va = 0x%(3)08x ]
    27.7 +
    27.8 +0x00090001      CPU%(cpu)d      %(tsc)d         VMENTRY                 0x%(1)08x 0x%(2)08x 0x%(3)08x 0x%(4)08x 0x%(5)08x
    27.9 +0x00090002      CPU%(cpu)d      %(tsc)d         VMEXIT                  0x%(1)08x 0x%(2)08x 0x%(3)08x 
   27.10 +
    28.1 --- a/tools/xentrace/xentrace.c	Wed Aug 31 14:37:21 2005 -0800
    28.2 +++ b/tools/xentrace/xentrace.c	Wed Aug 31 15:22:45 2005 -0800
    28.3 @@ -525,7 +525,7 @@ int main(int argc, char **argv)
    28.4      }
    28.5  
    28.6      if (opts.cpu_mask != 0) {
    28.7 -        set_mask(opts.evt_mask, 1);
    28.8 +        set_mask(opts.cpu_mask, 1);
    28.9      }
   28.10  
   28.11      if ( opts.outfile )
    29.1 --- a/xen/arch/x86/domain_build.c	Wed Aug 31 14:37:21 2005 -0800
    29.2 +++ b/xen/arch/x86/domain_build.c	Wed Aug 31 15:22:45 2005 -0800
    29.3 @@ -20,6 +20,7 @@
    29.4  #include <asm/processor.h>
    29.5  #include <asm/desc.h>
    29.6  #include <asm/i387.h>
    29.7 +#include <asm/physdev.h>
    29.8  #include <asm/shadow.h>
    29.9  
   29.10  static long dom0_nrpages;
   29.11 @@ -707,6 +708,18 @@ int construct_dom0(struct domain *d,
   29.12          printk("dom0: shadow setup done\n");
   29.13      }
   29.14  
   29.15 +    /*
   29.16 +     * Modify I/O port access permissions.
   29.17 +     */
   29.18 +    /* Master Interrupt Controller (PIC). */
   29.19 +    physdev_modify_ioport_access_range(dom0, 0, 0x20, 2);
   29.20 +    /* Slave Interrupt Controller (PIC). */
   29.21 +    physdev_modify_ioport_access_range(dom0, 0, 0xA0, 2);
   29.22 +    /* Interval Timer (PIT). */
   29.23 +    physdev_modify_ioport_access_range(dom0, 0, 0x40, 4);
   29.24 +    /* PIT Channel 2 / PC Speaker Control. */
   29.25 +    physdev_modify_ioport_access_range(dom0, 0, 0x61, 1);
   29.26 +
   29.27      return 0;
   29.28  }
   29.29  
    30.1 --- a/xen/arch/x86/shadow.c	Wed Aug 31 14:37:21 2005 -0800
    30.2 +++ b/xen/arch/x86/shadow.c	Wed Aug 31 15:22:45 2005 -0800
    30.3 @@ -671,6 +671,7 @@ static void shadow_invlpg_32(struct vcpu
    30.4                           sizeof(gpte))) {*/
    30.5      if (unlikely(!__guest_get_l1e(v, va, &gpte))) {
    30.6          perfc_incrc(shadow_invlpg_faults);
    30.7 +        shadow_unlock(d);
    30.8          return;
    30.9      }
   30.10      l1pte_propagate_from_guest(d, gpte, &spte);
    31.1 --- a/xen/arch/x86/shadow32.c	Wed Aug 31 14:37:21 2005 -0800
    31.2 +++ b/xen/arch/x86/shadow32.c	Wed Aug 31 15:22:45 2005 -0800
    31.3 @@ -1685,6 +1685,7 @@ void shadow_invlpg(struct vcpu *v, unsig
    31.4      if (__copy_from_user(&gpte, &linear_pg_table[va >> PAGE_SHIFT],
    31.5                           sizeof(gpte))) {
    31.6          perfc_incrc(shadow_invlpg_faults);
    31.7 +        shadow_unlock(d);
    31.8          return;
    31.9      }
   31.10      l1pte_propagate_from_guest(d, gpte, &spte);
   31.11 @@ -1917,8 +1918,10 @@ static int snapshot_entry_matches(
   31.12      snapshot = map_domain_page(smfn);
   31.13  
   31.14      if (__copy_from_user(&gpte, &guest_pt[index],
   31.15 -                         sizeof(gpte)))
   31.16 +                         sizeof(gpte))) {
   31.17 +        unmap_domain_page(snapshot);
   31.18          return 0;
   31.19 +    }
   31.20  
   31.21      // This could probably be smarter, but this is sufficent for
   31.22      // our current needs.
    32.1 --- a/xen/arch/x86/vmx.c	Wed Aug 31 14:37:21 2005 -0800
    32.2 +++ b/xen/arch/x86/vmx.c	Wed Aug 31 15:22:45 2005 -0800
    32.3 @@ -50,6 +50,13 @@ int vmcs_size;
    32.4  unsigned int opt_vmx_debug_level = 0;
    32.5  integer_param("vmx_debug", opt_vmx_debug_level);
    32.6  
    32.7 +#ifdef TRACE_BUFFER
    32.8 +static unsigned long trace_values[NR_CPUS][4];
    32.9 +#define TRACE_VMEXIT(index,value) trace_values[current->processor][index]=value
   32.10 +#else
   32.11 +#define TRACE_VMEXIT(index,value) ((void)0)
   32.12 +#endif
   32.13 +
   32.14  #ifdef __x86_64__
   32.15  static struct msr_state percpu_msr[NR_CPUS];
   32.16  
   32.17 @@ -351,7 +358,7 @@ void stop_vmx(void)
   32.18   * Not all cases receive valid value in the VM-exit instruction length field.
   32.19   */
   32.20  #define __get_instruction_length(len) \
   32.21 -    __vmread(INSTRUCTION_LEN, &(len)); \
   32.22 +    __vmread(VM_EXIT_INSTRUCTION_LEN, &(len)); \
   32.23       if ((len) < 1 || (len) > 15) \
   32.24          __vmx_bug(&regs);
   32.25  
   32.26 @@ -381,6 +388,7 @@ static int vmx_do_page_fault(unsigned lo
   32.27  
   32.28      if (!vmx_paging_enabled(current)){
   32.29          handle_mmio(va, va);
   32.30 +        TRACE_VMEXIT (2,2);
   32.31          return 1;
   32.32      }
   32.33      gpa = gva_to_gpa(va);
   32.34 @@ -389,16 +397,17 @@ static int vmx_do_page_fault(unsigned lo
   32.35      if ( mmio_space(gpa) ){
   32.36          if (gpa >= 0xFEE00000) { /* workaround for local APIC */
   32.37              u32 inst_len;
   32.38 -            __vmread(INSTRUCTION_LEN, &(inst_len));
   32.39 +            __vmread(VM_EXIT_INSTRUCTION_LEN, &(inst_len));
   32.40              __update_guest_eip(inst_len);
   32.41              return 1;
   32.42          }
   32.43 +        TRACE_VMEXIT (2,2);
   32.44          handle_mmio(va, gpa);
   32.45          return 1;
   32.46      }
   32.47  
   32.48      result = shadow_fault(va, regs);
   32.49 -
   32.50 +    TRACE_VMEXIT (2,result);
   32.51  #if 0
   32.52      if ( !result )
   32.53      {
   32.54 @@ -542,7 +551,7 @@ static int check_for_null_selector(unsig
   32.55      int i, inst_len;
   32.56      int inst_copy_from_guest(unsigned char *, unsigned long, int);
   32.57  
   32.58 -    __vmread(INSTRUCTION_LEN, &inst_len);
   32.59 +    __vmread(VM_EXIT_INSTRUCTION_LEN, &inst_len);
   32.60      memset(inst, 0, MAX_INST_LEN);
   32.61      if (inst_copy_from_guest(inst, eip, inst_len) != inst_len) {
   32.62          printf("check_for_null_selector: get guest instruction failed\n");
   32.63 @@ -608,6 +617,7 @@ static void vmx_io_instruction(struct cp
   32.64          addr = (exit_qualification >> 16) & (0xffff);
   32.65      else
   32.66          addr = regs->edx & 0xffff;
   32.67 +    TRACE_VMEXIT (2,addr);
   32.68  
   32.69      vio = get_vio(d->domain, d->vcpu_id);
   32.70      if (vio == 0) {
   32.71 @@ -712,7 +722,7 @@ vmx_world_save(struct vcpu *d, struct vm
   32.72      unsigned long inst_len;
   32.73      int error = 0;
   32.74  
   32.75 -    error |= __vmread(INSTRUCTION_LEN, &inst_len);
   32.76 +    error |= __vmread(VM_EXIT_INSTRUCTION_LEN, &inst_len);
   32.77      error |= __vmread(GUEST_RIP, &c->eip);
   32.78      c->eip += inst_len; /* skip transition instruction */
   32.79      error |= __vmread(GUEST_RSP, &c->esp);
   32.80 @@ -1282,13 +1292,20 @@ static int vmx_cr_access(unsigned long e
   32.81      case TYPE_MOV_TO_CR:
   32.82          gp = exit_qualification & CONTROL_REG_ACCESS_REG;
   32.83          cr = exit_qualification & CONTROL_REG_ACCESS_NUM;
   32.84 +        TRACE_VMEXIT(1,TYPE_MOV_TO_CR);
   32.85 +        TRACE_VMEXIT(2,cr);
   32.86 +        TRACE_VMEXIT(3,gp);
   32.87          return mov_to_cr(gp, cr, regs);
   32.88      case TYPE_MOV_FROM_CR:
   32.89          gp = exit_qualification & CONTROL_REG_ACCESS_REG;
   32.90          cr = exit_qualification & CONTROL_REG_ACCESS_NUM;
   32.91 +        TRACE_VMEXIT(1,TYPE_MOV_FROM_CR);
   32.92 +        TRACE_VMEXIT(2,cr);
   32.93 +        TRACE_VMEXIT(3,gp);
   32.94          mov_from_cr(cr, gp, regs);
   32.95          break;
   32.96      case TYPE_CLTS:
   32.97 +        TRACE_VMEXIT(1,TYPE_CLTS);
   32.98          clts();
   32.99          setup_fpu(current);
  32.100  
  32.101 @@ -1301,6 +1318,7 @@ static int vmx_cr_access(unsigned long e
  32.102          __vmwrite(CR0_READ_SHADOW, value);
  32.103          break;
  32.104      case TYPE_LMSW:
  32.105 +        TRACE_VMEXIT(1,TYPE_LMSW);
  32.106          __vmread(CR0_READ_SHADOW, &value);
  32.107  	value = (value & ~0xF) |
  32.108  		(((exit_qualification & LMSW_SOURCE_DATA) >> 16) & 0xF);
  32.109 @@ -1544,6 +1562,7 @@ asmlinkage void vmx_vmexit_handler(struc
  32.110  
  32.111      __vmread(GUEST_RIP, &eip);
  32.112      TRACE_3D(TRC_VMX_VMEXIT, v->domain->domain_id, eip, exit_reason);
  32.113 +    TRACE_VMEXIT(0,exit_reason);
  32.114  
  32.115      switch (exit_reason) {
  32.116      case EXIT_REASON_EXCEPTION_NMI:
  32.117 @@ -1562,6 +1581,7 @@ asmlinkage void vmx_vmexit_handler(struc
  32.118              __vmx_bug(&regs);
  32.119          vector &= 0xff;
  32.120  
  32.121 +	 TRACE_VMEXIT(1,vector);
  32.122          perfc_incra(cause_vector, vector);
  32.123  
  32.124          TRACE_3D(TRC_VMX_VECTOR, v->domain->domain_id, eip, vector);
  32.125 @@ -1606,6 +1626,10 @@ asmlinkage void vmx_vmexit_handler(struc
  32.126          {
  32.127              __vmread(EXIT_QUALIFICATION, &va);
  32.128              __vmread(VM_EXIT_INTR_ERROR_CODE, &regs.error_code);
  32.129 +            
  32.130 +	    TRACE_VMEXIT(3,regs.error_code);
  32.131 +	    TRACE_VMEXIT(4,va);
  32.132 +
  32.133              VMX_DBG_LOG(DBG_LEVEL_VMMU, 
  32.134                          "eax=%lx, ebx=%lx, ecx=%lx, edx=%lx, esi=%lx, edi=%lx",
  32.135                          (unsigned long)regs.eax, (unsigned long)regs.ebx,
  32.136 @@ -1680,6 +1704,8 @@ asmlinkage void vmx_vmexit_handler(struc
  32.137                  eip, inst_len, exit_qualification);
  32.138          if (vmx_cr_access(exit_qualification, &regs))
  32.139  	    __update_guest_eip(inst_len);
  32.140 +	 TRACE_VMEXIT(3,regs.error_code);
  32.141 +        TRACE_VMEXIT(4,exit_qualification);
  32.142          break;
  32.143      }
  32.144      case EXIT_REASON_DR_ACCESS:
  32.145 @@ -1692,6 +1718,7 @@ asmlinkage void vmx_vmexit_handler(struc
  32.146          __vmread(EXIT_QUALIFICATION, &exit_qualification);
  32.147          __get_instruction_length(inst_len);
  32.148          vmx_io_instruction(&regs, exit_qualification, inst_len);
  32.149 +        TRACE_VMEXIT(4,exit_qualification);
  32.150          break;
  32.151      case EXIT_REASON_MSR_READ:
  32.152          __get_instruction_length(inst_len);
  32.153 @@ -1726,6 +1753,25 @@ asmlinkage void load_cr2(void)
  32.154  #endif
  32.155  }
  32.156  
  32.157 +#ifdef TRACE_BUFFER
  32.158 +asmlinkage void trace_vmentry (void)
  32.159 +{
  32.160 +    TRACE_5D(TRC_VMENTRY,trace_values[current->processor][0],
  32.161 +          trace_values[current->processor][1],trace_values[current->processor][2],
  32.162 +          trace_values[current->processor][3],trace_values[current->processor][4]);
  32.163 +    TRACE_VMEXIT(0,9);
  32.164 +    TRACE_VMEXIT(1,9);
  32.165 +    TRACE_VMEXIT(2,9);
  32.166 +    TRACE_VMEXIT(3,9);
  32.167 +    TRACE_VMEXIT(4,9);
  32.168 +    return;
  32.169 +}
  32.170 +asmlinkage void trace_vmexit (void)
  32.171 +{
  32.172 +    TRACE_3D(TRC_VMEXIT,0,0,0);
  32.173 +    return;
  32.174 +}
  32.175 +#endif 
  32.176  #endif /* CONFIG_VMX */
  32.177  
  32.178  /*
    33.1 --- a/xen/arch/x86/vmx_platform.c	Wed Aug 31 14:37:21 2005 -0800
    33.2 +++ b/xen/arch/x86/vmx_platform.c	Wed Aug 31 15:22:45 2005 -0800
    33.3 @@ -639,7 +639,7 @@ void handle_mmio(unsigned long va, unsig
    33.4      inst_decoder_regs = mpci_p->inst_decoder_regs;
    33.5  
    33.6      __vmread(GUEST_RIP, &eip);
    33.7 -    __vmread(INSTRUCTION_LEN, &inst_len);
    33.8 +    __vmread(VM_EXIT_INSTRUCTION_LEN, &inst_len);
    33.9      __vmread(GUEST_RFLAGS, &eflags);
   33.10      vm86 = eflags & X86_EFLAGS_VM;
   33.11  
    34.1 --- a/xen/arch/x86/x86_32/entry.S	Wed Aug 31 14:37:21 2005 -0800
    34.2 +++ b/xen/arch/x86/x86_32/entry.S	Wed Aug 31 15:22:45 2005 -0800
    34.3 @@ -126,6 +126,9 @@
    34.4  ENTRY(vmx_asm_vmexit_handler)
    34.5          /* selectors are restored/saved by VMX */
    34.6          VMX_SAVE_ALL_NOSEGREGS
    34.7 +#ifdef TRACE_BUFFER
    34.8 +        call trace_vmexit
    34.9 +#endif
   34.10          call vmx_vmexit_handler
   34.11          jmp vmx_asm_do_resume
   34.12  
   34.13 @@ -147,6 +150,9 @@ 1:
   34.14  /* vmx_restore_all_guest */
   34.15          call vmx_intr_assist
   34.16          call load_cr2
   34.17 +#ifdef TRACE_BUFFER
   34.18 +        call trace_vmentry
   34.19 +#endif
   34.20          .endif
   34.21          VMX_RESTORE_ALL_NOSEGREGS
   34.22          /* 
    35.1 --- a/xen/common/domain.c	Wed Aug 31 14:37:21 2005 -0800
    35.2 +++ b/xen/common/domain.c	Wed Aug 31 15:22:45 2005 -0800
    35.3 @@ -114,6 +114,8 @@ void domain_kill(struct domain *d)
    35.4              sched_rem_domain(v);
    35.5          domain_relinquish_resources(d);
    35.6          put_domain(d);
    35.7 +
    35.8 +        send_guest_virq(dom0->vcpu[0], VIRQ_DOM_EXC);
    35.9      }
   35.10  }
   35.11  
    36.1 --- a/xen/common/kernel.c	Wed Aug 31 14:37:21 2005 -0800
    36.2 +++ b/xen/common/kernel.c	Wed Aug 31 15:22:45 2005 -0800
    36.3 @@ -46,7 +46,7 @@ void cmdline_parse(char *cmdline)
    36.4          if ( optval != NULL )
    36.5              *optval++ = '\0';
    36.6  
    36.7 -        for ( param = &__setup_start; param != &__setup_end; param++ )
    36.8 +        for ( param = &__setup_start; param <= &__setup_end; param++ )
    36.9          {
   36.10              if ( strcmp(param->name, opt ) != 0 )
   36.11                  continue;
   36.12 @@ -110,6 +110,27 @@ long do_xen_version(int cmd, void *arg)
   36.13              return -EFAULT;
   36.14          return 0;
   36.15      }
   36.16 +
   36.17 +    case XENVER_capabilities:
   36.18 +    {
   36.19 +        struct xen_capabilities_info info;
   36.20 +        
   36.21 +        /* FIXME */
   36.22 +        info.arch = 0;
   36.23 +        info.pae = 0;
   36.24 +        if ( copy_to_user(arg, &info, sizeof(info)) )
   36.25 +            return -EFAULT;
   36.26 +        return 0;
   36.27 +    }
   36.28 +    
   36.29 +    case XENVER_changeset:
   36.30 +    {
   36.31 +        xen_changeset_info_t chgset;
   36.32 +        safe_strcpy(chgset, XEN_CHANGESET);
   36.33 +        if ( copy_to_user(arg, chgset, sizeof(chgset)) )
   36.34 +            return -EFAULT;
   36.35 +        return 0;
   36.36 +    }
   36.37      }
   36.38  
   36.39      return -ENOSYS;
    37.1 --- a/xen/include/asm-x86/vmx.h	Wed Aug 31 14:37:21 2005 -0800
    37.2 +++ b/xen/include/asm-x86/vmx.h	Wed Aug 31 15:22:45 2005 -0800
    37.3 @@ -275,7 +275,9 @@ static inline int __vmpclear (u64 addr)
    37.4      return 0;
    37.5  }
    37.6  
    37.7 -static inline int __vmread (unsigned long field, void *value)
    37.8 +#define __vmread(x, ptr) ___vmread((x), (ptr), sizeof(*(ptr)))
    37.9 +
   37.10 +static always_inline int ___vmread (const unsigned long field,  void *ptr, const int size)
   37.11  {
   37.12      unsigned long eflags;
   37.13      unsigned long ecx = 0;
   37.14 @@ -286,7 +288,23 @@ static inline int __vmread (unsigned lon
   37.15                             : "a" (field)
   37.16                             : "memory");
   37.17  
   37.18 -    *((long *) value) = ecx;
   37.19 +    switch (size) {
   37.20 +    case 1:
   37.21 +        *((u8 *) (ptr)) = ecx;
   37.22 +        break;
   37.23 +    case 2:
   37.24 +        *((u16 *) (ptr)) = ecx;
   37.25 +        break;
   37.26 +    case 4:
   37.27 +        *((u32 *) (ptr)) = ecx;
   37.28 +        break;
   37.29 +    case 8:
   37.30 +        *((u64 *) (ptr)) = ecx;
   37.31 +        break;
   37.32 +    default:
   37.33 +        domain_crash_synchronous();
   37.34 +        break;
   37.35 +    }
   37.36  
   37.37      __save_flags(eflags);
   37.38      if (eflags & X86_EFLAGS_ZF || eflags & X86_EFLAGS_CF)
    38.1 --- a/xen/include/asm-x86/vmx_vmcs.h	Wed Aug 31 14:37:21 2005 -0800
    38.2 +++ b/xen/include/asm-x86/vmx_vmcs.h	Wed Aug 31 15:22:45 2005 -0800
    38.3 @@ -183,7 +183,7 @@ enum vmcs_field {
    38.4      VM_ENTRY_MSR_LOAD_COUNT         = 0x00004014,
    38.5      VM_ENTRY_INTR_INFO_FIELD        = 0x00004016,
    38.6      VM_ENTRY_EXCEPTION_ERROR_CODE   = 0x00004018,
    38.7 -    VM_ENTRY_INSTRUCTION_LENGTH     = 0x0000401a,
    38.8 +    VM_ENTRY_INSTRUCTION_LEN        = 0x0000401a,
    38.9      TPR_THRESHOLD                   = 0x0000401c,
   38.10      SECONDARY_VM_EXEC_CONTROL       = 0x0000401e,
   38.11      VM_INSTRUCTION_ERROR            = 0x00004400,
   38.12 @@ -192,7 +192,7 @@ enum vmcs_field {
   38.13      VM_EXIT_INTR_ERROR_CODE         = 0x00004406,
   38.14      IDT_VECTORING_INFO_FIELD        = 0x00004408,
   38.15      IDT_VECTORING_ERROR_CODE        = 0x0000440a,
   38.16 -    INSTRUCTION_LEN                 = 0x0000440c,
   38.17 +    VM_EXIT_INSTRUCTION_LEN         = 0x0000440c,
   38.18      VMX_INSTRUCTION_INFO            = 0x0000440e,
   38.19      GUEST_ES_LIMIT                  = 0x00004800,
   38.20      GUEST_CS_LIMIT                  = 0x00004802,
    39.1 --- a/xen/include/public/trace.h	Wed Aug 31 14:37:21 2005 -0800
    39.2 +++ b/xen/include/public/trace.h	Wed Aug 31 15:22:45 2005 -0800
    39.3 @@ -23,7 +23,7 @@
    39.4  #define TRC_VMXTIMER 0x00082000   /* VMX timer trace           */
    39.5  #define TRC_VMXINT   0x00084000   /* VMX interrupt trace       */
    39.6  #define TRC_VMXIO    0x00088000   /* VMX io emulation trace  */
    39.7 -
    39.8 +#define TRC_VMEXIT_HANDLER    0x00090000   /* VMX handler trace  */
    39.9  
   39.10  /* Trace events per class */
   39.11  
   39.12 @@ -49,6 +49,10 @@
   39.13  
   39.14  #define TRC_VMX_INT             (TRC_VMXINT + 1)
   39.15  
   39.16 +#define TRC_VMEXIT              (TRC_VMEXIT_HANDLER + 1)
   39.17 +#define TRC_VMENTRY             (TRC_VMEXIT_HANDLER + 2)
   39.18 +
   39.19 +
   39.20  /* This structure represents a single trace buffer record. */
   39.21  struct t_rec {
   39.22      u64 cycles;               /* cycle counter timestamp */
    40.1 --- a/xen/include/public/version.h	Wed Aug 31 14:37:21 2005 -0800
    40.2 +++ b/xen/include/public/version.h	Wed Aug 31 15:22:45 2005 -0800
    40.3 @@ -28,4 +28,13 @@ typedef struct xen_compile_info {
    40.4      char compile_date[32];
    40.5  } xen_compile_info_t;
    40.6  
    40.7 +#define XENVER_capabilities 3
    40.8 +typedef struct xen_capabilities_info {
    40.9 +    int pae;
   40.10 +    int arch;
   40.11 +} xen_capabilities_info_t;
   40.12 +
   40.13 +#define XENVER_changeset 4
   40.14 +typedef char xen_changeset_info_t[64];
   40.15 +
   40.16  #endif /* __XEN_PUBLIC_VERSION_H__ */