ia64/xen-unstable

changeset 9986:f024bb5f5a07

[IA64] ia64_new_rr7 rewritten + cleanup

ia64_new_rr7 rewritten (more compact).
Cleanup in xenasm.S
Define of shared_info_va removed.

Signed-off-by: Tristan Gingold <tristan.gingold@bull.net>
author awilliam@xenbuild.aw
date Wed May 10 15:29:54 2006 -0600 (2006-05-10)
parents 9de9ad0685bf
children c3506e73b63e
files xen/arch/ia64/xen/domain.c xen/arch/ia64/xen/regionreg.c xen/arch/ia64/xen/xenasm.S xen/include/asm-ia64/domain.h
line diff
     1.1 --- a/xen/arch/ia64/xen/domain.c	Wed May 10 15:29:48 2006 -0600
     1.2 +++ b/xen/arch/ia64/xen/domain.c	Wed May 10 15:29:54 2006 -0600
     1.3 @@ -239,7 +239,8 @@ int arch_domain_create(struct domain *d)
     1.4  	// the following will eventually need to be negotiated dynamically
     1.5  	d->xen_vastart = XEN_START_ADDR;
     1.6  	d->xen_vaend = XEN_END_ADDR;
     1.7 -	d->shared_info_va = SHAREDINFO_ADDR;
     1.8 +	d->arch.shared_info_va = SHAREDINFO_ADDR;
     1.9 +	d->arch.breakimm = 0x1000;
    1.10  
    1.11  	if (is_idle_domain(d))
    1.12  	    return 0;
    1.13 @@ -255,7 +256,6 @@ int arch_domain_create(struct domain *d)
    1.14  	 */
    1.15  	if (!allocate_rid_range(d,0))
    1.16  		goto fail_nomem;
    1.17 -	d->arch.breakimm = 0x1000;
    1.18  	d->arch.sys_pgnr = 0;
    1.19  
    1.20  	if ((d->arch.mm = xmalloc(struct mm_struct)) == NULL)
     2.1 --- a/xen/arch/ia64/xen/regionreg.c	Wed May 10 15:29:48 2006 -0600
     2.2 +++ b/xen/arch/ia64/xen/regionreg.c	Wed May 10 15:29:54 2006 -0600
     2.3 @@ -17,9 +17,7 @@
     2.4  #include <asm/vcpu.h>
     2.5  
     2.6  /* Defined in xemasm.S  */
     2.7 -extern void ia64_new_rr7(unsigned long rid,void *shared_info, void *shared_arch_info, unsigned long p_vhpt, unsigned long v_pal);
     2.8 -
     2.9 -extern void *pal_vaddr;
    2.10 +extern void ia64_new_rr7(unsigned long rid, void *shared_info, void *shared_arch_info, unsigned long shared_info_va, unsigned long p_vhpt);
    2.11  
    2.12  /* RID virtualization mechanism is really simple:  domains have less rid bits
    2.13     than the host and the host rid space is shared among the domains.  (Values
    2.14 @@ -261,8 +259,8 @@ int set_one_rr(unsigned long rr, unsigne
    2.15  			set_rr(rr,newrrv.rrval);
    2.16  	} else if (rreg == 7) {
    2.17  		ia64_new_rr7(vmMangleRID(newrrv.rrval),v->vcpu_info,
    2.18 -			     v->arch.privregs, __get_cpu_var(vhpt_paddr),
    2.19 -			     (unsigned long) pal_vaddr);
    2.20 +			     v->arch.privregs, v->domain->arch.shared_info_va,
    2.21 +			     __get_cpu_var(vhpt_paddr));
    2.22  	} else {
    2.23  		set_rr(rr,newrrv.rrval);
    2.24  	}
     3.1 --- a/xen/arch/ia64/xen/xenasm.S	Wed May 10 15:29:48 2006 -0600
     3.2 +++ b/xen/arch/ia64/xen/xenasm.S	Wed May 10 15:29:54 2006 -0600
     3.3 @@ -11,242 +11,160 @@
     3.4  #include <asm/pgtable.h>
     3.5  #include <asm/vhpt.h>
     3.6  
     3.7 -#if 0
     3.8 -// FIXME: there's gotta be a better way...
     3.9 -// ski and spaski are different... moved to xenmisc.c
    3.10 -#define RunningOnHpSki(rx,ry,pn) 			\
    3.11 -	addl rx = 2, r0; 				\
    3.12 -	addl ry = 3, r0; 				\
    3.13 -	;; 						\
    3.14 -	mov rx = cpuid[rx]; 				\
    3.15 -	mov ry = cpuid[ry]; 				\
    3.16 -	;; 						\
    3.17 -	cmp.eq pn,p0 = 0, rx; 				\
    3.18 -	;; 						\
    3.19 -	(pn) movl rx = 0x7000004 ; 			\
    3.20 -	;; 						\
    3.21 -	(pn) cmp.ge pn,p0 = ry, rx; 			\
    3.22 -	;;
    3.23 -
    3.24 -//int platform_is_hp_ski(void)
    3.25 -GLOBAL_ENTRY(platform_is_hp_ski)
    3.26 -	mov r8 = 0
    3.27 -	RunningOnHpSki(r3,r9,p8)
    3.28 -(p8)	mov r8 = 1
    3.29 -	br.ret.sptk.many b0
    3.30 -END(platform_is_hp_ski)
    3.31 -#endif
    3.32 -
    3.33  // Change rr7 to the passed value while ensuring
    3.34  // Xen is mapped into the new region.
    3.35 -//   in0: new rr7 value
    3.36 -//   in1: Xen virtual address of shared info (to be pinned)
    3.37  #define PSR_BITS_TO_CLEAR						\
    3.38  	(IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_RT |		\
    3.39  	 IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED |	\
    3.40 -	 IA64_PSR_DFL | IA64_PSR_DFH)
    3.41 +	 IA64_PSR_DFL | IA64_PSR_DFH | IA64_PSR_IC)
    3.42  // FIXME? Note that this turns off the DB bit (debug)
    3.43  #define PSR_BITS_TO_SET	IA64_PSR_BN
    3.44  
    3.45 -//extern void ia64_new_rr7(unsigned long rid,void *shared_info, void *shared_arch_info, unsigned long p_vhpt, unsigned long v_pal);
    3.46 +//extern void ia64_new_rr7(unsigned long rid,      	 /* in0 */
    3.47 +//                         void *shared_info,      	 /* in1 */
    3.48 +//                         void *shared_arch_info, 	 /* in2 */
    3.49 +//                         unsigned long shared_info_va, /* in3 */
    3.50 +//                         unsigned long p_vhpt)   	 /* in4 */
    3.51 +//Local usage:
    3.52 +//  loc0=rp, loc1=ar.pfs, loc2=percpu_paddr, loc3=psr, loc4=ar.rse
    3.53 +//  loc5=pal_vaddr, loc6=xen_paddr, loc7=shared_archinfo_paddr,
    3.54  GLOBAL_ENTRY(ia64_new_rr7)
    3.55  	// not sure this unwind statement is correct...
    3.56  	.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(1)
    3.57 -	alloc loc1 = ar.pfs, 5, 9, 0, 0
    3.58 +	alloc loc1 = ar.pfs, 5, 8, 0, 0
    3.59 +	movl loc2=PERCPU_ADDR
    3.60  1:	{
    3.61 -	  mov r28  = in0		// copy procedure index
    3.62 +	  mov loc3 = psr		// save psr	
    3.63 +	  mov loc0 = rp			// save rp
    3.64  	  mov r8   = ip			// save ip to compute branch
    3.65 -	  mov loc0 = rp			// save rp
    3.66  	};;
    3.67  	.body
    3.68 -	movl loc2=PERCPU_ADDR
    3.69 -	;;
    3.70  	tpa loc2=loc2			// grab this BEFORE changing rr7
    3.71 -	;;
    3.72 -	dep loc8=0,in4,60,4
    3.73 -	;;
    3.74 -#if VHPT_ENABLED
    3.75 -	mov loc6=in3
    3.76 -	;;
    3.77 -	//tpa loc6=loc6			// grab this BEFORE changing rr7
    3.78 -	;;
    3.79 -#endif
    3.80 -	mov loc5=in1
    3.81 +	tpa in1=in1			// grab shared_info BEFORE changing rr7
    3.82 +	adds r8 = 1f-1b,r8		// calculate return address for call
    3.83  	;;
    3.84 -	tpa loc5=loc5			// grab this BEFORE changing rr7
    3.85 -	;;
    3.86 -	mov loc7=in2			// arch_vcpu_info_t
    3.87 -	;;
    3.88 -	tpa loc7=loc7			// grab this BEFORE changing rr7
    3.89 -	;;
    3.90 -	mov loc3 = psr			// save psr
    3.91 -	adds r8  = 1f-1b,r8		// calculate return address for call
    3.92 -	;;
    3.93 +	tpa loc7=in2			// grab arch_vcpu_info BEFORE chg rr7
    3.94 +	movl r17=PSR_BITS_TO_SET
    3.95 +	mov loc4=ar.rsc			// save RSE configuration
    3.96 +	movl r16=PSR_BITS_TO_CLEAR
    3.97 +	;; 
    3.98  	tpa r8=r8			// convert rp to physical
    3.99 -	;;
   3.100 -	mov loc4=ar.rsc			// save RSE configuration
   3.101 -	;;
   3.102  	mov ar.rsc=0			// put RSE in enforced lazy, LE mode
   3.103 -	movl r16=PSR_BITS_TO_CLEAR
   3.104 -	movl r17=PSR_BITS_TO_SET
   3.105 -	;;
   3.106  	or loc3=loc3,r17		// add in psr the bits to set
   3.107  	;;
   3.108  	andcm r16=loc3,r16		// removes bits to clear from psr
   3.109 +	dep loc6=0,r8,0,KERNEL_TR_PAGE_SHIFT // Xen code paddr
   3.110  	br.call.sptk.many rp=ia64_switch_mode_phys
   3.111  1:
   3.112  	// now in physical mode with psr.i/ic off so do rr7 switch
   3.113 -	dep	r16=-1,r0,61,3
   3.114 +	movl r16=pal_vaddr		// Note: belong to region 7!
   3.115 +	;; 
   3.116 +	mov	rr[r16]=in0
   3.117 +	;; 
   3.118 +	srlz.d
   3.119 +	dep	r16=0,r16,60,4		// Get physical address.
   3.120  	;;
   3.121 -	mov	rr[r16]=in0
   3.122 -	srlz.d
   3.123 -	;;
   3.124 +	ld8 loc5=[r16]			// read pal_vaddr
   3.125 +	movl	r26=PAGE_KERNEL
   3.126 +	;; 
   3.127  
   3.128  	// re-pin mappings for kernel text and data
   3.129 -	mov r18=KERNEL_TR_PAGE_SHIFT<<2
   3.130 +	mov r24=KERNEL_TR_PAGE_SHIFT<<2
   3.131  	movl r17=KERNEL_START
   3.132  	;;
   3.133 -	rsm psr.i | psr.ic
   3.134 -	;;
   3.135 -	srlz.i
   3.136 -	;;
   3.137 -	ptr.i	r17,r18
   3.138 -	ptr.d	r17,r18
   3.139 -	;;
   3.140 -	mov cr.itir=r18
   3.141 +	ptr.i	r17,r24
   3.142 +	ptr.d	r17,r24
   3.143 +	mov r16=IA64_TR_KERNEL
   3.144 +	mov cr.itir=r24
   3.145  	mov cr.ifa=r17
   3.146 -	mov r16=IA64_TR_KERNEL
   3.147 -	//mov r3=ip
   3.148 -	movl r18=PAGE_KERNEL
   3.149 -	;;
   3.150 -	dep r2=0,r3,0,KERNEL_TR_PAGE_SHIFT
   3.151 -	;;
   3.152 -	or r18=r2,r18
   3.153 -	;;
   3.154 -	srlz.i
   3.155 +	or r18=loc6,r26
   3.156  	;;
   3.157  	itr.i itr[r16]=r18
   3.158 -	;;
   3.159 +	;; 
   3.160  	itr.d dtr[r16]=r18
   3.161 -	;;
   3.162  
   3.163 -	// re-pin mappings for stack (current), per-cpu, vhpt, and shared info
   3.164 +	// re-pin mappings for stack (current)
   3.165  
   3.166  	// unless overlaps with KERNEL_TR
   3.167  	dep r18=0,r13,0,KERNEL_TR_PAGE_SHIFT
   3.168  	;;
   3.169  	cmp.eq p7,p0=r17,r18
   3.170  (p7)	br.cond.sptk	.stack_overlaps
   3.171 -	;;
   3.172 -	movl r25=PAGE_KERNEL
   3.173 +	mov r25=IA64_GRANULE_SHIFT<<2
   3.174  	dep r21=0,r13,60,4		// physical address of "current"
   3.175  	;;
   3.176 -	or r23=r25,r21			// construct PA | page properties
   3.177 -	mov r25=IA64_GRANULE_SHIFT<<2
   3.178 -	;;
   3.179  	ptr.d	r13,r25
   3.180 -	;;
   3.181 +	or r23=r21,r26			// construct PA | page properties
   3.182  	mov cr.itir=r25
   3.183  	mov cr.ifa=r13			// VA of next task...
   3.184 -	;;
   3.185 -	mov r25=IA64_TR_CURRENT_STACK
   3.186 +	mov r21=IA64_TR_CURRENT_STACK
   3.187  	;;
   3.188 -	itr.d dtr[r25]=r23		// wire in new mapping...
   3.189 -	;;
   3.190 +	itr.d dtr[r21]=r23		// wire in new mapping...
   3.191 +
   3.192 +	//  Per-cpu	
   3.193  .stack_overlaps:
   3.194 -
   3.195 +	mov r24=PERCPU_PAGE_SHIFT<<2
   3.196  	movl r22=PERCPU_ADDR
   3.197  	;;
   3.198 -	movl r25=PAGE_KERNEL
   3.199 -	;;
   3.200 -	mov r21=loc2			// saved percpu physical address
   3.201 -	;;
   3.202 -	or r23=r25,r21			// construct PA | page properties
   3.203 -	mov r24=PERCPU_PAGE_SHIFT<<2
   3.204 -	;;
   3.205  	ptr.d	r22,r24
   3.206 -	;;
   3.207 +	or r23=loc2,r26			// construct PA | page properties
   3.208  	mov cr.itir=r24
   3.209  	mov cr.ifa=r22
   3.210 -	;;
   3.211  	mov r25=IA64_TR_PERCPU_DATA
   3.212  	;;
   3.213  	itr.d dtr[r25]=r23		// wire in new mapping...
   3.214 -	;;
   3.215  
   3.216 +	// VHPT
   3.217  #if VHPT_ENABLED
   3.218 +	mov r24=VHPT_SIZE_LOG2<<2
   3.219  	movl r22=VHPT_ADDR
   3.220 -	;;
   3.221 -	movl r25=PAGE_KERNEL
   3.222 -	;;
   3.223 -	mov r21=loc6			// saved vhpt physical address
   3.224 -	;;
   3.225 -	or r23=r25,r21			// construct PA | page properties
   3.226 -	mov r24=VHPT_SIZE_LOG2<<2
   3.227 +	mov r21=IA64_TR_VHPT
   3.228  	;;
   3.229  	ptr.d	r22,r24
   3.230 -	;;
   3.231 +	or r23=in4,r26			// construct PA | page properties
   3.232  	mov cr.itir=r24
   3.233  	mov cr.ifa=r22
   3.234  	;;
   3.235 -	mov r25=IA64_TR_VHPT
   3.236 -	;;
   3.237 -	itr.d dtr[r25]=r23		// wire in new mapping...
   3.238 -	;;
   3.239 +	itr.d dtr[r21]=r23		// wire in new mapping...
   3.240  #endif
   3.241  
   3.242 -	movl r22=SHAREDINFO_ADDR
   3.243 -	;;
   3.244 -	movl r25=__pgprot(__DIRTY_BITS | _PAGE_PL_2 | _PAGE_AR_RW)
   3.245 -	;;
   3.246 -	mov r21=loc5			// saved sharedinfo physical address
   3.247 -	;;
   3.248 -	or r23=r25,r21			// construct PA | page properties
   3.249 +	//  Shared info
   3.250  	mov r24=PAGE_SHIFT<<2
   3.251 -	;;
   3.252 -	ptr.d	r22,r24
   3.253 -	;;
   3.254 -	mov cr.itir=r24
   3.255 -	mov cr.ifa=r22
   3.256 -	;;
   3.257 -	mov r25=IA64_TR_SHARED_INFO
   3.258 -	;;
   3.259 -	itr.d dtr[r25]=r23		// wire in new mapping...
   3.260 -	;;
   3.261 -	// Map for arch_vcpu_info_t
   3.262 -	movl r22=SHARED_ARCHINFO_ADDR
   3.263 -	;;
   3.264  	movl r25=__pgprot(__DIRTY_BITS | _PAGE_PL_2 | _PAGE_AR_RW)
   3.265  	;;
   3.266 -	mov r21=loc7			// saved sharedinfo physical address
   3.267 +	ptr.d	in3,r24
   3.268 +	or r23=in1,r25			// construct PA | page properties
   3.269 +	mov cr.itir=r24
   3.270 +	mov cr.ifa=in3
   3.271 +	mov r21=IA64_TR_SHARED_INFO
   3.272  	;;
   3.273 -	or r23=r25,r21			// construct PA | page properties
   3.274 +	itr.d dtr[r21]=r23		// wire in new mapping...
   3.275 +	
   3.276 +	// Map for arch_vcpu_info_t
   3.277 +	movl r22=XSI_OFS
   3.278  	mov r24=PAGE_SHIFT<<2
   3.279 +	;; 
   3.280 +	add r22=r22,in3
   3.281  	;;
   3.282  	ptr.d	r22,r24
   3.283 -	;;
   3.284 +	or r23=loc7,r25			// construct PA | page properties
   3.285  	mov cr.itir=r24
   3.286  	mov cr.ifa=r22
   3.287 -	;;
   3.288 -	mov r25=IA64_TR_ARCH_INFO
   3.289 -	;;
   3.290 -	itr.d dtr[r25]=r23		// wire in new mapping...
   3.291 -	;;
   3.292 -
   3.293 -	//Purge/insert PAL TR
   3.294 -	mov r24=IA64_TR_PALCODE
   3.295 -	movl r25=PAGE_KERNEL
   3.296 +	mov r21=IA64_TR_ARCH_INFO
   3.297  	;;
   3.298 -	or loc8=r25,loc8
   3.299 +	itr.d dtr[r21]=r23		// wire in new mapping...
   3.300 +
   3.301 +	// Purge/insert PAL TR
   3.302 +	mov r24=IA64_TR_PALCODE
   3.303  	mov r23=IA64_GRANULE_SHIFT<<2
   3.304 -	;;
   3.305 -	ptr.i	in4,r23
   3.306 +	dep r25=0,loc5,60,4		// convert pal vaddr to paddr
   3.307  	;;
   3.308 +	ptr.i	loc5,r23
   3.309 +	or r25=r25,r26		// construct PA | page properties
   3.310  	mov cr.itir=r23
   3.311 -	mov cr.ifa=in4
   3.312 +	mov cr.ifa=loc5
   3.313  	;;
   3.314 -	itr.i itr[r24]=loc8
   3.315 -	;;
   3.316 +	itr.i itr[r24]=r25
   3.317  
   3.318  	// done, switch back to virtual and return
   3.319  	mov r16=loc3			// r16= original psr
   3.320 @@ -261,6 +179,7 @@ 1:
   3.321  	br.ret.sptk.many rp
   3.322  END(ia64_new_rr7)
   3.323  
   3.324 +#if 0 /* Not used */
   3.325  #include "minstate.h"
   3.326  
   3.327  GLOBAL_ENTRY(ia64_prepare_handle_privop)
   3.328 @@ -301,6 +220,7 @@ GLOBAL_ENTRY(ia64_prepare_handle_reflect
   3.329  	DO_LOAD_SWITCH_STACK
   3.330  	br.cond.sptk.many rp			// goes to ia64_leave_kernel
   3.331  END(ia64_prepare_handle_reflection)
   3.332 +#endif
   3.333  
   3.334  GLOBAL_ENTRY(__get_domain_bundle)
   3.335  	EX(.failure_in_get_bundle,ld8 r8=[r32],8)
   3.336 @@ -331,80 +251,9 @@ GLOBAL_ENTRY(dorfirfi)
   3.337          mov cr.ipsr=r17
   3.338          mov cr.ifs=r18
   3.339  	;;
   3.340 -        // fall through
   3.341 -END(dorfirfi)
   3.342 -
   3.343 -GLOBAL_ENTRY(dorfi)
   3.344          rfi
   3.345  	;;
   3.346 -END(dorfi)
   3.347 -
   3.348 -//
   3.349 -// Long's Peak UART Offsets
   3.350 -//
   3.351 -#define COM_TOP 0xff5e0000
   3.352 -#define COM_BOT 0xff5e2000
   3.353 -
   3.354 -// UART offsets	
   3.355 -#define UART_TX		0	/* Out: Transmit buffer (DLAB=0) */
   3.356 -#define UART_INT_ENB	1	/* interrupt enable (DLAB=0) */	
   3.357 -#define UART_INT_ID	2	/* Interrupt ID register */
   3.358 -#define UART_LINE_CTL	3	/* Line control register */
   3.359 -#define UART_MODEM_CTL	4	/* Modem Control Register */
   3.360 -#define UART_LSR	5	/* In:  Line Status Register */
   3.361 -#define UART_MSR	6	/* Modem status register */	
   3.362 -#define UART_DLATCH_LOW UART_TX
   3.363 -#define UART_DLATCH_HIGH UART_INT_ENB
   3.364 -#define COM1   0x3f8
   3.365 -#define COM2   0x2F8
   3.366 -#define COM3   0x3E8
   3.367 -
   3.368 -/* interrupt enable bits (offset 1) */
   3.369 -#define DATA_AVAIL_INT 1
   3.370 -#define XMIT_HOLD_EMPTY_INT 2
   3.371 -#define LINE_STAT_INT 4
   3.372 -#define MODEM_STAT_INT 8
   3.373 -
   3.374 -/* line status bits (offset 5) */
   3.375 -#define REC_DATA_READY 1
   3.376 -#define OVERRUN 2
   3.377 -#define PARITY_ERROR 4
   3.378 -#define FRAMING_ERROR 8
   3.379 -#define BREAK_INTERRUPT 0x10
   3.380 -#define XMIT_HOLD_EMPTY 0x20
   3.381 -#define XMIT_SHIFT_EMPTY 0x40
   3.382 -
   3.383 -// Write a single character
   3.384 -// input: r32 = character to be written
   3.385 -// output: none
   3.386 -GLOBAL_ENTRY(longs_peak_putc)	
   3.387 -	rsm psr.dt
   3.388 -        movl r16 = 0x8000000000000000 + COM_TOP + UART_LSR
   3.389 -	;;
   3.390 -	srlz.i
   3.391 -	;;
   3.392 -
   3.393 -.Chk_THRE_p:
   3.394 -        ld1.acq r18=[r16]
   3.395 -        ;;
   3.396 -	
   3.397 -	and r18 = XMIT_HOLD_EMPTY, r18
   3.398 -	;;
   3.399 -	cmp4.eq p6,p0=0,r18
   3.400 -	;;
   3.401 -	
   3.402 -(p6)    br .Chk_THRE_p
   3.403 -	;;
   3.404 -        movl r16 = 0x8000000000000000 + COM_TOP + UART_TX
   3.405 -	;;
   3.406 -	st1.rel [r16]=r32
   3.407 -	;;
   3.408 -	ssm psr.dt
   3.409 -	;;
   3.410 -	srlz.i
   3.411 -	;;
   3.412 -	br.ret.sptk.many b0
   3.413 -END(longs_peak_putc)	
   3.414 +END(dorfirfi)
   3.415  
   3.416  /* derived from linux/arch/ia64/hp/sim/boot/boot_head.S */
   3.417  GLOBAL_ENTRY(pal_emulator_static)
     4.1 --- a/xen/include/asm-ia64/domain.h	Wed May 10 15:29:48 2006 -0600
     4.2 +++ b/xen/include/asm-ia64/domain.h	Wed May 10 15:29:54 2006 -0600
     4.3 @@ -59,7 +59,6 @@ struct arch_domain {
     4.4  };
     4.5  #define xen_vastart arch.xen_vastart
     4.6  #define xen_vaend arch.xen_vaend
     4.7 -#define shared_info_va arch.shared_info_va
     4.8  #define INT_ENABLE_OFFSET(v) 		  \
     4.9      (sizeof(vcpu_info_t) * (v)->vcpu_id + \
    4.10      offsetof(vcpu_info_t, evtchn_upcall_mask))