ia64/xen-unstable

changeset 7731:ee15a2ae7f24

Fix problem if itlb miss occurs when in metaphysical mode
author djm@kirby.fc.hp.com
date Wed Nov 16 16:44:49 2005 -0600 (2005-11-16)
parents 5e142e1f41e6
children 36cea432bbed
files xen/arch/ia64/xen/vcpu.c
line diff
     1.1 --- a/xen/arch/ia64/xen/vcpu.c	Mon Nov 14 11:41:41 2005 -0600
     1.2 +++ b/xen/arch/ia64/xen/vcpu.c	Wed Nov 16 16:44:49 2005 -0600
     1.3 @@ -1290,12 +1290,12 @@ int warn_region0_address = 0; // FIXME l
     1.4  
     1.5  IA64FAULT vcpu_translate(VCPU *vcpu, UINT64 address, BOOLEAN is_data, UINT64 *pteval, UINT64 *itir, UINT64 *iha)
     1.6  {
     1.7 +	unsigned long region = address >> 61;
     1.8  	unsigned long pta, pte, rid, rr;
     1.9  	int i;
    1.10  	TR_ENTRY *trp;
    1.11  
    1.12 -	if (PSCB(vcpu,metaphysical_mode)) {
    1.13 -		unsigned long region = address >> 61;
    1.14 +	if (PSCB(vcpu,metaphysical_mode) && !(!is_data && region)) {
    1.15  		// dom0 may generate an uncacheable physical address (msb=1)
    1.16  		if (region && ((region != 4) || (vcpu->domain != dom0))) {
    1.17  // FIXME: This seems to happen even though it shouldn't.  Need to track
    1.18 @@ -1309,7 +1309,7 @@ IA64FAULT vcpu_translate(VCPU *vcpu, UIN
    1.19  		phys_translate_count++;
    1.20  		return IA64_NO_FAULT;
    1.21  	}
    1.22 -	else if (!(address >> 61) && warn_region0_address) {
    1.23 +	else if (!region && warn_region0_address) {
    1.24  		REGS *regs = vcpu_regs(vcpu);
    1.25  		unsigned long viip = PSCB(vcpu,iip);
    1.26  		unsigned long vipsr = PSCB(vcpu,ipsr);
    1.27 @@ -1318,7 +1318,7 @@ IA64FAULT vcpu_translate(VCPU *vcpu, UIN
    1.28  		printk("vcpu_translate: bad address %p, viip=%p, vipsr=%p, iip=%p, ipsr=%p continuing\n", address, viip, vipsr, iip, ipsr);
    1.29  	}
    1.30  
    1.31 -	rr = PSCB(vcpu,rrs)[address>>61];
    1.32 +	rr = PSCB(vcpu,rrs)[region];
    1.33  	rid = rr & RR_RID_MASK;
    1.34  	if (is_data) {
    1.35  		if (vcpu_quick_region_check(vcpu->arch.dtr_regions,address)) {