ia64/xen-unstable

changeset 15903:eae7b887e5ac

[IA64] Consolidate DELIVER_PSR_CLR and DELIVER_PSR_SET definition.

Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
author Alex Williamson <alex.williamson@hp.com>
date Thu Sep 27 09:16:23 2007 -0600 (2007-09-27)
parents 764d33505b98
children ee498c9af856
files xen/arch/ia64/xen/faults.c xen/arch/ia64/xen/hyperprivop.S xen/include/asm-ia64/xenkregs.h
line diff
     1.1 --- a/xen/arch/ia64/xen/faults.c	Thu Sep 27 09:08:26 2007 -0600
     1.2 +++ b/xen/arch/ia64/xen/faults.c	Thu Sep 27 09:16:23 2007 -0600
     1.3 @@ -38,18 +38,6 @@ extern void die_if_kernel(char *str, str
     1.4  extern int ia64_hyperprivop(unsigned long, REGS *);
     1.5  extern IA64FAULT ia64_hypercall(struct pt_regs *regs);
     1.6  
     1.7 -// note IA64_PSR_PK removed from following, why is this necessary?
     1.8 -#define	DELIVER_PSR_SET	(IA64_PSR_IC | IA64_PSR_I | \
     1.9 -			IA64_PSR_DT | IA64_PSR_RT | \
    1.10 -			IA64_PSR_IT | IA64_PSR_BN)
    1.11 -
    1.12 -#define	DELIVER_PSR_CLR	(IA64_PSR_AC | IA64_PSR_DFL | IA64_PSR_DFH |	\
    1.13 -			 IA64_PSR_SP | IA64_PSR_DI | IA64_PSR_SI |	\
    1.14 -			 IA64_PSR_DB | IA64_PSR_LP | IA64_PSR_TB |	\
    1.15 -			 IA64_PSR_CPL| IA64_PSR_MC | IA64_PSR_IS |	\
    1.16 -			 IA64_PSR_ID | IA64_PSR_DA | IA64_PSR_DD |	\
    1.17 -			 IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | IA64_PSR_IA)
    1.18 -
    1.19  extern void do_ssc(unsigned long ssc, struct pt_regs *regs);
    1.20  
    1.21  // should never panic domain... if it does, stack may have been overrun
     2.1 --- a/xen/arch/ia64/xen/hyperprivop.S	Thu Sep 27 09:08:26 2007 -0600
     2.2 +++ b/xen/arch/ia64/xen/hyperprivop.S	Thu Sep 27 09:16:23 2007 -0600
     2.3 @@ -56,22 +56,6 @@
     2.4  // doesn't appear to be include'able from assembly?
     2.5  #define IA64_TIMER_VECTOR 0xef
     2.6  
     2.7 -// Should be included from common header file (also in process.c)
     2.8 -//  NO PSR_CLR IS DIFFERENT! (CPL)
     2.9 -#define IA64_PSR_CPL1	(__IA64_UL(1) << IA64_PSR_CPL1_BIT)
    2.10 -#define IA64_PSR_CPL0	(__IA64_UL(1) << IA64_PSR_CPL0_BIT)
    2.11 -// note IA64_PSR_PK removed from following, why is this necessary?
    2.12 -#define	DELIVER_PSR_SET	(IA64_PSR_IC | IA64_PSR_I | \
    2.13 -			IA64_PSR_DT | IA64_PSR_RT | \
    2.14 -			IA64_PSR_IT | IA64_PSR_BN)
    2.15 -
    2.16 -#define	DELIVER_PSR_CLR	(IA64_PSR_AC | IA64_PSR_DFL | IA64_PSR_DFH | \
    2.17 -			IA64_PSR_SP | IA64_PSR_DI | IA64_PSR_SI |	\
    2.18 -			IA64_PSR_DB | IA64_PSR_LP | IA64_PSR_TB | \
    2.19 -			IA64_PSR_MC | IA64_PSR_IS | \
    2.20 -			IA64_PSR_ID | IA64_PSR_DA | IA64_PSR_DD | \
    2.21 -			IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | IA64_PSR_IA)
    2.22 -
    2.23  // Note: not hand-scheduled for now
    2.24  //  Registers at entry
    2.25  //	r16 == cr.isr
    2.26 @@ -250,7 +234,7 @@ ENTRY(hyper_ssm_i)
    2.27  	// set cr.ipsr
    2.28  	mov r29=r30
    2.29  	movl r28=DELIVER_PSR_SET
    2.30 -	movl r27=~DELIVER_PSR_CLR;;
    2.31 +	movl r27=~(DELIVER_PSR_CLR & (~IA64_PSR_CPL));;
    2.32  	and r29=r29,r27;;
    2.33  	or r29=r29,r28;;
    2.34  	// set hpsr_dfh to ipsr
    2.35 @@ -438,7 +422,7 @@ GLOBAL_ENTRY(fast_tick_reflect)
    2.36  	// set cr.ipsr (make sure cpl==2!)
    2.37  	mov r29=r17
    2.38  	movl r28=DELIVER_PSR_SET | (CONFIG_CPL0_EMUL << IA64_PSR_CPL0_BIT)
    2.39 -	movl r27=~(DELIVER_PSR_CLR|IA64_PSR_CPL0|IA64_PSR_CPL1);;
    2.40 +	movl r27=~DELIVER_PSR_CLR;;
    2.41  	and r29=r29,r27;;
    2.42  	or r29=r29,r28;;
    2.43  	mov cr.ipsr=r29;;
    2.44 @@ -611,7 +595,7 @@ ENTRY(fast_reflect)
    2.45  	mov r29=r30 ;;
    2.46  	ld8 r21=[r21]
    2.47  	movl r28=DELIVER_PSR_SET | (CONFIG_CPL0_EMUL << IA64_PSR_CPL0_BIT)
    2.48 -	movl r27=~(DELIVER_PSR_CLR|IA64_PSR_CPL0|IA64_PSR_CPL1);;
    2.49 +	movl r27=~DELIVER_PSR_CLR;;
    2.50  	and r29=r29,r27;;
    2.51  	or r29=r29,r28;;
    2.52  	// set hpsr_dfh to ipsr
    2.53 @@ -1269,7 +1253,7 @@ ENTRY(rfi_with_interrupt)
    2.54  	movl r22=THIS_CPU(current_psr_i_addr)
    2.55  	// set cr.ipsr (make sure cpl==2!)
    2.56  	mov r29=r17
    2.57 -	movl r27=~(DELIVER_PSR_CLR|IA64_PSR_CPL0|IA64_PSR_CPL1)
    2.58 +	movl r27=~DELIVER_PSR_CLR
    2.59  	movl r28=DELIVER_PSR_SET | (CONFIG_CPL0_EMUL << IA64_PSR_CPL0_BIT)
    2.60  	mov r20=1;;
    2.61  	ld8 r22=[r22]
     3.1 --- a/xen/include/asm-ia64/xenkregs.h	Thu Sep 27 09:08:26 2007 -0600
     3.2 +++ b/xen/include/asm-ia64/xenkregs.h	Thu Sep 27 09:16:23 2007 -0600
     3.3 @@ -17,6 +17,22 @@
     3.4  				 IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | \
     3.5  				 IA64_DCR_DR | IA64_DCR_DA | IA64_DCR_DD)
     3.6  
     3.7 +// note IA64_PSR_PK removed from following, why is this necessary?
     3.8 +#define	DELIVER_PSR_SET	(IA64_PSR_IC | IA64_PSR_I  |	\
     3.9 +			 IA64_PSR_DT | IA64_PSR_RT |	\
    3.10 +			 IA64_PSR_IT | IA64_PSR_BN)
    3.11 +
    3.12 +#define	DELIVER_PSR_CLR	(IA64_PSR_AC | IA64_PSR_DFL| IA64_PSR_DFH|	\
    3.13 +			 IA64_PSR_SP | IA64_PSR_DI | IA64_PSR_SI |	\
    3.14 +			 IA64_PSR_DB | IA64_PSR_LP | IA64_PSR_TB |	\
    3.15 +			 IA64_PSR_CPL| IA64_PSR_MC | IA64_PSR_IS |	\
    3.16 +			 IA64_PSR_ID | IA64_PSR_DA | IA64_PSR_DD |	\
    3.17 +			 IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED | IA64_PSR_IA)
    3.18 +
    3.19 +//  NO PSR_CLR IS DIFFERENT! (CPL)
    3.20 +#define IA64_PSR_CPL1	(__IA64_UL(1) << IA64_PSR_CPL1_BIT)
    3.21 +#define IA64_PSR_CPL0	(__IA64_UL(1) << IA64_PSR_CPL0_BIT)
    3.22 +
    3.23  /* Interruption Function State */
    3.24  #define IA64_IFS_V_BIT		63
    3.25  #define IA64_IFS_V	(__IA64_UL(1) << IA64_IFS_V_BIT)