ia64/xen-unstable

changeset 4781:ea463ddea885

bitkeeper revision 1.1389.5.23 (427b3dc4c8anY4S2HYLD7oWhGpg-bw)

Fix guest_ioapic_write() to properly set the irq_2_pin mapping.
Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Fri May 06 09:49:56 2005 +0000 (2005-05-06)
parents b2186544c8d4
children 09a27a50ad98
files xen/arch/x86/io_apic.c
line diff
     1.1 --- a/xen/arch/x86/io_apic.c	Fri May 06 08:24:37 2005 +0000
     1.2 +++ b/xen/arch/x86/io_apic.c	Fri May 06 09:49:56 2005 +0000
     1.3 @@ -313,46 +313,6 @@ static int __init find_isa_irq_pin(int i
     1.4   */
     1.5  static int pin_2_irq(int idx, int apic, int pin);
     1.6  
     1.7 -int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin)
     1.8 -{
     1.9 -	int apic, i, best_guess = -1;
    1.10 -
    1.11 -	Dprintk("querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n",
    1.12 -		bus, slot, pin);
    1.13 -	if ((mp_bus_id_to_pci_bus==NULL) || (mp_bus_id_to_pci_bus[bus] == -1)) {
    1.14 -		printk(KERN_WARNING "PCI BIOS passed nonexistent PCI bus %d!\n", bus);
    1.15 -		return -1;
    1.16 -	}
    1.17 -	for (i = 0; i < mp_irq_entries; i++) {
    1.18 -		int lbus = mp_irqs[i].mpc_srcbus;
    1.19 -
    1.20 -		for (apic = 0; apic < nr_ioapics; apic++)
    1.21 -			if (mp_ioapics[apic].mpc_apicid == mp_irqs[i].mpc_dstapic ||
    1.22 -			    mp_irqs[i].mpc_dstapic == MP_APIC_ALL)
    1.23 -				break;
    1.24 -
    1.25 -		if ((mp_bus_id_to_type[lbus] == MP_BUS_PCI) &&
    1.26 -		    !mp_irqs[i].mpc_irqtype &&
    1.27 -		    (bus == lbus) &&
    1.28 -		    (slot == ((mp_irqs[i].mpc_srcbusirq >> 2) & 0x1f))) {
    1.29 -			int irq = pin_2_irq(i,apic,mp_irqs[i].mpc_dstirq);
    1.30 -
    1.31 -			if (!(apic || IO_APIC_IRQ(irq)))
    1.32 -				continue;
    1.33 -
    1.34 -			if (pin == (mp_irqs[i].mpc_srcbusirq & 3))
    1.35 -				return irq;
    1.36 -			/*
    1.37 -			 * Use the first all-but-pin matching entry as a
    1.38 -			 * best-guess fuzzy result for broken mptables.
    1.39 -			 */
    1.40 -			if (best_guess < 0)
    1.41 -				best_guess = irq;
    1.42 -		}
    1.43 -	}
    1.44 -	return best_guess;
    1.45 -}
    1.46 -
    1.47  /*
    1.48   * EISA Edge/Level control register, ELCR
    1.49   */
    1.50 @@ -641,7 +601,6 @@ next:
    1.51  	IO_APIC_VECTOR(irq) = current_vector;
    1.52  
    1.53          vector_irq[current_vector] = irq;
    1.54 -        DPRINTK("vector_irq[%x] = %d\n", current_vector, irq);
    1.55  
    1.56  	return current_vector;
    1.57  }
    1.58 @@ -1670,8 +1629,7 @@ void __init setup_IO_APIC(void)
    1.59  	setup_IO_APIC_irqs();
    1.60  	init_IO_APIC_traps();
    1.61  	check_timer();
    1.62 -	if (!acpi_ioapic)
    1.63 -		print_IO_APIC();
    1.64 +	print_IO_APIC();
    1.65  }
    1.66  
    1.67  #endif /* CONFIG_X86_IO_APIC */
    1.68 @@ -1991,6 +1949,7 @@ int ioapic_guest_write(int apicid, int a
    1.69  {
    1.70      int apicenum, pin, irq;
    1.71      struct IO_APIC_route_entry rte = { 0 };
    1.72 +    struct irq_pin_list *entry;
    1.73      unsigned long flags;
    1.74  
    1.75      if ( (apicid >= NR_IOAPIC_BIOSIDS) ||
    1.76 @@ -2006,16 +1965,30 @@ int ioapic_guest_write(int apicid, int a
    1.77      rte.dest.logical.logical_dest = target_cpus();
    1.78      *(int *)&rte = val;
    1.79  
    1.80 -    /* Make sure we handle edge/level triggering correctly. */
    1.81 -    if ( !rte.mask )
    1.82 +    if ( rte.vector >= FIRST_DEVICE_VECTOR )
    1.83      {
    1.84 +        /* Is there a valid irq mapped to this vector? */
    1.85          irq = vector_irq[rte.vector];
    1.86          if ( !IO_APIC_IRQ(irq) )
    1.87              return 0;
    1.88 +
    1.89 +        /* Set the correct irq-handling type. */
    1.90          irq_desc[irq].handler = rte.trigger ? 
    1.91              &ioapic_level_irq_type: &ioapic_edge_irq_type;
    1.92 +
    1.93 +        /* Record the pin<->irq mapping. */
    1.94 +        for ( entry = &irq_2_pin[irq]; ; entry = &irq_2_pin[entry->next] )
    1.95 +        {
    1.96 +            if ( (entry->apic == apicenum) && (entry->pin == pin) )
    1.97 +                break;
    1.98 +            if ( !entry->next )
    1.99 +            {
   1.100 +                add_pin_to_irq(irq, apicenum, pin);
   1.101 +                break;
   1.102 +            }
   1.103 +        }
   1.104      }
   1.105 -    
   1.106 +
   1.107      spin_lock_irqsave(&ioapic_lock, flags);
   1.108      io_apic_write(apicenum, 0x10 + 2 * pin, *(((int *)&rte) + 0));
   1.109      io_apic_write(apicenum, 0x11 + 2 * pin, *(((int *)&rte) + 1));