ia64/xen-unstable

changeset 9152:e8fb817c4c15

Update microcode.c to linux-2.6.16-rc5 codebase.

Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Mon Mar 06 15:39:48 2006 +0100 (2006-03-06)
parents 941897e98591
children c4ac21dc3f16 085f0ad9018a
files xen/arch/x86/microcode.c xen/include/asm-x86/processor.h
line diff
     1.1 --- a/xen/arch/x86/microcode.c	Mon Mar 06 15:30:12 2006 +0100
     1.2 +++ b/xen/arch/x86/microcode.c	Mon Mar 06 15:39:48 2006 +0100
     1.3 @@ -116,7 +116,7 @@ MODULE_LICENSE("GPL");
     1.4  #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
     1.5  
     1.6  /* serialize access to the physical write to MSR 0x79 */
     1.7 -static spinlock_t microcode_update_lock = SPIN_LOCK_UNLOCKED;
     1.8 +static DEFINE_SPINLOCK(microcode_update_lock);
     1.9  
    1.10  /* no concurrent ->write()s are allowed on /dev/cpu/microcode */
    1.11  static DECLARE_MUTEX(microcode_sem);
    1.12 @@ -166,7 +166,8 @@ static void collect_cpu_info (void *unus
    1.13  	}
    1.14  
    1.15  	wrmsr(MSR_IA32_UCODE_REV, 0, 0);
    1.16 -	__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
    1.17 +	/* see notes above for revision 1.07.  Apparent chip bug */
    1.18 +	sync_core();
    1.19  	/* get the current revision from MSR 0x8B */
    1.20  	rdmsr(MSR_IA32_UCODE_REV, val[0], uci->rev);
    1.21  	pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
    1.22 @@ -366,7 +367,7 @@ static void do_update_one (void * unused
    1.23  	struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
    1.24  
    1.25  	if (uci->mc == NULL) {
    1.26 -		printk(KERN_INFO "microcode: No suitable data for CPU%d\n", cpu_num);
    1.27 +		printk(KERN_INFO "microcode: No new microcode data for CPU%d\n", cpu_num);
    1.28  		return;
    1.29  	}
    1.30  
    1.31 @@ -379,7 +380,9 @@ static void do_update_one (void * unused
    1.32  		(unsigned long) uci->mc->bits >> 16 >> 16);
    1.33  	wrmsr(MSR_IA32_UCODE_REV, 0, 0);
    1.34  
    1.35 -	__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
    1.36 +	/* see notes above for revision 1.07.  Apparent chip bug */
    1.37 +	sync_core();
    1.38 +
    1.39  	/* get the current revision from MSR 0x8B */
    1.40  	rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
    1.41  
     2.1 --- a/xen/include/asm-x86/processor.h	Mon Mar 06 15:30:12 2006 +0100
     2.2 +++ b/xen/include/asm-x86/processor.h	Mon Mar 06 15:39:48 2006 +0100
     2.3 @@ -353,6 +353,13 @@ static always_inline void clear_in_cr4 (
     2.4  	outb((data), 0x23); \
     2.5  } while (0)
     2.6  
     2.7 +/* Stop speculative execution */
     2.8 +static inline void sync_core(void)
     2.9 +{
    2.10 +    int tmp;
    2.11 +    asm volatile("cpuid" : "=a" (tmp) : "0" (1) : "ebx","ecx","edx","memory");
    2.12 +}
    2.13 +
    2.14  static always_inline void __monitor(const void *eax, unsigned long ecx,
    2.15  		unsigned long edx)
    2.16  {