ia64/xen-unstable

changeset 15158:dc227a849d02

[IA64] Clean-up in ivt.S: remove unused code and pack more.

Signed-off-by: Tristan Gingold <tgingold@free.fr>
author Alex Williamson <alex.williamson@hp.com>
date Mon Jun 04 14:10:30 2007 -0600 (2007-06-04)
parents e7295db88664
children ab677b67b4a5
files xen/arch/ia64/xen/ivt.S xen/arch/ia64/xen/mm_init.c
line diff
     1.1 --- a/xen/arch/ia64/xen/ivt.S	Mon Jun 04 14:03:42 2007 -0600
     1.2 +++ b/xen/arch/ia64/xen/ivt.S	Mon Jun 04 14:10:30 2007 -0600
     1.3 @@ -204,35 +204,6 @@ 2:
     1.4  #endif	
     1.5  	br.cond.sptk fast_tlb_miss_reflect
     1.6  	;;
     1.7 -dtlb_fault:
     1.8 -	mov r17=cr.iha				// get virtual address of L3 PTE
     1.9 -	movl r30=1f				// load nested fault 
    1.10 -						//   continuation point
    1.11 -	;;
    1.12 -1:	ld8 r18=[r17]				// read L3 PTE
    1.13 -	;;
    1.14 -	mov b0=r29
    1.15 -	tbit.z p6,p0=r18,_PAGE_P_BIT		// page present bit cleared?
    1.16 -(p6)	br.cond.spnt page_fault
    1.17 -	;;
    1.18 -	itc.d r18
    1.19 -	;;
    1.20 -#ifdef CONFIG_SMP
    1.21 -	/*
    1.22 -	 * Tell the assemblers dependency-violation checker that the above
    1.23 -	 * "itc" instructions cannot possibly affect the following loads:
    1.24 -	 */
    1.25 -	dv_serialize_data
    1.26 -
    1.27 -	ld8 r19=[r17]			// read L3 PTE again and see if same
    1.28 -	mov r20=PAGE_SHIFT<<2		// setup page size for purge
    1.29 -	;;
    1.30 -	cmp.ne p7,p0=r18,r19
    1.31 -	;;
    1.32 -(p7)	ptc.l r16,r20
    1.33 -#endif
    1.34 -	mov pr=r31,-1
    1.35 -	rfi
    1.36  END(dtlb_miss)
    1.37  
    1.38  	.org ia64_ivt+0x0c00
    1.39 @@ -248,17 +219,6 @@ late_alt_itlb_miss:
    1.40  	movl r17=PAGE_KERNEL
    1.41  	movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
    1.42  	;;
    1.43 -#ifdef CONFIG_DISABLE_VHPT
    1.44 -	shr.u r22=r16,61		// get the region number into r21
    1.45 -	;;
    1.46 -	cmp.gt p8,p0=6,r22		// user mode
    1.47 -	;;
    1.48 -(p8)	thash r17=r16
    1.49 -	;;
    1.50 -(p8)	mov cr.iha=r17
    1.51 -(p8)	mov r29=b0			// save b0
    1.52 -(p8)	br.cond.dptk .itlb_fault
    1.53 -#endif
    1.54  	extr.u r23=r21,IA64_PSR_CPL0_BIT,2	// extract psr.cpl
    1.55  	and r19=r19,r16		// clear ed, reserved bits, and PTE control bits
    1.56  	shr.u r18=r16,55	// move address bit 59 to bit 4
    1.57 @@ -290,17 +250,6 @@ late_alt_dtlb_miss:
    1.58  	mov r21=cr.ipsr
    1.59  	movl r19=(((1 << IA64_MAX_PHYS_BITS) - 1) & ~0xfff)
    1.60  	;;
    1.61 -#ifdef CONFIG_DISABLE_VHPT
    1.62 -	shr.u r22=r16,61			// get the region into r22
    1.63 -	;;
    1.64 -	cmp.gt p8,p0=6,r22			// access to region 0-5
    1.65 -	;;
    1.66 -(p8)	thash r17=r16
    1.67 -	;;
    1.68 -(p8)	mov cr.iha=r17
    1.69 -(p8)	mov r29=b0				// save b0
    1.70 -(p8)	br.cond.dptk dtlb_fault
    1.71 -#endif
    1.72  	extr.u r23=r21,IA64_PSR_CPL0_BIT,2	// extract psr.cpl
    1.73  	and r22=IA64_ISR_CODE_MASK,r20		// get the isr.code field
    1.74  	tbit.nz p6,p7=r20,IA64_ISR_SP_BIT	// is speculation bit on?
    1.75 @@ -419,6 +368,38 @@ ENTRY(nested_dtlb_miss)
    1.76  	;;
    1.77  END(nested_dtlb_miss)
    1.78  
    1.79 +GLOBAL_ENTRY(dispatch_reflection)
    1.80 +	/*
    1.81 +	 * Input:
    1.82 +	 *	psr.ic:	off
    1.83 +	 *	r19:	intr type (offset into ivt, see ia64_int.h)
    1.84 +	 *	r31:	contains saved predicates (pr)
    1.85 +	 */
    1.86 +	SAVE_MIN_WITH_COVER_R19
    1.87 +	alloc r14=ar.pfs,0,0,5,0
    1.88 +	mov out4=r15
    1.89 +	mov out0=cr.ifa
    1.90 +	adds out1=16,sp
    1.91 +	mov out2=cr.isr
    1.92 +	mov out3=cr.iim
    1.93 +//	mov out3=cr.itir		// TODO: why commented out?
    1.94 +
    1.95 +	ssm psr.ic | PSR_DEFAULT_BITS
    1.96 +	;;
    1.97 +	srlz.i				// guarantee that interruption 
    1.98 +					//   collection is on
    1.99 +	;;
   1.100 +(p15)	ssm psr.i			// restore psr.i
   1.101 +	adds r3=8,r2			// set up second base pointer
   1.102 +	;;
   1.103 +	SAVE_REST
   1.104 +	movl r14=ia64_leave_kernel
   1.105 +	;;
   1.106 +	mov rp=r14
   1.107 +//	br.sptk.many ia64_prepare_handle_reflection // TODO: why commented out?
   1.108 +    	br.call.sptk.many b6=ia64_handle_reflection
   1.109 +END(dispatch_reflection)
   1.110 +
   1.111  	.org ia64_ivt+0x1800
   1.112  //////////////////////////////////////////////////////////////////////////
   1.113  // 0x1800 Entry 6 (size 64 bundles) Instruction Key Miss (24)
   1.114 @@ -465,6 +446,16 @@ ENTRY(dkey_miss)
   1.115  	FAULT_OR_REFLECT(7)
   1.116  END(dkey_miss)
   1.117  
   1.118 +	
   1.119 +#define SAVE_MIN_COVER_DONE	DO_SAVE_MIN(,mov r30=cr.ifs,)
   1.120 +
   1.121 +// same as dispatch_break_fault except cover has already been done
   1.122 +GLOBAL_ENTRY(dispatch_slow_hyperprivop)
   1.123 +	SAVE_MIN_COVER_DONE
   1.124 +	;;
   1.125 +	br.sptk.many dispatch_break_fault_post_save
   1.126 +END(dispatch_slow_hyperprivop)
   1.127 +
   1.128  	.org ia64_ivt+0x2000
   1.129  //////////////////////////////////////////////////////////////////////////
   1.130  // 0x2000 Entry 8 (size 64 bundles) Dirty-bit (54)
   1.131 @@ -600,7 +591,7 @@ ENTRY(break_fault)
   1.132  	// and it can have no memory accesses unless they are to pinned
   1.133  	// addresses!
   1.134  	mov r19= cr.ipsr
   1.135 -	movl r20=HYPERPRIVOP_START
   1.136 +	mov r20=HYPERPRIVOP_START
   1.137  	mov r21=HYPERPRIVOP_MAX
   1.138  	;;
   1.139  	sub r20=r17,r20
   1.140 @@ -1244,11 +1235,7 @@ END(disabled_fp_reg)
   1.141  // 0x5600 Entry 26 (size 16 bundles) Nat Consumption (11,23,37,50)
   1.142  ENTRY(nat_consumption)
   1.143  	DBG_FAULT(26)
   1.144 -#ifdef XEN
   1.145  	FAULT_OR_REFLECT(26)
   1.146 -#else
   1.147 -	FAULT(26)
   1.148 -#endif
   1.149  END(nat_consumption)
   1.150  
   1.151  	.org ia64_ivt+0x5700
   1.152 @@ -1529,43 +1516,3 @@ END(ia32_interrupt)
   1.153  	FAULT(67)
   1.154  
   1.155  	.org ia64_ivt+0x8000
   1.156 -GLOBAL_ENTRY(dispatch_reflection)
   1.157 -	/*
   1.158 -	 * Input:
   1.159 -	 *	psr.ic:	off
   1.160 -	 *	r19:	intr type (offset into ivt, see ia64_int.h)
   1.161 -	 *	r31:	contains saved predicates (pr)
   1.162 -	 */
   1.163 -	SAVE_MIN_WITH_COVER_R19
   1.164 -	alloc r14=ar.pfs,0,0,5,0
   1.165 -	mov out4=r15
   1.166 -	mov out0=cr.ifa
   1.167 -	adds out1=16,sp
   1.168 -	mov out2=cr.isr
   1.169 -	mov out3=cr.iim
   1.170 -//	mov out3=cr.itir		// TODO: why commented out?
   1.171 -
   1.172 -	ssm psr.ic | PSR_DEFAULT_BITS
   1.173 -	;;
   1.174 -	srlz.i				// guarantee that interruption 
   1.175 -					//   collection is on
   1.176 -	;;
   1.177 -(p15)	ssm psr.i			// restore psr.i
   1.178 -	adds r3=8,r2			// set up second base pointer
   1.179 -	;;
   1.180 -	SAVE_REST
   1.181 -	movl r14=ia64_leave_kernel
   1.182 -	;;
   1.183 -	mov rp=r14
   1.184 -//	br.sptk.many ia64_prepare_handle_reflection // TODO: why commented out?
   1.185 -    	br.call.sptk.many b6=ia64_handle_reflection
   1.186 -END(dispatch_reflection)
   1.187 -
   1.188 -#define SAVE_MIN_COVER_DONE	DO_SAVE_MIN(,mov r30=cr.ifs,)
   1.189 -
   1.190 -// same as dispatch_break_fault except cover has already been done
   1.191 -GLOBAL_ENTRY(dispatch_slow_hyperprivop)
   1.192 -	SAVE_MIN_COVER_DONE
   1.193 -	;;
   1.194 -	br.sptk.many dispatch_break_fault_post_save
   1.195 -END(dispatch_slow_hyperprivop)
     2.1 --- a/xen/arch/ia64/xen/mm_init.c	Mon Jun 04 14:03:42 2007 -0600
     2.2 +++ b/xen/arch/ia64/xen/mm_init.c	Mon Jun 04 14:10:30 2007 -0600
     2.3 @@ -22,18 +22,9 @@ void __devinit
     2.4  ia64_mmu_init (void *my_cpu_data)
     2.5  {
     2.6  	unsigned long psr, impl_va_bits;
     2.7 -#if 0
     2.8 -	unsigned long pta;
     2.9 -#endif
    2.10  	extern void __devinit tlb_init (void);
    2.11  	int cpu;
    2.12  
    2.13 -#ifdef CONFIG_DISABLE_VHPT
    2.14 -#	define VHPT_ENABLE_BIT	0
    2.15 -#else
    2.16 -#	define VHPT_ENABLE_BIT	1
    2.17 -#endif
    2.18 -
    2.19  	/* Pin mapping for percpu area into TLB */
    2.20  	psr = ia64_clear_ic();
    2.21  	ia64_itr(0x2, IA64_TR_PERCPU_DATA, PERCPU_ADDR,
    2.22 @@ -74,21 +65,6 @@ ia64_mmu_init (void *my_cpu_data)
    2.23  #ifdef XEN
    2.24  	vhpt_init();
    2.25  #endif
    2.26 -#if 0
    2.27 -	/* place the VMLPT at the end of each page-table mapped region: */
    2.28 -	pta = POW2(61) - POW2(vmlpt_bits);
    2.29 -
    2.30 -	if (POW2(mapped_space_bits) >= pta)
    2.31 -		panic("mm/init: overlap between virtually mapped linear page table and "
    2.32 -		      "mapped kernel space!");
    2.33 -	/*
    2.34 -	 * Set the (virtually mapped linear) page table address.  Bit
    2.35 -	 * 8 selects between the short and long format, bits 2-7 the
    2.36 -	 * size of the table, and bit 0 whether the VHPT walker is
    2.37 -	 * enabled.
    2.38 -	 */
    2.39 -	ia64_set_pta(pta | (0 << 8) | (vmlpt_bits << 2) | VHPT_ENABLE_BIT);
    2.40 -#endif
    2.41  	ia64_tlb_init();
    2.42  
    2.43  #ifdef	CONFIG_HUGETLB_PAGE