ia64/xen-unstable

changeset 17133:daf39fc8038a

[IA64] Updating collision chain length in VHPT is not necessary

Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
author Alex Williamson <alex.williamson@hp.com>
date Wed Feb 27 13:08:59 2008 -0700 (2008-02-27)
parents f97a0b6152c3
children 0b20ac6ec64a
files xen/arch/ia64/vmx/vmx_ivt.S xen/arch/ia64/vmx/vtlb.c xen/include/asm-ia64/vmmu.h
line diff
     1.1 --- a/xen/arch/ia64/vmx/vmx_ivt.S	Tue Feb 26 10:12:04 2008 -0700
     1.2 +++ b/xen/arch/ia64/vmx/vmx_ivt.S	Wed Feb 27 13:08:59 2008 -0700
     1.3 @@ -181,25 +181,22 @@ vmx_itlb_loop:
     1.4      // Swap the first entry with the entry found in the collision chain
     1.5      // to speed up next hardware search (and keep LRU).
     1.6      // In comments 1 stands for the first entry and 2 for the found entry.
     1.7 -    ld8 r25 = [r17] // Read value of 2
     1.8 -    ld8 r27 = [r18] // Read value of 1
     1.9      ld8 r29 = [r28] // Read tag of 1
    1.10      dep r22 = -1,r24,63,1    // set ti=1 of 2 (to disable it during the swap)
    1.11      ;;
    1.12 +    ld8 r25 = [r17] // Read value of 2
    1.13 +    ld8 r27 = [r18] // Read value of 1
    1.14      st8 [r16] = r29, VLE_ITIR_OFFSET - VLE_TITAG_OFFSET // Write tag of 2
    1.15      st8 [r28] = r22, VLE_ITIR_OFFSET - VLE_TITAG_OFFSET // Write tag of 1
    1.16 -    extr.u r19 = r27, 56, 4 // Extract collision chain length
    1.17      mf
    1.18      ;;
    1.19      ld8 r29 = [r16] // read itir of 2
    1.20      ld8 r22 = [r28] // read itir of 1
    1.21 -    dep r27 = r0, r27, 56, 4 // Clear collision chain length for 2
    1.22 -    dep r25 = r19, r25, 56, 4 // Write collision chain length for 1
    1.23 +    st8 [r18] = r25 // Write value of 1
    1.24 +    st8 [r17] = r27 // Write value of 2
    1.25      ;;
    1.26      st8 [r16] = r22 // Write itir of 2
    1.27      st8 [r28] = r29, VLE_TITAG_OFFSET - VLE_ITIR_OFFSET // write itir of 1
    1.28 -    st8 [r18] = r25 // Write value of 1
    1.29 -    st8 [r17] = r27 // Write value of 2
    1.30      ;;
    1.31      st8.rel [r28] = r24 // Write tag of 1 (with ti=0)
    1.32      // Insert the translation entry
    1.33 @@ -264,25 +261,22 @@ vmx_dtlb_loop:
    1.34  (p7)mov r17 = r23;
    1.35  (p7)br.sptk vmx_dtlb_loop
    1.36      ;;
    1.37 -    ld8 r25 = [r17]
    1.38 -    ld8 r27 = [r18]
    1.39      ld8 r29 = [r28]
    1.40      dep r22 = -1,r24,63,1    //set ti=1
    1.41      ;;
    1.42 +    ld8 r25 = [r17]
    1.43 +    ld8 r27 = [r18]
    1.44      st8 [r16] = r29, VLE_ITIR_OFFSET - VLE_TITAG_OFFSET
    1.45      st8 [r28] = r22, VLE_ITIR_OFFSET - VLE_TITAG_OFFSET
    1.46 -    extr.u r19 = r27, 56, 4
    1.47      mf
    1.48      ;;
    1.49      ld8 r29 = [r16]
    1.50      ld8 r22 = [r28]
    1.51 -    dep r27 = r0, r27, 56, 4
    1.52 -    dep r25 = r19, r25, 56, 4
    1.53 +    st8 [r18] = r25
    1.54 +    st8 [r17] = r27
    1.55      ;;
    1.56      st8 [r16] = r22
    1.57      st8 [r28] = r29, VLE_TITAG_OFFSET - VLE_ITIR_OFFSET
    1.58 -    st8 [r18] = r25
    1.59 -    st8 [r17] = r27
    1.60      ;;
    1.61      st8.rel [r28] = r24 
    1.62      itc.d r25
     2.1 --- a/xen/arch/ia64/vmx/vtlb.c	Tue Feb 26 10:12:04 2008 -0700
     2.2 +++ b/xen/arch/ia64/vmx/vtlb.c	Wed Feb 27 13:08:59 2008 -0700
     2.3 @@ -112,25 +112,19 @@ static thash_data_t *__vtr_lookup(VCPU *
     2.4      return NULL;
     2.5  }
     2.6  
     2.7 -static void thash_recycle_cch(thash_cb_t *hcb, thash_data_t *hash)
     2.8 +static void thash_recycle_cch(thash_cb_t *hcb, thash_data_t *hash,
     2.9 +                              thash_data_t *tail)
    2.10  {
    2.11 -    thash_data_t *p, *q;
    2.12 -    int i = 0;
    2.13 -     
    2.14 -    p = hash;
    2.15 -    for (i = 0; i < MAX_CCN_DEPTH; i++) {
    2.16 -        p = p->next;
    2.17 -    }
    2.18 -    q = hash->next;
    2.19 -    hash->len = 0;
    2.20 +    thash_data_t *head = hash->next;
    2.21 +
    2.22      hash->next = 0;
    2.23 -    p->next = hcb->cch_freelist;
    2.24 -    hcb->cch_freelist = q;
    2.25 +    tail->next = hcb->cch_freelist;
    2.26 +    hcb->cch_freelist = head;
    2.27  }
    2.28  
    2.29  static void vmx_vhpt_insert(thash_cb_t *hcb, u64 pte, u64 itir, u64 ifa)
    2.30  {
    2.31 -    u64 tag;
    2.32 +    u64 tag, len;
    2.33      ia64_rr rr;
    2.34      thash_data_t *head, *cch;
    2.35  
    2.36 @@ -139,39 +133,35 @@ static void vmx_vhpt_insert(thash_cb_t *
    2.37      head = (thash_data_t *)ia64_thash(ifa);
    2.38      tag = ia64_ttag(ifa);
    2.39  
    2.40 -    /* Find a free (ie invalid) entry.  */
    2.41 -    cch = head;
    2.42 -    while (cch) {    
    2.43 -        if (INVALID_VHPT(cch))
    2.44 -            break;
    2.45 -        cch = cch->next;
    2.46 -    }
    2.47 -    if (cch) {
    2.48 +    if (!INVALID_VHPT(head)) {
    2.49 +        /* Find a free (ie invalid) entry.  */
    2.50 +        len = 0;
    2.51 +        cch = head;
    2.52 +        do {
    2.53 +            ++len;
    2.54 +            if (cch->next == NULL) {
    2.55 +                if (len >= MAX_CCN_DEPTH) {
    2.56 +                    thash_recycle_cch(hcb, head, cch);
    2.57 +                    cch = cch_alloc(hcb);
    2.58 +                } else {
    2.59 +                    cch = __alloc_chain(hcb);
    2.60 +                }
    2.61 +                cch->next = head->next;
    2.62 +                head->next = cch;
    2.63 +                break;
    2.64 +            }
    2.65 +            cch = cch->next;
    2.66 +        } while (!INVALID_VHPT(cch));
    2.67 +
    2.68          /* As we insert in head, copy head.  */
    2.69 -        if (cch != head) {
    2.70 -            local_irq_disable();
    2.71 -            cch->page_flags = head->page_flags;
    2.72 -            cch->itir = head->itir;
    2.73 -            cch->etag = head->etag;
    2.74 -            head->ti = 1;
    2.75 -            local_irq_enable();
    2.76 -        }
    2.77 -    } else {
    2.78 -        if (head->len >= MAX_CCN_DEPTH) {
    2.79 -            thash_recycle_cch(hcb, head);
    2.80 -            cch = cch_alloc(hcb);
    2.81 -        } else {
    2.82 -            cch = __alloc_chain(hcb);
    2.83 -        }
    2.84          local_irq_disable();
    2.85 -        *cch = *head;
    2.86 +        cch->page_flags = head->page_flags;
    2.87 +        cch->itir = head->itir;
    2.88 +        cch->etag = head->etag;
    2.89          head->ti = 1;
    2.90 -        head->next = cch;
    2.91 -        head->len = cch->len + 1;
    2.92 -        cch->len = 0;
    2.93          local_irq_enable();
    2.94      }
    2.95 -    //here head is invalid
    2.96 +    /* here head is invalid. */
    2.97      wmb();
    2.98      head->page_flags=pte;
    2.99      head->itir = rr.ps << 2;
   2.100 @@ -263,8 +253,6 @@ thash_data_t * vhpt_lookup(u64 va)
   2.101          hash->itir = head->itir;
   2.102          head->itir = itir;
   2.103  
   2.104 -        head->len = hash->len;
   2.105 -        hash->len = 0;
   2.106          return head;
   2.107      }
   2.108      return hash;
   2.109 @@ -387,7 +375,6 @@ void thash_recycle_cch_all(thash_cb_t *h
   2.110      head = hcb->hash;
   2.111      num = (hcb->hash_sz/sizeof(thash_data_t));
   2.112      do {
   2.113 -        head->len = 0;
   2.114          head->next = 0;
   2.115          head++;
   2.116          num--;
   2.117 @@ -419,7 +406,7 @@ static thash_data_t *__alloc_chain(thash
   2.118   */
   2.119  static void vtlb_insert(VCPU *v, u64 pte, u64 itir, u64 va)
   2.120  {
   2.121 -    thash_data_t *hash_table, *cch;
   2.122 +    thash_data_t *hash_table, *cch, *tail;
   2.123      /* int flag; */
   2.124      ia64_rr vrr;
   2.125      /* u64 gppn, ppns, ppne; */
   2.126 @@ -432,20 +419,21 @@ static void vtlb_insert(VCPU *v, u64 pte
   2.127      vrr.ps = itir_ps(itir);
   2.128      VMX(v, psbits[va >> 61]) |= (1UL << vrr.ps);
   2.129      hash_table = vtlb_thash(hcb->pta, va, vrr.rrval, &tag);
   2.130 +    len = 0;
   2.131      cch = hash_table;
   2.132 -    while (cch) {
   2.133 +    do {
   2.134          if (INVALID_TLB(cch)) {
   2.135 -            len = cch->len;
   2.136              cch->page_flags = pte;
   2.137 -            cch->len = len;
   2.138              cch->itir = itir;
   2.139              cch->etag = tag;
   2.140              return;
   2.141          }
   2.142 +        ++len;
   2.143 +        tail = cch;
   2.144          cch = cch->next;
   2.145 -    }
   2.146 -    if (hash_table->len >= MAX_CCN_DEPTH) {
   2.147 -        thash_recycle_cch(hcb, hash_table);
   2.148 +    } while(cch);
   2.149 +    if (len >= MAX_CCN_DEPTH) {
   2.150 +        thash_recycle_cch(hcb, hash_table, tail);
   2.151          cch = cch_alloc(hcb);
   2.152      }
   2.153      else {
   2.154 @@ -457,7 +445,6 @@ static void vtlb_insert(VCPU *v, u64 pte
   2.155      cch->next = hash_table->next;
   2.156      wmb();
   2.157      hash_table->next = cch;
   2.158 -    hash_table->len += 1;
   2.159      return;
   2.160  }
   2.161  
     3.1 --- a/xen/include/asm-ia64/vmmu.h	Tue Feb 26 10:12:04 2008 -0700
     3.2 +++ b/xen/include/asm-ia64/vmmu.h	Wed Feb 27 13:08:59 2008 -0700
     3.3 @@ -70,17 +70,6 @@ typedef struct thash_data {
     3.4              u64 ed   :  1; // 52
     3.5              u64 ig1  :  3; // 53-63
     3.6          };
     3.7 -        struct {
     3.8 -            u64 __rv1 : 53;     // 0-52
     3.9 -            u64 contiguous : 1; //53
    3.10 -            u64 tc : 1;         // 54 TR or TC
    3.11 -            u64 cl : 1;         // 55 I side or D side cache line
    3.12 -            u64 len  :  4;      // 56-59
    3.13 -            u64 io  : 1;	// 60 entry is for io or not
    3.14 -            u64 nomap : 1;      // 61 entry cann't be inserted into machine TLB.
    3.15 -            u64 checked : 1;    // 62 for VTLB/VHPT sanity check
    3.16 -            u64 invalid : 1;    // 63 invalid entry
    3.17 -        };
    3.18          u64 page_flags;
    3.19      };                  // same for VHPT and TLB
    3.20