ia64/xen-unstable

changeset 12063:d93280670c3f

[HVM] Add support for 'add r8,m8' instruction to memory-mapped I/O.
Signed-off-by: Kevin Tronkowski <ktronkowski@virtualiron.com>
Signed-off-by: Ben Thomas <bthomas@virtualiron.com>
author kfraser@localhost.localdomain
date Tue Oct 31 16:22:39 2006 +0000 (2006-10-31)
parents b6de59741161
children 2db4388fecb9
files tools/ioemu/target-i386-dm/helper2.c xen/arch/x86/hvm/intercept.c xen/arch/x86/hvm/io.c xen/arch/x86/hvm/platform.c xen/include/asm-x86/hvm/io.h xen/include/public/hvm/ioreq.h
line diff
     1.1 --- a/tools/ioemu/target-i386-dm/helper2.c	Tue Oct 31 16:18:07 2006 +0000
     1.2 +++ b/tools/ioemu/target-i386-dm/helper2.c	Tue Oct 31 16:22:39 2006 +0000
     1.3 @@ -393,6 +393,21 @@ void cpu_ioreq_and(CPUState *env, ioreq_
     1.4      req->u.data = tmp1;
     1.5  }
     1.6  
     1.7 +void cpu_ioreq_add(CPUState *env, ioreq_t *req)
     1.8 +{
     1.9 +    unsigned long tmp1, tmp2;
    1.10 +
    1.11 +    if (req->pdata_valid != 0)
    1.12 +        hw_error("expected scalar value");
    1.13 +
    1.14 +    read_physical(req->addr, req->size, &tmp1);
    1.15 +    if (req->dir == IOREQ_WRITE) {
    1.16 +        tmp2 = tmp1 + (unsigned long) req->u.data;
    1.17 +        write_physical(req->addr, req->size, &tmp2);
    1.18 +    }
    1.19 +    req->u.data = tmp1;
    1.20 +}
    1.21 +
    1.22  void cpu_ioreq_or(CPUState *env, ioreq_t *req)
    1.23  {
    1.24      unsigned long tmp1, tmp2;
    1.25 @@ -438,6 +453,9 @@ void __handle_ioreq(CPUState *env, ioreq
    1.26      case IOREQ_TYPE_AND:
    1.27          cpu_ioreq_and(env, req);
    1.28          break;
    1.29 +    case IOREQ_TYPE_ADD:
    1.30 +        cpu_ioreq_add(env, req);
    1.31 +        break;
    1.32      case IOREQ_TYPE_OR:
    1.33          cpu_ioreq_or(env, req);
    1.34          break;
     2.1 --- a/xen/arch/x86/hvm/intercept.c	Tue Oct 31 16:18:07 2006 +0000
     2.2 +++ b/xen/arch/x86/hvm/intercept.c	Tue Oct 31 16:22:39 2006 +0000
     2.3 @@ -109,6 +109,15 @@ static inline void hvm_mmio_access(struc
     2.4          p->u.data = tmp1;
     2.5          break;
     2.6  
     2.7 +    case IOREQ_TYPE_ADD:
     2.8 +        tmp1 = read_handler(v, p->addr, p->size);
     2.9 +        if (p->dir == IOREQ_WRITE) {
    2.10 +            tmp2 = tmp1 + (unsigned long) p->u.data;
    2.11 +            write_handler(v, p->addr, p->size, tmp2);
    2.12 +        }
    2.13 +        p->u.data = tmp1;
    2.14 +        break;
    2.15 +
    2.16      case IOREQ_TYPE_OR:
    2.17          tmp1 = read_handler(v, p->addr, p->size);
    2.18          if ( p->dir == IOREQ_WRITE ) {
     3.1 --- a/xen/arch/x86/hvm/io.c	Tue Oct 31 16:18:07 2006 +0000
     3.2 +++ b/xen/arch/x86/hvm/io.c	Tue Oct 31 16:22:39 2006 +0000
     3.3 @@ -532,6 +532,21 @@ static void hvm_mmio_assist(struct cpu_u
     3.4              set_reg_value(size, index, 0, regs, diff);
     3.5          }
     3.6  
     3.7 +    case INSTR_ADD:
     3.8 +        if (src & REGISTER) {
     3.9 +            index = operand_index(src);
    3.10 +            value = get_reg_value(size, index, 0, regs);
    3.11 +            diff = (unsigned long) p->u.data + value;
    3.12 +        } else if (src & IMMEDIATE) {
    3.13 +            value = mmio_opp->immediate;
    3.14 +            diff = (unsigned long) p->u.data + value;
    3.15 +        } else if (src & MEMORY) {
    3.16 +            index = operand_index(dst);
    3.17 +            value = get_reg_value(size, index, 0, regs);
    3.18 +            diff = (unsigned long) p->u.data + value;
    3.19 +            set_reg_value(size, index, 0, regs, diff);
    3.20 +        }
    3.21 +
    3.22          /*
    3.23           * The OF and CF flags are cleared; the SF, ZF, and PF
    3.24           * flags are set according to the result. The state of
     4.1 --- a/xen/arch/x86/hvm/platform.c	Tue Oct 31 16:18:07 2006 +0000
     4.2 +++ b/xen/arch/x86/hvm/platform.c	Tue Oct 31 16:22:39 2006 +0000
     4.3 @@ -370,6 +370,13 @@ static int hvm_decode(int realmode, unsi
     4.4      /* the operands order in comments conforms to AT&T convention */
     4.5  
     4.6      switch ( *opcode ) {
     4.7 +
     4.8 +    case 0x00: /* add r8, m8 */
     4.9 +        mmio_op->instr = INSTR_ADD;
    4.10 +        *op_size = BYTE;
    4.11 +        GET_OP_SIZE_FOR_BYTE(size_reg);
    4.12 +        return reg_mem(size_reg, opcode, mmio_op, rex);
    4.13 +
    4.14      case 0x0A: /* or m8, r8 */
    4.15          mmio_op->instr = INSTR_OR;
    4.16          *op_size = BYTE;
    4.17 @@ -1040,6 +1047,10 @@ void handle_mmio(unsigned long gpa)
    4.18          mmio_operands(IOREQ_TYPE_AND, gpa, mmio_op, op_size);
    4.19          break;
    4.20  
    4.21 +    case INSTR_ADD:
    4.22 +        mmio_operands(IOREQ_TYPE_ADD, gpa, mmio_op, op_size);
    4.23 +        break;
    4.24 +
    4.25      case INSTR_XOR:
    4.26          mmio_operands(IOREQ_TYPE_XOR, gpa, mmio_op, op_size);
    4.27          break;
     5.1 --- a/xen/include/asm-x86/hvm/io.h	Tue Oct 31 16:18:07 2006 +0000
     5.2 +++ b/xen/include/asm-x86/hvm/io.h	Tue Oct 31 16:22:39 2006 +0000
     5.3 @@ -64,6 +64,7 @@
     5.4  #define INSTR_BT    13
     5.5  #define INSTR_XCHG  14
     5.6  #define INSTR_SUB   15
     5.7 +#define INSTR_ADD   16
     5.8  
     5.9  #define MAX_INST_LEN      15 /* Maximum instruction length = 15 bytes */
    5.10  
     6.1 --- a/xen/include/public/hvm/ioreq.h	Tue Oct 31 16:18:07 2006 +0000
     6.2 +++ b/xen/include/public/hvm/ioreq.h	Tue Oct 31 16:22:39 2006 +0000
     6.3 @@ -34,6 +34,7 @@
     6.4  #define IOREQ_TYPE_OR           3
     6.5  #define IOREQ_TYPE_XOR          4
     6.6  #define IOREQ_TYPE_XCHG         5
     6.7 +#define IOREQ_TYPE_ADD          6
     6.8  
     6.9  /*
    6.10   * VMExit dispatcher should cooperate with instruction decoder to