ia64/xen-unstable

changeset 17068:d8fbfd8ef184

[IA64] Cleanup vmx_vcpu.h

Make fault injection routines static inline for efficiency.
Remove unused definitions.

Signed-off-by: Kouya Shimura <kouya@jp.fujitsu.com>
author Alex Williamson <alex.williamson@hp.com>
date Thu Feb 14 12:20:11 2008 -0700 (2008-02-14)
parents 8e89261a8308
children 29faad225cbb
files xen/arch/ia64/vmx/vmx_fault.c xen/arch/ia64/vmx/vmx_interrupt.c xen/include/asm-ia64/vmx.h xen/include/asm-ia64/vmx_vcpu.h
line diff
     1.1 --- a/xen/arch/ia64/vmx/vmx_fault.c	Thu Feb 14 11:50:55 2008 -0700
     1.2 +++ b/xen/arch/ia64/vmx/vmx_fault.c	Thu Feb 14 12:20:11 2008 -0700
     1.3 @@ -56,11 +56,6 @@
     1.4  /* reset all PSR field to 0, except up,mfl,mfh,pk,dt,rt,mc,it */
     1.5  #define INITIAL_PSR_VALUE_AT_INTERRUPTION 0x0000001808028034
     1.6  
     1.7 -
     1.8 -extern void rnat_consumption (VCPU *vcpu);
     1.9 -extern void alt_itlb (VCPU *vcpu, u64 vadr);
    1.10 -extern void itlb_fault (VCPU *vcpu, u64 vadr);
    1.11 -extern void ivhpt_fault (VCPU *vcpu, u64 vadr);
    1.12  extern unsigned long handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr);
    1.13  
    1.14  #define DOMN_PAL_REQUEST    0x110000
     2.1 --- a/xen/arch/ia64/vmx/vmx_interrupt.c	Thu Feb 14 11:50:55 2008 -0700
     2.2 +++ b/xen/arch/ia64/vmx/vmx_interrupt.c	Thu Feb 14 12:20:11 2008 -0700
     2.3 @@ -112,314 +112,3 @@ inject_guest_interruption(VCPU *vcpu, u6
     2.4      debugger_event(vec == IA64_EXTINT_VECTOR ?
     2.5                     XEN_IA64_DEBUG_ON_EXTINT : XEN_IA64_DEBUG_ON_EXCEPT);
     2.6  }
     2.7 -
     2.8 -
     2.9 -/*
    2.10 - * Set vIFA & vITIR & vIHA, when vPSR.ic =1
    2.11 - * Parameter:
    2.12 - *  set_ifa: if true, set vIFA
    2.13 - *  set_itir: if true, set vITIR
    2.14 - *  set_iha: if true, set vIHA
    2.15 - */
    2.16 -void
    2.17 -set_ifa_itir_iha (VCPU *vcpu, u64 vadr,
    2.18 -          int set_ifa, int set_itir, int set_iha)
    2.19 -{
    2.20 -    IA64_PSR vpsr;
    2.21 -    u64 value;
    2.22 -    vpsr.val = VCPU(vcpu, vpsr);
    2.23 -    /* Vol2, Table 8-1 */
    2.24 -    if ( vpsr.ic ) {
    2.25 -        if ( set_ifa){
    2.26 -            vcpu_set_ifa(vcpu, vadr);
    2.27 -        }
    2.28 -        if ( set_itir) {
    2.29 -            value = vmx_vcpu_get_itir_on_fault(vcpu, vadr);
    2.30 -            vcpu_set_itir(vcpu, value);
    2.31 -        }
    2.32 -
    2.33 -        if ( set_iha) {
    2.34 -            value = vmx_vcpu_thash(vcpu, vadr);
    2.35 -            vcpu_set_iha(vcpu, value);
    2.36 -        }
    2.37 -    }
    2.38 -
    2.39 -
    2.40 -}
    2.41 -
    2.42 -/*
    2.43 - * Data TLB Fault
    2.44 - *  @ Data TLB vector
    2.45 - * Refer to SDM Vol2 Table 5-6 & 8-1
    2.46 - */
    2.47 -void
    2.48 -dtlb_fault (VCPU *vcpu, u64 vadr)
    2.49 -{
    2.50 -    /* If vPSR.ic, IFA, ITIR, IHA */
    2.51 -    set_ifa_itir_iha (vcpu, vadr, 1, 1, 1);
    2.52 -    inject_guest_interruption(vcpu,IA64_DATA_TLB_VECTOR);
    2.53 -}
    2.54 -
    2.55 -/*
    2.56 - * Instruction TLB Fault
    2.57 - *  @ Instruction TLB vector
    2.58 - * Refer to SDM Vol2 Table 5-6 & 8-1
    2.59 - */
    2.60 -void
    2.61 -itlb_fault (VCPU *vcpu, u64 vadr)
    2.62 -{
    2.63 -     /* If vPSR.ic, IFA, ITIR, IHA */
    2.64 -    set_ifa_itir_iha (vcpu, vadr, 1, 1, 1);
    2.65 -    inject_guest_interruption(vcpu,IA64_INST_TLB_VECTOR);
    2.66 -}
    2.67 -
    2.68 -
    2.69 -
    2.70 -/*
    2.71 - * Data Nested TLB Fault
    2.72 - *  @ Data Nested TLB Vector
    2.73 - * Refer to SDM Vol2 Table 5-6 & 8-1
    2.74 - */
    2.75 -void
    2.76 -nested_dtlb (VCPU *vcpu)
    2.77 -{
    2.78 -    inject_guest_interruption(vcpu,IA64_DATA_NESTED_TLB_VECTOR);
    2.79 -}
    2.80 -
    2.81 -/*
    2.82 - * Alternate Data TLB Fault
    2.83 - *  @ Alternate Data TLB vector
    2.84 - * Refer to SDM Vol2 Table 5-6 & 8-1
    2.85 - */
    2.86 -void
    2.87 -alt_dtlb (VCPU *vcpu, u64 vadr)
    2.88 -{
    2.89 -    set_ifa_itir_iha (vcpu, vadr, 1, 1, 0);
    2.90 -    inject_guest_interruption(vcpu,IA64_ALT_DATA_TLB_VECTOR);
    2.91 -}
    2.92 -
    2.93 -
    2.94 -/*
    2.95 - * Data TLB Fault
    2.96 - *  @ Data TLB vector
    2.97 - * Refer to SDM Vol2 Table 5-6 & 8-1
    2.98 - */
    2.99 -void
   2.100 -alt_itlb (VCPU *vcpu, u64 vadr)
   2.101 -{
   2.102 -    set_ifa_itir_iha (vcpu, vadr, 1, 1, 0);
   2.103 -    inject_guest_interruption(vcpu,IA64_ALT_INST_TLB_VECTOR);
   2.104 -}
   2.105 -
   2.106 -/* Deal with:
   2.107 - *  VHPT Translation Vector
   2.108 - */
   2.109 -static void
   2.110 -_vhpt_fault(VCPU *vcpu, u64 vadr)
   2.111 -{
   2.112 -    /* If vPSR.ic, IFA, ITIR, IHA*/
   2.113 -    set_ifa_itir_iha (vcpu, vadr, 1, 1, 1);
   2.114 -    inject_guest_interruption(vcpu,IA64_VHPT_TRANS_VECTOR);
   2.115 -}
   2.116 -
   2.117 -/*
   2.118 - * VHPT Instruction Fault
   2.119 - *  @ VHPT Translation vector
   2.120 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.121 - */
   2.122 -void
   2.123 -ivhpt_fault (VCPU *vcpu, u64 vadr)
   2.124 -{
   2.125 -    _vhpt_fault(vcpu, vadr);
   2.126 -}
   2.127 -
   2.128 -
   2.129 -/*
   2.130 - * VHPT Data Fault
   2.131 - *  @ VHPT Translation vector
   2.132 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.133 - */
   2.134 -void
   2.135 -dvhpt_fault (VCPU *vcpu, u64 vadr)
   2.136 -{
   2.137 -    _vhpt_fault(vcpu, vadr);
   2.138 -}
   2.139 -
   2.140 -
   2.141 -
   2.142 -/*
   2.143 - * Deal with:
   2.144 - *  General Exception vector
   2.145 - */
   2.146 -void
   2.147 -_general_exception (VCPU *vcpu)
   2.148 -{
   2.149 -    inject_guest_interruption(vcpu,IA64_GENEX_VECTOR);
   2.150 -}
   2.151 -
   2.152 -
   2.153 -/*
   2.154 - * Illegal Operation Fault
   2.155 - *  @ General Exception Vector
   2.156 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.157 - */
   2.158 -void
   2.159 -illegal_op (VCPU *vcpu)
   2.160 -{
   2.161 -    _general_exception(vcpu);
   2.162 -}
   2.163 -
   2.164 -/*
   2.165 - * Illegal Dependency Fault
   2.166 - *  @ General Exception Vector
   2.167 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.168 - */
   2.169 -void
   2.170 -illegal_dep (VCPU *vcpu)
   2.171 -{
   2.172 -    _general_exception(vcpu);
   2.173 -}
   2.174 -
   2.175 -/*
   2.176 - * Reserved Register/Field Fault
   2.177 - *  @ General Exception Vector
   2.178 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.179 - */
   2.180 -void
   2.181 -rsv_reg_field (VCPU *vcpu)
   2.182 -{
   2.183 -    _general_exception(vcpu);
   2.184 -}
   2.185 -/*
   2.186 - * Privileged Operation Fault
   2.187 - *  @ General Exception Vector
   2.188 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.189 - */
   2.190 -
   2.191 -void
   2.192 -privilege_op (VCPU *vcpu)
   2.193 -{
   2.194 -    _general_exception(vcpu);
   2.195 -}
   2.196 -
   2.197 -/*
   2.198 - * Unimplement Data Address Fault
   2.199 - *  @ General Exception Vector
   2.200 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.201 - */
   2.202 -void
   2.203 -unimpl_daddr (VCPU *vcpu)
   2.204 -{
   2.205 -    _general_exception(vcpu);
   2.206 -}
   2.207 -
   2.208 -/*
   2.209 - * Privileged Register Fault
   2.210 - *  @ General Exception Vector
   2.211 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.212 - */
   2.213 -void
   2.214 -privilege_reg (VCPU *vcpu)
   2.215 -{
   2.216 -    _general_exception(vcpu);
   2.217 -}
   2.218 -
   2.219 -/* Deal with
   2.220 - *  Nat consumption vector
   2.221 - * Parameter:
   2.222 - *  vaddr: Optional, if t == REGISTER
   2.223 - */
   2.224 -static void
   2.225 -_nat_consumption_fault(VCPU *vcpu, u64 vadr, miss_type t)
   2.226 -{
   2.227 -    /* If vPSR.ic && t == DATA/INST, IFA */
   2.228 -    if ( t == DATA || t == INSTRUCTION ) {
   2.229 -        /* IFA */
   2.230 -        set_ifa_itir_iha (vcpu, vadr, 1, 0, 0);
   2.231 -    }
   2.232 -
   2.233 -    inject_guest_interruption(vcpu,IA64_NAT_CONSUMPTION_VECTOR);
   2.234 -}
   2.235 -
   2.236 -/*
   2.237 - * IR Data Nat Page Consumption Fault
   2.238 - *  @ Nat Consumption Vector
   2.239 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.240 - */
   2.241 -#if 0
   2.242 -static void
   2.243 -ir_nat_page_consumption (VCPU *vcpu, u64 vadr)
   2.244 -{
   2.245 -    _nat_consumption_fault(vcpu, vadr, DATA);
   2.246 -}
   2.247 -#endif //shadow it due to no use currently 
   2.248 -
   2.249 -/*
   2.250 - * Instruction Nat Page Consumption Fault
   2.251 - *  @ Nat Consumption Vector
   2.252 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.253 - */
   2.254 -void
   2.255 -inat_page_consumption (VCPU *vcpu, u64 vadr)
   2.256 -{
   2.257 -    _nat_consumption_fault(vcpu, vadr, INSTRUCTION);
   2.258 -}
   2.259 -
   2.260 -/*
   2.261 - * Register Nat Consumption Fault
   2.262 - *  @ Nat Consumption Vector
   2.263 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.264 - */
   2.265 -void
   2.266 -rnat_consumption (VCPU *vcpu)
   2.267 -{
   2.268 -    _nat_consumption_fault(vcpu, 0, REGISTER);
   2.269 -}
   2.270 -
   2.271 -/*
   2.272 - * Data Nat Page Consumption Fault
   2.273 - *  @ Nat Consumption Vector
   2.274 - * Refer to SDM Vol2 Table 5-6 & 8-1
   2.275 - */
   2.276 -void
   2.277 -dnat_page_consumption (VCPU *vcpu, uint64_t vadr)
   2.278 -{
   2.279 -    _nat_consumption_fault(vcpu, vadr, DATA);
   2.280 -}
   2.281 -
   2.282 -/* Deal with
   2.283 - *  Page not present vector
   2.284 - */
   2.285 -static void
   2.286 -__page_not_present(VCPU *vcpu, u64 vadr)
   2.287 -{
   2.288 -    /* If vPSR.ic, IFA, ITIR */
   2.289 -    set_ifa_itir_iha (vcpu, vadr, 1, 1, 0);
   2.290 -    inject_guest_interruption(vcpu, IA64_PAGE_NOT_PRESENT_VECTOR);
   2.291 -}
   2.292 -
   2.293 -
   2.294 -void
   2.295 -data_page_not_present(VCPU *vcpu, u64 vadr)
   2.296 -{
   2.297 -    __page_not_present(vcpu, vadr);
   2.298 -}
   2.299 -
   2.300 -
   2.301 -void
   2.302 -inst_page_not_present(VCPU *vcpu, u64 vadr)
   2.303 -{
   2.304 -    __page_not_present(vcpu, vadr);
   2.305 -}
   2.306 -
   2.307 -
   2.308 -/* Deal with
   2.309 - *  Data access rights vector
   2.310 - */
   2.311 -void
   2.312 -data_access_rights(VCPU *vcpu, u64 vadr)
   2.313 -{
   2.314 -    /* If vPSR.ic, IFA, ITIR */
   2.315 -    set_ifa_itir_iha (vcpu, vadr, 1, 1, 0);
   2.316 -    inject_guest_interruption(vcpu, IA64_DATA_ACCESS_RIGHTS_VECTOR);
   2.317 -}
     3.1 --- a/xen/include/asm-ia64/vmx.h	Thu Feb 14 11:50:55 2008 -0700
     3.2 +++ b/xen/include/asm-ia64/vmx.h	Thu Feb 14 12:20:11 2008 -0700
     3.3 @@ -38,16 +38,8 @@ extern void vmx_do_resume(struct vcpu *v
     3.4  extern void vmx_io_assist(struct vcpu *v);
     3.5  extern int ia64_hypercall (struct pt_regs *regs);
     3.6  extern unsigned long __gpfn_to_mfn_foreign(struct domain *d, unsigned long gpfn);
     3.7 -extern void sync_split_caches(void);
     3.8  extern void set_privileged_operation_isr (struct vcpu *vcpu,int inst);
     3.9 -extern void privilege_op (struct vcpu *vcpu);
    3.10 -extern void set_ifa_itir_iha (struct vcpu *vcpu, u64 vadr,
    3.11 -          int set_ifa, int set_itir, int set_iha);
    3.12 -extern void inject_guest_interruption(struct vcpu *vcpu, u64 vec);
    3.13 -extern void set_illegal_op_isr (struct vcpu *vcpu);
    3.14 -extern void illegal_op (struct vcpu *vcpu);
    3.15  extern void set_rsv_reg_field_isr (struct vcpu *vcpu);
    3.16 -extern void rsv_reg_field (struct vcpu *vcpu);
    3.17  extern void vmx_relinquish_guest_resources(struct domain *d);
    3.18  extern void vmx_relinquish_vcpu_resources(struct vcpu *v);
    3.19  extern void vmx_send_assist_req(struct vcpu *v);
     4.1 --- a/xen/include/asm-ia64/vmx_vcpu.h	Thu Feb 14 11:50:55 2008 -0700
     4.2 +++ b/xen/include/asm-ia64/vmx_vcpu.h	Thu Feb 14 12:20:11 2008 -0700
     4.3 @@ -57,8 +57,6 @@ extern u64 set_isr_for_na_inst(VCPU * vc
     4.4  
     4.5  /* next all for VTI domain APIs definition */
     4.6  extern void vmx_vcpu_set_psr(VCPU * vcpu, unsigned long value);
     4.7 -extern u64 vmx_vcpu_sync_mpsr(u64 mipsr, u64 value);
     4.8 -extern void vmx_vcpu_set_psr_sync_mpsr(VCPU * vcpu, u64 value);
     4.9  extern IA64FAULT vmx_vcpu_cover(VCPU * vcpu);
    4.10  extern IA64FAULT vmx_vcpu_set_rr(VCPU * vcpu, u64 reg, u64 val);
    4.11  extern u64 vmx_vcpu_get_pkr(VCPU * vcpu, u64 reg);
    4.12 @@ -97,34 +95,16 @@ extern uint64_t vtm_get_itc(VCPU * vcpu)
    4.13  extern void vtm_set_itc(VCPU * vcpu, uint64_t new_itc);
    4.14  extern void vtm_set_itv(VCPU * vcpu, uint64_t val);
    4.15  extern void vtm_set_itm(VCPU * vcpu, uint64_t val);
    4.16 -extern void vtm_interruption_update(VCPU * vcpu, vtime_t * vtm);
    4.17 -//extern void vtm_domain_out(VCPU *vcpu);
    4.18 -//extern void vtm_domain_in(VCPU *vcpu);
    4.19  extern void vlsapic_reset(VCPU * vcpu);
    4.20  extern int vmx_check_pending_irq(VCPU * vcpu);
    4.21  extern void guest_write_eoi(VCPU * vcpu);
    4.22  extern int is_unmasked_irq(VCPU * vcpu);
    4.23  extern uint64_t guest_read_vivr(VCPU * vcpu);
    4.24 -extern void vmx_inject_vhpi(VCPU * vcpu, u8 vec);
    4.25  extern int vmx_vcpu_pend_interrupt(VCPU * vcpu, uint8_t vector);
    4.26 -extern void memread_p(VCPU * vcpu, u64 * src, u64 * dest, size_t s);
    4.27 -extern void memread_v(VCPU * vcpu, thash_data_t * vtlb, u64 * src, u64 * dest,
    4.28 -                      size_t s);
    4.29 -extern void memwrite_v(VCPU * vcpu, thash_data_t * vtlb, u64 * src, u64 * dest,
    4.30 -                       size_t s);
    4.31 -extern void memwrite_p(VCPU * vcpu, u64 * src, u64 * dest, size_t s);
    4.32  extern void vcpu_load_kernel_regs(VCPU * vcpu);
    4.33  extern void vmx_switch_rr7(unsigned long, void *, void *, void *);
    4.34 -
    4.35 -extern void dtlb_fault(VCPU * vcpu, u64 vadr);
    4.36 -extern void nested_dtlb(VCPU * vcpu);
    4.37 -extern void alt_dtlb(VCPU * vcpu, u64 vadr);
    4.38 -extern void dvhpt_fault(VCPU * vcpu, u64 vadr);
    4.39 -extern void dnat_page_consumption(VCPU * vcpu, uint64_t vadr);
    4.40 -extern void data_page_not_present(VCPU * vcpu, u64 vadr);
    4.41 -extern void inst_page_not_present(VCPU * vcpu, u64 vadr);
    4.42 -extern void data_access_rights(VCPU * vcpu, u64 vadr);
    4.43  extern void vmx_ia64_set_dcr(VCPU * v);
    4.44 +extern void inject_guest_interruption(struct vcpu *vcpu, u64 vec);
    4.45  
    4.46  /**************************************************************************
    4.47   VCPU control register access routines
    4.48 @@ -409,4 +389,309 @@ static inline thash_cb_t *vcpu_get_vhpt(
    4.49  	return &vcpu->arch.vhpt;
    4.50  }
    4.51  
    4.52 +
    4.53 +/**************************************************************************
    4.54 + VCPU fault injection routines
    4.55 +**************************************************************************/
    4.56 +
    4.57 +/*
    4.58 + * Set vIFA & vITIR & vIHA, when vPSR.ic =1
    4.59 + * Parameter:
    4.60 + *  set_ifa: if true, set vIFA
    4.61 + *  set_itir: if true, set vITIR
    4.62 + *  set_iha: if true, set vIHA
    4.63 + */
    4.64 +static inline void
    4.65 +set_ifa_itir_iha (VCPU *vcpu, u64 vadr,
    4.66 +		  int set_ifa, int set_itir, int set_iha)
    4.67 +{
    4.68 +	IA64_PSR vpsr;
    4.69 +	u64 value;
    4.70 +	vpsr.val = VCPU(vcpu, vpsr);
    4.71 +	/* Vol2, Table 8-1 */
    4.72 +	if (vpsr.ic) {
    4.73 +		if (set_ifa){
    4.74 +			vcpu_set_ifa(vcpu, vadr);
    4.75 +		}
    4.76 +		if (set_itir) {
    4.77 +			value = vmx_vcpu_get_itir_on_fault(vcpu, vadr);
    4.78 +			vcpu_set_itir(vcpu, value);
    4.79 +		}
    4.80 +		if (set_iha) {
    4.81 +			value = vmx_vcpu_thash(vcpu, vadr);
    4.82 +			vcpu_set_iha(vcpu, value);
    4.83 +		}
    4.84 +	}
    4.85 +}
    4.86 +
    4.87 +/*
    4.88 + * Data TLB Fault
    4.89 + *  @ Data TLB vector
    4.90 + * Refer to SDM Vol2 Table 5-6 & 8-1
    4.91 + */
    4.92 +static inline void
    4.93 +dtlb_fault (VCPU *vcpu, u64 vadr)
    4.94 +{
    4.95 +	/* If vPSR.ic, IFA, ITIR, IHA */
    4.96 +	set_ifa_itir_iha(vcpu, vadr, 1, 1, 1);
    4.97 +	inject_guest_interruption(vcpu, IA64_DATA_TLB_VECTOR);
    4.98 +}
    4.99 +
   4.100 +/*
   4.101 + * Instruction TLB Fault
   4.102 + *  @ Instruction TLB vector
   4.103 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.104 + */
   4.105 +static inline void
   4.106 +itlb_fault (VCPU *vcpu, u64 vadr)
   4.107 +{
   4.108 +	/* If vPSR.ic, IFA, ITIR, IHA */
   4.109 +	set_ifa_itir_iha(vcpu, vadr, 1, 1, 1);
   4.110 +	inject_guest_interruption(vcpu, IA64_INST_TLB_VECTOR);
   4.111 +}
   4.112 +
   4.113 +/*
   4.114 + * Data Nested TLB Fault
   4.115 + *  @ Data Nested TLB Vector
   4.116 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.117 + */
   4.118 +static inline void
   4.119 +nested_dtlb (VCPU *vcpu)
   4.120 +{
   4.121 +	inject_guest_interruption(vcpu, IA64_DATA_NESTED_TLB_VECTOR);
   4.122 +}
   4.123 +
   4.124 +/*
   4.125 + * Alternate Data TLB Fault
   4.126 + *  @ Alternate Data TLB vector
   4.127 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.128 + */
   4.129 +static inline void
   4.130 +alt_dtlb (VCPU *vcpu, u64 vadr)
   4.131 +{
   4.132 +	set_ifa_itir_iha(vcpu, vadr, 1, 1, 0);
   4.133 +	inject_guest_interruption(vcpu, IA64_ALT_DATA_TLB_VECTOR);
   4.134 +}
   4.135 +
   4.136 +/*
   4.137 + * Data TLB Fault
   4.138 + *  @ Data TLB vector
   4.139 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.140 + */
   4.141 +static inline void
   4.142 +alt_itlb (VCPU *vcpu, u64 vadr)
   4.143 +{
   4.144 +	set_ifa_itir_iha(vcpu, vadr, 1, 1, 0);
   4.145 +	inject_guest_interruption(vcpu, IA64_ALT_INST_TLB_VECTOR);
   4.146 +}
   4.147 +
   4.148 +/*
   4.149 + * Deal with:
   4.150 + *  VHPT Translation Vector
   4.151 + */
   4.152 +static inline void
   4.153 +_vhpt_fault(VCPU *vcpu, u64 vadr)
   4.154 +{
   4.155 +	/* If vPSR.ic, IFA, ITIR, IHA*/
   4.156 +	set_ifa_itir_iha(vcpu, vadr, 1, 1, 1);
   4.157 +	inject_guest_interruption(vcpu, IA64_VHPT_TRANS_VECTOR);
   4.158 +}
   4.159 +
   4.160 +/*
   4.161 + * VHPT Instruction Fault
   4.162 + *  @ VHPT Translation vector
   4.163 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.164 + */
   4.165 +static inline void
   4.166 +ivhpt_fault (VCPU *vcpu, u64 vadr)
   4.167 +{
   4.168 +	_vhpt_fault(vcpu, vadr);
   4.169 +}
   4.170 +
   4.171 +/*
   4.172 + * VHPT Data Fault
   4.173 + *  @ VHPT Translation vector
   4.174 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.175 + */
   4.176 +static inline void
   4.177 +dvhpt_fault (VCPU *vcpu, u64 vadr)
   4.178 +{
   4.179 +	_vhpt_fault(vcpu, vadr);
   4.180 +}
   4.181 +
   4.182 +/*
   4.183 + * Deal with:
   4.184 + *  General Exception vector
   4.185 + */
   4.186 +static inline void
   4.187 +_general_exception (VCPU *vcpu)
   4.188 +{
   4.189 +	inject_guest_interruption(vcpu, IA64_GENEX_VECTOR);
   4.190 +}
   4.191 +
   4.192 +/*
   4.193 + * Illegal Operation Fault
   4.194 + *  @ General Exception Vector
   4.195 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.196 + */
   4.197 +static inline void
   4.198 +illegal_op (VCPU *vcpu)
   4.199 +{
   4.200 +	_general_exception(vcpu);
   4.201 +}
   4.202 +
   4.203 +/*
   4.204 + * Illegal Dependency Fault
   4.205 + *  @ General Exception Vector
   4.206 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.207 + */
   4.208 +static inline void
   4.209 +illegal_dep (VCPU *vcpu)
   4.210 +{
   4.211 +	_general_exception(vcpu);
   4.212 +}
   4.213 +
   4.214 +/*
   4.215 + * Reserved Register/Field Fault
   4.216 + *  @ General Exception Vector
   4.217 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.218 + */
   4.219 +static inline void
   4.220 +rsv_reg_field (VCPU *vcpu)
   4.221 +{
   4.222 +	_general_exception(vcpu);
   4.223 +}
   4.224 +
   4.225 +/*
   4.226 + * Privileged Operation Fault
   4.227 + *  @ General Exception Vector
   4.228 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.229 + */
   4.230 +static inline void
   4.231 +privilege_op (VCPU *vcpu)
   4.232 +{
   4.233 +	_general_exception(vcpu);
   4.234 +}
   4.235 +
   4.236 +/*
   4.237 + * Unimplement Data Address Fault
   4.238 + *  @ General Exception Vector
   4.239 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.240 + */
   4.241 +static inline void
   4.242 +unimpl_daddr (VCPU *vcpu)
   4.243 +{
   4.244 +	_general_exception(vcpu);
   4.245 +}
   4.246 +
   4.247 +/*
   4.248 + * Privileged Register Fault
   4.249 + *  @ General Exception Vector
   4.250 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.251 + */
   4.252 +static inline void
   4.253 +privilege_reg (VCPU *vcpu)
   4.254 +{
   4.255 +	_general_exception(vcpu);
   4.256 +}
   4.257 +
   4.258 +/*
   4.259 + * Deal with
   4.260 + *  Nat consumption vector
   4.261 + * Parameter:
   4.262 + *  vaddr: Optional, if t == REGISTER
   4.263 + */
   4.264 +static inline void
   4.265 +_nat_consumption_fault(VCPU *vcpu, u64 vadr, miss_type t)
   4.266 +{
   4.267 +	/* If vPSR.ic && t == DATA/INST, IFA */
   4.268 +	if ( t == DATA || t == INSTRUCTION ) {
   4.269 +		/* IFA */
   4.270 +		set_ifa_itir_iha(vcpu, vadr, 1, 0, 0);
   4.271 +	}
   4.272 +
   4.273 +	inject_guest_interruption(vcpu, IA64_NAT_CONSUMPTION_VECTOR);
   4.274 +}
   4.275 +
   4.276 +/*
   4.277 + * IR Data Nat Page Consumption Fault
   4.278 + *  @ Nat Consumption Vector
   4.279 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.280 + */
   4.281 +#if 0
   4.282 +static inline void
   4.283 +ir_nat_page_consumption (VCPU *vcpu, u64 vadr)
   4.284 +{
   4.285 +	_nat_consumption_fault(vcpu, vadr, DATA);
   4.286 +}
   4.287 +#endif //shadow it due to no use currently 
   4.288 +
   4.289 +/*
   4.290 + * Instruction Nat Page Consumption Fault
   4.291 + *  @ Nat Consumption Vector
   4.292 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.293 + */
   4.294 +static inline void
   4.295 +inat_page_consumption (VCPU *vcpu, u64 vadr)
   4.296 +{
   4.297 +	_nat_consumption_fault(vcpu, vadr, INSTRUCTION);
   4.298 +}
   4.299 +
   4.300 +/*
   4.301 + * Register Nat Consumption Fault
   4.302 + *  @ Nat Consumption Vector
   4.303 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.304 + */
   4.305 +static inline void
   4.306 +rnat_consumption (VCPU *vcpu)
   4.307 +{
   4.308 +	_nat_consumption_fault(vcpu, 0, REGISTER);
   4.309 +}
   4.310 +
   4.311 +/*
   4.312 + * Data Nat Page Consumption Fault
   4.313 + *  @ Nat Consumption Vector
   4.314 + * Refer to SDM Vol2 Table 5-6 & 8-1
   4.315 + */
   4.316 +static inline void
   4.317 +dnat_page_consumption (VCPU *vcpu, uint64_t vadr)
   4.318 +{
   4.319 +	_nat_consumption_fault(vcpu, vadr, DATA);
   4.320 +}
   4.321 +
   4.322 +/*
   4.323 + * Deal with
   4.324 + *  Page not present vector
   4.325 + */
   4.326 +static inline void
   4.327 +__page_not_present(VCPU *vcpu, u64 vadr)
   4.328 +{
   4.329 +	/* If vPSR.ic, IFA, ITIR */
   4.330 +	set_ifa_itir_iha(vcpu, vadr, 1, 1, 0);
   4.331 +	inject_guest_interruption(vcpu, IA64_PAGE_NOT_PRESENT_VECTOR);
   4.332 +}
   4.333 +
   4.334 +static inline void
   4.335 +data_page_not_present(VCPU *vcpu, u64 vadr)
   4.336 +{
   4.337 +	__page_not_present(vcpu, vadr);
   4.338 +}
   4.339 +
   4.340 +static inline void
   4.341 +inst_page_not_present(VCPU *vcpu, u64 vadr)
   4.342 +{
   4.343 +	__page_not_present(vcpu, vadr);
   4.344 +}
   4.345 +
   4.346 +/*
   4.347 + * Deal with
   4.348 + *  Data access rights vector
   4.349 + */
   4.350 +static inline void
   4.351 +data_access_rights(VCPU *vcpu, u64 vadr)
   4.352 +{
   4.353 +	/* If vPSR.ic, IFA, ITIR */
   4.354 +	set_ifa_itir_iha(vcpu, vadr, 1, 1, 0);
   4.355 +	inject_guest_interruption(vcpu, IA64_DATA_ACCESS_RIGHTS_VECTOR);
   4.356 +}
   4.357  #endif