ia64/xen-unstable

changeset 13840:d879bbaa3faa

[IA64] Turn on dcr.dm inside XEN

For xeno, dcr.dm is alway set to 1,
For VTI-domain,
if guest cpl > 0, dcr.dm is set to 1,
if guest cpl == 0, dcr.dm is set to 0,
This is because Window ld.s on tr mapped page.

Signed-off-by: Anthony Xu <anthony.xu@intel.com>
author awilliam@xenbuild2.aw
date Mon Feb 05 15:23:39 2007 -0700 (2007-02-05)
parents d9f7f4f9c7ff
children d7f7021902a2
files xen/arch/ia64/vmx/vmx_interrupt.c xen/arch/ia64/vmx/vmx_phy_mode.c xen/arch/ia64/vmx/vmx_vcpu.c xen/arch/ia64/vmx/vmx_virt.c xen/arch/ia64/xen/domain.c xen/arch/ia64/xen/vcpu.c xen/include/asm-ia64/domain.h xen/include/asm-ia64/vmx_vcpu.h xen/include/asm-ia64/vmx_vpd.h xen/include/asm-ia64/xenkregs.h
line diff
     1.1 --- a/xen/arch/ia64/vmx/vmx_interrupt.c	Mon Feb 05 14:24:27 2007 -0700
     1.2 +++ b/xen/arch/ia64/vmx/vmx_interrupt.c	Mon Feb 05 15:23:39 2007 -0700
     1.3 @@ -99,7 +99,7 @@ inject_guest_interruption(VCPU *vcpu, u6
     1.4      pt_isr.ir = 0;
     1.5      VMX(vcpu,cr_isr) = pt_isr.val;
     1.6      collect_interruption(vcpu);
     1.7 -
     1.8 +    vmx_ia64_set_dcr(vcpu);
     1.9      vmx_vcpu_get_iva(vcpu,&viva);
    1.10      regs->cr_iip = viva + vec;
    1.11  }
     2.1 --- a/xen/arch/ia64/vmx/vmx_phy_mode.c	Mon Feb 05 14:24:27 2007 -0700
     2.2 +++ b/xen/arch/ia64/vmx/vmx_phy_mode.c	Mon Feb 05 15:23:39 2007 -0700
     2.3 @@ -188,7 +188,7 @@ vmx_load_all_rr(VCPU *vcpu)
     2.4  			(void *)vcpu->arch.privregs,
     2.5  			(void *)vcpu->arch.vhpt.hash, pal_vaddr );
     2.6  	ia64_set_pta(VMX(vcpu, mpta));
     2.7 -	ia64_set_dcr(VMX(vcpu, mdcr));
     2.8 +	vmx_ia64_set_dcr(vcpu);
     2.9  
    2.10  	ia64_srlz_d();
    2.11  	ia64_set_psr(psr);
     3.1 --- a/xen/arch/ia64/vmx/vmx_vcpu.c	Mon Feb 05 14:24:27 2007 -0700
     3.2 +++ b/xen/arch/ia64/vmx/vmx_vcpu.c	Mon Feb 05 15:23:39 2007 -0700
     3.3 @@ -78,6 +78,22 @@ struct guest_psr_bundle guest_psr_buf[10
     3.4  unsigned long guest_psr_index = 0;
     3.5  #endif
     3.6  
     3.7 +
     3.8 +void
     3.9 +vmx_ia64_set_dcr(VCPU *v)   
    3.10 +{
    3.11 +    unsigned long dcr_bits = IA64_DEFAULT_DCR_BITS;
    3.12 +
    3.13 +    // if guest is runing on cpl > 0, set dcr.dm=1
    3.14 +    // if geust is runing on cpl = 0, set dcr.dm=0
    3.15 +    // because Guest OS may ld.s on tr mapped page.
    3.16 +    if (!(VCPU(v, vpsr) & IA64_PSR_CPL))
    3.17 +        dcr_bits &= ~IA64_DCR_DM;
    3.18 +
    3.19 +    ia64_set_dcr(dcr_bits);
    3.20 +}
    3.21 +
    3.22 +
    3.23  void
    3.24  vmx_vcpu_set_psr(VCPU *vcpu, unsigned long value)
    3.25  {
    3.26 @@ -261,6 +277,7 @@ IA64FAULT vmx_vcpu_rfi(VCPU *vcpu)
    3.27      else
    3.28          vcpu_bsw0(vcpu);
    3.29      vmx_vcpu_set_psr(vcpu,psr);
    3.30 +    vmx_ia64_set_dcr(vcpu);
    3.31      ifs=VCPU(vcpu,ifs);
    3.32      if(ifs>>63)
    3.33          regs->cr_ifs = ifs;
     4.1 --- a/xen/arch/ia64/vmx/vmx_virt.c	Mon Feb 05 14:24:27 2007 -0700
     4.2 +++ b/xen/arch/ia64/vmx/vmx_virt.c	Mon Feb 05 15:23:39 2007 -0700
     4.3 @@ -1234,7 +1234,7 @@ IA64FAULT vmx_emul_mov_to_cr(VCPU *vcpu,
     4.4  #endif  //CHECK_FAULT
     4.5      r2 = cr_igfld_mask(inst.M32.cr3,r2);
     4.6      switch (inst.M32.cr3) {
     4.7 -        case 0: return vmx_vcpu_set_dcr(vcpu,r2);
     4.8 +        case 0: return vcpu_set_dcr(vcpu,r2);
     4.9          case 1: return vmx_vcpu_set_itm(vcpu,r2);
    4.10          case 2: return vmx_vcpu_set_iva(vcpu,r2);
    4.11          case 8: return vmx_vcpu_set_pta(vcpu,r2);
    4.12 @@ -1299,7 +1299,7 @@ IA64FAULT vmx_emul_mov_from_cr(VCPU *vcp
    4.13  
    4.14  //    from_cr_cnt[inst.M33.cr3]++;
    4.15      switch (inst.M33.cr3) {
    4.16 -        case 0: return vmx_cr_get(dcr);
    4.17 +        case 0: return cr_get(dcr);
    4.18          case 1: return vmx_cr_get(itm);
    4.19          case 2: return vmx_cr_get(iva);
    4.20          case 8: return vmx_cr_get(pta);
     5.1 --- a/xen/arch/ia64/xen/domain.c	Mon Feb 05 14:24:27 2007 -0700
     5.2 +++ b/xen/arch/ia64/xen/domain.c	Mon Feb 05 15:23:39 2007 -0700
     5.3 @@ -42,6 +42,7 @@
     5.4  #include <asm/vmx_vpd.h>
     5.5  #include <asm/vmx_phy_mode.h>
     5.6  #include <asm/vhpt.h>
     5.7 +#include <asm/vcpu.h>
     5.8  #include <asm/tlbflush.h>
     5.9  #include <asm/regionreg.h>
    5.10  #include <asm/dom_fw.h>
    5.11 @@ -204,9 +205,7 @@ void context_switch(struct vcpu *prev, s
    5.12          if (!VMX_DOMAIN(next)) {
    5.13              /* VMX domains can change the physical cr.dcr.
    5.14               * Restore default to prevent leakage. */
    5.15 -            ia64_setreg(_IA64_REG_CR_DCR, (IA64_DCR_DP | IA64_DCR_DK
    5.16 -                           | IA64_DCR_DX | IA64_DCR_DR | IA64_DCR_PP
    5.17 -                           | IA64_DCR_DA | IA64_DCR_DD | IA64_DCR_LC));
    5.18 +            ia64_setreg(_IA64_REG_CR_DCR, IA64_DEFAULT_DCR_BITS);
    5.19          }
    5.20      }
    5.21      if (VMX_DOMAIN(next))
    5.22 @@ -582,7 +581,7 @@ void arch_get_info_guest(struct vcpu *v,
    5.23  		er->dtrs[i].rid = v->arch.dtrs[i].rid;
    5.24  	}
    5.25  	er->event_callback_ip = v->arch.event_callback_ip;
    5.26 -	er->dcr = v->arch.dcr;
    5.27 +	er->dcr = PSCB(v,dcr);
    5.28  	er->iva = v->arch.iva;
    5.29  }
    5.30  
    5.31 @@ -618,7 +617,7 @@ int arch_set_info_guest(struct vcpu *v, 
    5.32  			             er->dtrs[i].rid);
    5.33  		}
    5.34  		v->arch.event_callback_ip = er->event_callback_ip;
    5.35 -		v->arch.dcr = er->dcr;
    5.36 +		PSCB(v,dcr) = er->dcr;
    5.37  		v->arch.iva = er->iva;
    5.38  	}
    5.39  
     6.1 --- a/xen/arch/ia64/xen/vcpu.c	Mon Feb 05 14:24:27 2007 -0700
     6.2 +++ b/xen/arch/ia64/xen/vcpu.c	Mon Feb 05 15:23:39 2007 -0700
     6.3 @@ -501,7 +501,7 @@ BOOLEAN vcpu_get_psr_i(VCPU * vcpu)
     6.4  
     6.5  u64 vcpu_get_ipsr_int_state(VCPU * vcpu, u64 prevpsr)
     6.6  {
     6.7 -	u64 dcr = PSCBX(vcpu, dcr);
     6.8 +	u64 dcr = PSCB(vcpu, dcr);
     6.9  	PSR psr;
    6.10  
    6.11  	//printk("*** vcpu_get_ipsr_int_state (0x%016lx)...\n",prevpsr);
    6.12 @@ -532,10 +532,7 @@ u64 vcpu_get_ipsr_int_state(VCPU * vcpu,
    6.13  
    6.14  IA64FAULT vcpu_get_dcr(VCPU * vcpu, u64 * pval)
    6.15  {
    6.16 -//verbose("vcpu_get_dcr: called @%p\n",PSCB(vcpu,iip));
    6.17 -	// Reads of cr.dcr on Xen always have the sign bit set, so
    6.18 -	// a domain can differentiate whether it is running on SP or not
    6.19 -	*pval = PSCBX(vcpu, dcr) | 0x8000000000000000L;
    6.20 +	*pval = PSCB(vcpu, dcr);
    6.21  	return IA64_NO_FAULT;
    6.22  }
    6.23  
    6.24 @@ -651,11 +648,7 @@ IA64FAULT vcpu_get_iha(VCPU * vcpu, u64 
    6.25  
    6.26  IA64FAULT vcpu_set_dcr(VCPU * vcpu, u64 val)
    6.27  {
    6.28 -	// Reads of cr.dcr on SP always have the sign bit set, so
    6.29 -	// a domain can differentiate whether it is running on SP or not
    6.30 -	// Thus, writes of DCR should ignore the sign bit
    6.31 -//verbose("vcpu_set_dcr: called\n");
    6.32 -	PSCBX(vcpu, dcr) = val & ~0x8000000000000000L;
    6.33 +	PSCB(vcpu, dcr) = val;
    6.34  	return IA64_NO_FAULT;
    6.35  }
    6.36  
     7.1 --- a/xen/include/asm-ia64/domain.h	Mon Feb 05 14:24:27 2007 -0700
     7.2 +++ b/xen/include/asm-ia64/domain.h	Mon Feb 05 15:23:39 2007 -0700
     7.3 @@ -162,7 +162,6 @@ struct arch_vcpu {
     7.4      unsigned long irr[4];	    /* Interrupt request register.  */
     7.5      unsigned long insvc[4];		/* Interrupt in service.  */
     7.6      unsigned long iva;
     7.7 -    unsigned long dcr;
     7.8      unsigned long domain_itm;
     7.9      unsigned long domain_itm_last;
    7.10  
     8.1 --- a/xen/include/asm-ia64/vmx_vcpu.h	Mon Feb 05 14:24:27 2007 -0700
     8.2 +++ b/xen/include/asm-ia64/vmx_vcpu.h	Mon Feb 05 15:23:39 2007 -0700
     8.3 @@ -126,17 +126,12 @@ extern void dnat_page_consumption(VCPU *
     8.4  extern void data_page_not_present(VCPU * vcpu, u64 vadr);
     8.5  extern void inst_page_not_present(VCPU * vcpu, u64 vadr);
     8.6  extern void data_access_rights(VCPU * vcpu, u64 vadr);
     8.7 +extern void vmx_ia64_set_dcr(VCPU * v);
     8.8  
     8.9  /**************************************************************************
    8.10   VCPU control register access routines
    8.11  **************************************************************************/
    8.12  
    8.13 -static inline IA64FAULT vmx_vcpu_get_dcr(VCPU * vcpu, u64 * pval)
    8.14 -{
    8.15 -	*pval = VCPU(vcpu, dcr);
    8.16 -	return IA64_NO_FAULT;
    8.17 -}
    8.18 -
    8.19  static inline IA64FAULT vmx_vcpu_get_itm(VCPU * vcpu, u64 * pval)
    8.20  {
    8.21  	*pval = VCPU(vcpu, itm);
    8.22 @@ -233,20 +228,6 @@ static inline IA64FAULT vmx_vcpu_get_lrr
    8.23  	return IA64_NO_FAULT;
    8.24  }
    8.25  
    8.26 -static inline IA64FAULT vmx_vcpu_set_dcr(VCPU * vcpu, u64 val)
    8.27 -{
    8.28 -	u64 mdcr, mask;
    8.29 -	VCPU(vcpu, dcr) = val;
    8.30 -	/* All vDCR bits will go to mDCR, except for be/pp/dm bits */
    8.31 -	mdcr = ia64_get_dcr();
    8.32 -	/* Machine dcr.dm masked to handle guest ld.s on tr mapped page */
    8.33 -	mask = IA64_DCR_BE | IA64_DCR_PP | IA64_DCR_DM;
    8.34 -	mdcr = (mdcr & mask) | (val & (~mask));
    8.35 -	ia64_set_dcr(mdcr);
    8.36 -	VMX(vcpu, mdcr) = mdcr;
    8.37 -	return IA64_NO_FAULT;
    8.38 -}
    8.39 -
    8.40  static inline IA64FAULT vmx_vcpu_set_itm(VCPU * vcpu, u64 val)
    8.41  {
    8.42  	vtm_set_itm(vcpu, val);
     9.1 --- a/xen/include/asm-ia64/vmx_vpd.h	Mon Feb 05 14:24:27 2007 -0700
     9.2 +++ b/xen/include/asm-ia64/vmx_vpd.h	Mon Feb 05 15:23:39 2007 -0700
     9.3 @@ -86,16 +86,7 @@ struct arch_vmx_struct {
     9.4      unsigned long   cr_isr;    /* for emulation */
     9.5      unsigned long   cause;
     9.6      unsigned long   opcode;
     9.7 -
     9.8 -//    unsigned long   mrr5;
     9.9 -//    unsigned long   mrr6;
    9.10 -//    unsigned long   mrr7;
    9.11 -    unsigned long   mdcr;
    9.12      unsigned long   mpta;
    9.13 -//    unsigned long   rfi_pfs;
    9.14 -//    unsigned long   rfi_iip;
    9.15 -//    unsigned long   rfi_ipsr;
    9.16 -//    unsigned long   rfi_ifs;
    9.17      unsigned long   flags;
    9.18      unsigned long   xen_port;
    9.19      unsigned char   xtp;
    10.1 --- a/xen/include/asm-ia64/xenkregs.h	Mon Feb 05 14:24:27 2007 -0700
    10.2 +++ b/xen/include/asm-ia64/xenkregs.h	Mon Feb 05 15:23:39 2007 -0700
    10.3 @@ -13,6 +13,10 @@
    10.4  #define IA64_PSR_VM_BIT		46
    10.5  #define IA64_PSR_VM	(__IA64_UL(1) << IA64_PSR_VM_BIT)
    10.6  
    10.7 +#define IA64_DEFAULT_DCR_BITS	(IA64_DCR_PP | IA64_DCR_LC | IA64_DCR_DM | \
    10.8 +				 IA64_DCR_DP | IA64_DCR_DK | IA64_DCR_DX | \
    10.9 +				 IA64_DCR_DR | IA64_DCR_DA | IA64_DCR_DD)
   10.10 +
   10.11  /* Interruption Function State */
   10.12  #define IA64_IFS_V_BIT		63
   10.13  #define IA64_IFS_V	(__IA64_UL(1) << IA64_IFS_V_BIT)