1.1 --- a/xen/arch/ia64/xen/vcpu.c	Tue Nov 08 12:15:55 2005 -0600
     1.2 +++ b/xen/arch/ia64/xen/vcpu.c	Wed Nov 09 12:26:17 2005 -0600
     1.3 @@ -1287,27 +1287,31 @@ unsigned long fast_vhpt_translate_count 
     1.4  unsigned long recover_to_page_fault_count = 0;
     1.5  unsigned long recover_to_break_fault_count = 0;
     1.6  
     1.7 +int warn_region0_address = 0; // FIXME later: tie to a boot parameter?
     1.8 +
     1.9  IA64FAULT vcpu_translate(VCPU *vcpu, UINT64 address, BOOLEAN is_data, UINT64 *pteval, UINT64 *itir, UINT64 *iha)
    1.10  {
    1.11  	unsigned long pta, pte, rid, rr;
    1.12  	int i;
    1.13  	TR_ENTRY *trp;
    1.14  
    1.15 -	if (!(address >> 61)) {
    1.16 -		if (!PSCB(vcpu,metaphysical_mode)) {
    1.17 -			REGS *regs = vcpu_regs(vcpu);
    1.18 -			unsigned long viip = PSCB(vcpu,iip);
    1.19 -			unsigned long vipsr = PSCB(vcpu,ipsr);
    1.20 -			unsigned long iip = regs->cr_iip;
    1.21 -			unsigned long ipsr = regs->cr_ipsr;
    1.22 -			printk("vcpu_translate: bad address %p, viip=%p, vipsr=%p, iip=%p, ipsr=%p continuing\n", address, viip, vipsr, iip, ipsr);
    1.23 -		}
    1.24 -
    1.25 +	if (PSCB(vcpu,metaphysical_mode)) {
    1.26 +		if (address >> 61)	// FIXME: need more precise check here
    1.27 +			panic_domain(vcpu_regs(vcpu),
    1.28 +				"vcpu_translate: bad physical address\n");
    1.29  		*pteval = (address & _PAGE_PPN_MASK) | __DIRTY_BITS | _PAGE_PL_2 | _PAGE_AR_RWX;
    1.30  		*itir = PAGE_SHIFT << 2;
    1.31  		phys_translate_count++;
    1.32  		return IA64_NO_FAULT;
    1.33  	}
    1.34 +	else if (!(address >> 61) && warn_region0_address) {
    1.35 +		REGS *regs = vcpu_regs(vcpu);
    1.36 +		unsigned long viip = PSCB(vcpu,iip);
    1.37 +		unsigned long vipsr = PSCB(vcpu,ipsr);
    1.38 +		unsigned long iip = regs->cr_iip;
    1.39 +		unsigned long ipsr = regs->cr_ipsr;
    1.40 +		printk("vcpu_translate: bad address %p, viip=%p, vipsr=%p, iip=%p, ipsr=%p continuing\n", address, viip, vipsr, iip, ipsr);
    1.41 +	}
    1.42  
    1.43  	rr = PSCB(vcpu,rrs)[address>>61];
    1.44  	rid = rr & RR_RID_MASK;