ia64/xen-unstable
changeset 16250:d31f63db5f1e
x86, hvm: Allow Cirrus VGA BIOS to clear framebuffer with minimal PIO writes.
Signed-off-by: Ben Guthro <bguthro@virtualron.com>
Signed-off-by: Gary Grebus <ggrebus@virtualiron.com>
Signed-off-by: Ben Guthro <bguthro@virtualron.com>
Signed-off-by: Gary Grebus <ggrebus@virtualiron.com>
author | Keir Fraser <keir@xensource.com> |
---|---|
date | Fri Oct 26 10:41:07 2007 +0100 (2007-10-26) |
parents | 413107fa49a5 |
children | 0fbb6ec3ed47 |
files | tools/firmware/vgabios/clext.c tools/ioemu/hw/cirrus_vga.c |
line diff
1.1 --- a/tools/firmware/vgabios/clext.c Fri Oct 26 10:33:12 2007 +0100 1.2 +++ b/tools/firmware/vgabios/clext.c Fri Oct 26 10:41:07 2007 +0100 1.3 @@ -1489,14 +1489,26 @@ cirrus_clear_vram_1: 1.4 mov dx, #0x3ce 1.5 out dx, ax 1.6 push ax 1.7 - mov cx, #0xa000 1.8 - mov es, cx 1.9 - xor di, di 1.10 + 1.11 +;; Windows Vista appears to be emulating this sequence as part of changing 1.12 +;; screen resolution, but it generates 4096 writes per iteration. 1.13 +;; Instead, use a magic register sequence to write the whole bank. 1.14 +;;mov cx, #0xa000 1.15 +;;mov es, cx 1.16 +;;xor di, di 1.17 +;;mov ax, si 1.18 +;;mov cx, #8192 1.19 +;;cld 1.20 +;;rep 1.21 +;; stosw 1.22 mov ax, si 1.23 - mov cx, #8192 1.24 - cld 1.25 - rep 1.26 - stosw 1.27 + shl ax, #8 1.28 + mov al, #0xfe 1.29 + out dx, ax ;; Low byte of value to be written to the bank 1.30 + mov ax, si 1.31 + mov al, #0xff 1.32 + out dx, ax ;; High byte and trigger the write 1.33 + 1.34 pop ax 1.35 inc ah 1.36 cmp ah, bl
2.1 --- a/tools/ioemu/hw/cirrus_vga.c Fri Oct 26 10:33:12 2007 +0100 2.2 +++ b/tools/ioemu/hw/cirrus_vga.c Fri Oct 26 10:41:07 2007 +0100 2.3 @@ -294,6 +294,7 @@ void *shared_vram; 2.4 2.5 static void cirrus_bitblt_reset(CirrusVGAState *s); 2.6 static void cirrus_update_memory_access(CirrusVGAState *s); 2.7 +static void cirrus_vga_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val); 2.8 2.9 /*************************************** 2.10 * 2.11 @@ -1497,6 +1498,17 @@ cirrus_hook_write_gr(CirrusVGAState * s, 2.12 case 0x31: // BLT STATUS/START 2.13 cirrus_write_bitblt(s, reg_value); 2.14 break; 2.15 + 2.16 + // Extension to allow BIOS to clear 16K VRAM bank in one operation 2.17 + case 0xFE: 2.18 + s->gr[reg_index] = reg_value; // Lower byte of value to be written 2.19 + break; 2.20 + case 0xFF: { 2.21 + target_phys_addr_t addr; 2.22 + for (addr = 0xa0000; addr < 0xa4000; addr += 2) 2.23 + cirrus_vga_mem_writew(s, addr, (reg_value << 8) | s->gr[0xFE]); 2.24 + } 2.25 + break; 2.26 default: 2.27 #ifdef DEBUG_CIRRUS 2.28 printf("cirrus: outport gr_index %02x, gr_value %02x\n", reg_index,