ia64/xen-unstable
changeset 13368:cd6598396086
[IA64] Simplify lazy cover algorithm
Signed-off-by: Anthony Xu <anthony.xu@intel.com>
Signed-off-by: Anthony Xu <anthony.xu@intel.com>
author | awilliam@xenbuild2.aw |
---|---|
date | Fri Jan 12 12:11:11 2007 -0700 (2007-01-12) |
parents | 01ea554f1c5e |
children | c1b98df7386d |
files | linux-2.6-xen-sparse/arch/ia64/kernel/asm-offsets.c linux-2.6-xen-sparse/arch/ia64/xen/xenminstate.h linux-2.6-xen-sparse/include/asm-ia64/xen/privop.h xen/arch/ia64/asm-xsi-offsets.c xen/arch/ia64/xen/faults.c xen/arch/ia64/xen/hyperprivop.S xen/arch/ia64/xen/vcpu.c xen/include/public/arch-ia64.h |
line diff
1.1 --- a/linux-2.6-xen-sparse/arch/ia64/kernel/asm-offsets.c Thu Jan 11 16:56:58 2007 -0700 1.2 +++ b/linux-2.6-xen-sparse/arch/ia64/kernel/asm-offsets.c Fri Jan 12 12:11:11 2007 -0700 1.3 @@ -280,7 +280,6 @@ void foo(void) 1.4 DEFINE_MAPPED_REG_OFS(XSI_IHA_OFS, iha); 1.5 DEFINE_MAPPED_REG_OFS(XSI_ITIR_OFS, itir); 1.6 DEFINE_MAPPED_REG_OFS(XSI_PSR_IC_OFS, interrupt_collection_enabled); 1.7 - DEFINE_MAPPED_REG_OFS(XSI_INCOMPL_REGFR_OFS, incomplete_regframe); 1.8 DEFINE_MAPPED_REG_OFS(XSI_BANKNUM_OFS, banknum); 1.9 DEFINE_MAPPED_REG_OFS(XSI_BANK0_R16_OFS, bank0_regs[0]); 1.10 DEFINE_MAPPED_REG_OFS(XSI_BANK1_R16_OFS, bank1_regs[0]);
2.1 --- a/linux-2.6-xen-sparse/arch/ia64/xen/xenminstate.h Thu Jan 11 16:56:58 2007 -0700 2.2 +++ b/linux-2.6-xen-sparse/arch/ia64/xen/xenminstate.h Fri Jan 12 12:11:11 2007 -0700 2.3 @@ -151,16 +151,7 @@ 2.4 .mem.offset 8,0; st8.spill [r17]=r11,24; \ 2.5 ;; \ 2.6 /* xen special handling for possibly lazy cover */ \ 2.7 - movl r8=XSI_INCOMPL_REGFR; \ 2.8 - ;; \ 2.9 - ld4 r30=[r8]; \ 2.10 - ;; \ 2.11 - /* set XSI_INCOMPL_REGFR 0 */ \ 2.12 - st4 [r8]=r0; \ 2.13 - cmp.eq p6,p7=r30,r0; \ 2.14 - ;; /* not sure if this stop bit is necessary */ \ 2.15 -(p6) adds r8=XSI_PRECOVER_IFS-XSI_INCOMPL_REGFR,r8; \ 2.16 -(p7) adds r8=XSI_IFS-XSI_INCOMPL_REGFR,r8; \ 2.17 + movl r8=XSI_PRECOVER_IFS; \ 2.18 ;; \ 2.19 ld8 r30=[r8]; \ 2.20 ;; \
3.1 --- a/linux-2.6-xen-sparse/include/asm-ia64/xen/privop.h Thu Jan 11 16:56:58 2007 -0700 3.2 +++ b/linux-2.6-xen-sparse/include/asm-ia64/xen/privop.h Fri Jan 12 12:11:11 2007 -0700 3.3 @@ -49,7 +49,6 @@ 3.4 3.5 #define XSI_IFS (XSI_BASE + XSI_IFS_OFS) 3.6 #define XSI_PRECOVER_IFS (XSI_BASE + XSI_PRECOVER_IFS_OFS) 3.7 -#define XSI_INCOMPL_REGFR (XSI_BASE + XSI_INCOMPL_REGFR_OFS) 3.8 #define XSI_IFA (XSI_BASE + XSI_IFA_OFS) 3.9 #define XSI_ISR (XSI_BASE + XSI_ISR_OFS) 3.10 #define XSI_IIM (XSI_BASE + XSI_IIM_OFS)
4.1 --- a/xen/arch/ia64/asm-xsi-offsets.c Thu Jan 11 16:56:58 2007 -0700 4.2 +++ b/xen/arch/ia64/asm-xsi-offsets.c Fri Jan 12 12:11:11 2007 -0700 4.3 @@ -62,7 +62,6 @@ void foo(void) 4.4 DEFINE_MAPPED_REG_OFS(XSI_ITV_OFS, itv); 4.5 DEFINE_MAPPED_REG_OFS(XSI_PTA_OFS, pta); 4.6 DEFINE_MAPPED_REG_OFS(XSI_PSR_IC_OFS, interrupt_collection_enabled); 4.7 - DEFINE_MAPPED_REG_OFS(XSI_INCOMPL_REGFR_OFS, incomplete_regframe); 4.8 DEFINE_MAPPED_REG_OFS(XSI_METAPHYS_OFS, metaphysical_mode); 4.9 DEFINE_MAPPED_REG_OFS(XSI_BANKNUM_OFS, banknum); 4.10 DEFINE_MAPPED_REG_OFS(XSI_BANK0_R16_OFS, bank0_regs[0]);
5.1 --- a/xen/arch/ia64/xen/faults.c Thu Jan 11 16:56:58 2007 -0700 5.2 +++ b/xen/arch/ia64/xen/faults.c Fri Jan 12 12:11:11 2007 -0700 5.3 @@ -88,7 +88,6 @@ void reflect_interruption(unsigned long 5.4 PSCB(v, isr) = isr; 5.5 PSCB(v, iip) = regs->cr_iip; 5.6 PSCB(v, ifs) = 0; 5.7 - PSCB(v, incomplete_regframe) = 0; 5.8 5.9 regs->cr_iip = ((unsigned long)PSCBX(v, iva) + vector) & ~0xffUL; 5.10 regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET; 5.11 @@ -155,7 +154,6 @@ void reflect_event(void) 5.12 PSCB(v, isr) = isr; 5.13 PSCB(v, iip) = regs->cr_iip; 5.14 PSCB(v, ifs) = 0; 5.15 - PSCB(v, incomplete_regframe) = 0; 5.16 5.17 regs->cr_iip = v->arch.event_callback_ip; 5.18 regs->cr_ipsr = (regs->cr_ipsr & ~DELIVER_PSR_CLR) | DELIVER_PSR_SET; 5.19 @@ -185,7 +183,6 @@ static int handle_lazy_cover(struct vcpu 5.20 { 5.21 if (!PSCB(v, interrupt_collection_enabled)) { 5.22 PSCB(v, ifs) = regs->cr_ifs; 5.23 - PSCB(v, incomplete_regframe) = 1; 5.24 regs->cr_ifs = 0; 5.25 perfc_incrc(lazy_cover); 5.26 return 1; // retry same instruction with cr.ifs off
6.1 --- a/xen/arch/ia64/xen/hyperprivop.S Thu Jan 11 16:56:58 2007 -0700 6.2 +++ b/xen/arch/ia64/xen/hyperprivop.S Fri Jan 12 12:11:11 2007 -0700 6.3 @@ -192,7 +192,6 @@ END(fast_hyperprivop) 6.4 // and isr.ri to cr.isr.ri (all other bits zero) 6.5 // - cover and set shared_mem precover_ifs to cr.ifs 6.6 // ^^^ MISSED THIS FOR fast_break?? 6.7 -// - set shared_mem ifs and incomplete_regframe to 0 6.8 // - set shared_mem interrupt_delivery_enabled to 0 6.9 // - set shared_mem interrupt_collection_enabled to 0 6.10 // - set r31 to SHAREDINFO_ADDR 6.11 @@ -272,11 +271,9 @@ ENTRY(hyper_ssm_i) 6.12 st1 [r22]=r20 6.13 st4 [r18]=r0 6.14 // cover and set shared_mem precover_ifs to cr.ifs 6.15 - // set shared_mem ifs and incomplete_regframe to 0 6.16 + // set shared_mem ifs to 0 6.17 cover ;; 6.18 mov r20=cr.ifs;; 6.19 - adds r21=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;; 6.20 - st4 [r21]=r0 ;; 6.21 adds r21=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;; 6.22 st8 [r21]=r0 ;; 6.23 adds r21=XSI_PRECOVER_IFS_OFS-XSI_PSR_IC_OFS,r18 ;; 6.24 @@ -459,11 +456,9 @@ GLOBAL_ENTRY(fast_tick_reflect) 6.25 st1 [r22]=r20;; 6.26 st4 [r18]=r0;; 6.27 // cover and set shared_mem precover_ifs to cr.ifs 6.28 - // set shared_mem ifs and incomplete_regframe to 0 6.29 + // set shared_mem ifs to 0 6.30 cover ;; 6.31 mov r20=cr.ifs;; 6.32 - adds r21=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;; 6.33 - st4 [r21]=r0 ;; 6.34 adds r21=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;; 6.35 st8 [r21]=r0 ;; 6.36 adds r21=XSI_PRECOVER_IFS_OFS-XSI_PSR_IC_OFS,r18 ;; 6.37 @@ -645,11 +640,9 @@ ENTRY(fast_reflect) 6.38 st1 [r24]=r22 6.39 st4 [r18]=r0;; 6.40 // cover and set shared_mem precover_ifs to cr.ifs 6.41 - // set shared_mem ifs and incomplete_regframe to 0 6.42 + // set shared_mem ifs to 0 6.43 cover ;; 6.44 mov r24=cr.ifs;; 6.45 - adds r21=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;; 6.46 - st4 [r21]=r0 ;; 6.47 adds r21=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;; 6.48 st8 [r21]=r0 ;; 6.49 adds r21=XSI_PRECOVER_IFS_OFS-XSI_PSR_IC_OFS,r18 ;; 6.50 @@ -1082,8 +1075,6 @@ 1: // OK now, let's do an rfi. 6.51 just_do_rfi: 6.52 // r18=&vpsr.i|vpsr.ic, r21==vpsr, r22=vcr.iip 6.53 mov cr.iip=r22;; 6.54 - adds r20=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;; 6.55 - st4 [r20]=r0 ;; 6.56 adds r20=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;; 6.57 ld8 r20=[r20];; 6.58 dep r20=0,r20,38,25;; // ensure ifs has no reserved bits set 6.59 @@ -1259,20 +1250,16 @@ ENTRY(rfi_with_interrupt) 6.60 st1 [r22]=r20 6.61 st4 [r18]=r0;; 6.62 // cover and set shared_mem precover_ifs to cr.ifs 6.63 - // set shared_mem ifs and incomplete_regframe to 0 6.64 + // set shared_mem ifs to 0 6.65 #if 0 6.66 cover ;; 6.67 mov r20=cr.ifs;; 6.68 - adds r22=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;; 6.69 - st4 [r22]=r0 ;; 6.70 adds r22=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;; 6.71 st8 [r22]=r0 ;; 6.72 adds r22=XSI_PRECOVER_IFS_OFS-XSI_PSR_IC_OFS,r18 ;; 6.73 st8 [r22]=r20 ;; 6.74 // leave cr.ifs alone for later rfi 6.75 #else 6.76 - adds r22=XSI_INCOMPL_REG_OFS-XSI_PSR_IC_OFS,r18 ;; 6.77 - st4 [r22]=r0 ;; 6.78 adds r22=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 ;; 6.79 ld8 r20=[r22];; 6.80 st8 [r22]=r0 ;; 6.81 @@ -1334,13 +1321,9 @@ ENTRY(hyper_cover) 6.82 mov r25=cr.iip;; 6.83 // skip test for vpsr.ic.. it's a prerequisite for hyperprivops 6.84 cover ;; 6.85 - adds r20=XSI_INCOMPL_REGFR_OFS-XSI_PSR_IC_OFS,r18 ;; 6.86 - mov r30=cr.ifs;; 6.87 - adds r22=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18 6.88 - ld4 r21=[r20] ;; 6.89 - cmp.eq p6,p7=r21,r0 ;; 6.90 -(p6) st8 [r22]=r30;; 6.91 -(p7) st4 [r20]=r0;; 6.92 + mov r30=cr.ifs 6.93 + adds r22=XSI_IFS_OFS-XSI_PSR_IC_OFS,r18;; 6.94 + st8 [r22]=r30;; 6.95 mov cr.ifs=r0;; 6.96 // adjust return address to skip over break instruction 6.97 extr.u r26=r24,41,2 ;;
7.1 --- a/xen/arch/ia64/xen/vcpu.c Thu Jan 11 16:56:58 2007 -0700 7.2 +++ b/xen/arch/ia64/xen/vcpu.c Fri Jan 12 12:11:11 2007 -0700 7.3 @@ -613,7 +613,6 @@ IA64FAULT vcpu_get_ifs(VCPU * vcpu, u64 7.4 //PSCB(vcpu,ifs) = PSCB(vcpu)->regs.cr_ifs; 7.5 //*pval = PSCB(vcpu,regs).cr_ifs; 7.6 *pval = PSCB(vcpu, ifs); 7.7 - PSCB(vcpu, incomplete_regframe) = 0; 7.8 return IA64_NO_FAULT; 7.9 } 7.10 7.11 @@ -1362,7 +1361,6 @@ IA64FAULT vcpu_rfi(VCPU * vcpu) 7.12 printk("*** DOMAIN TRYING TO TURN ON BIG-ENDIAN!!!\n"); 7.13 return IA64_ILLOP_FAULT; 7.14 } 7.15 - PSCB(vcpu, incomplete_regframe) = 0; // is this necessary? 7.16 7.17 ifs = PSCB(vcpu, ifs); 7.18 if (ifs > 0x8000000000000000UL) { 7.19 @@ -1397,10 +1395,7 @@ IA64FAULT vcpu_cover(VCPU * vcpu) 7.20 REGS *regs = vcpu_regs(vcpu); 7.21 7.22 if (!PSCB(vcpu, interrupt_collection_enabled)) { 7.23 - if (!PSCB(vcpu, incomplete_regframe)) 7.24 - PSCB(vcpu, ifs) = regs->cr_ifs; 7.25 - else 7.26 - PSCB(vcpu, incomplete_regframe) = 0; 7.27 + PSCB(vcpu, ifs) = regs->cr_ifs; 7.28 } 7.29 regs->cr_ifs = 0; 7.30 return IA64_NO_FAULT;
8.1 --- a/xen/include/public/arch-ia64.h Thu Jan 11 16:56:58 2007 -0700 8.2 +++ b/xen/include/public/arch-ia64.h Fri Jan 12 12:11:11 2007 -0700 8.3 @@ -287,10 +287,9 @@ struct mapped_regs { 8.4 */ 8.5 unsigned char *interrupt_mask_addr; 8.6 int pending_interruption; 8.7 - int incomplete_regframe; // see SDM vol2 6.8 8.8 unsigned char vpsr_pp; 8.9 - unsigned char reserved5_2[7]; 8.10 - unsigned long reserved5_1[3]; 8.11 + unsigned char reserved5_2[3]; 8.12 + unsigned long reserved5_1[4]; 8.13 int metaphysical_mode; // 1 = use metaphys mapping, 0 = use virtual 8.14 int banknum; // 0 or 1, which virtual register bank is active 8.15 unsigned long rrs[8]; // region registers