ia64/xen-unstable

changeset 9863:cd1df13fb1c4

[IA64] Removed warning messages

Signed-off-by: Masaki Kanno <kanno.masaki@jp.fujitsu.com>
author awilliam@xenbuild.aw
date Mon May 08 12:56:57 2006 -0600 (2006-05-08)
parents cf66d644b4d6
children da5a42b7d719
files xen/arch/ia64/linux-xen/unaligned.c xen/arch/ia64/vmx/vmx_vcpu.c xen/arch/ia64/vmx/vtlb.c xen/arch/ia64/xen/process.c
line diff
     1.1 --- a/xen/arch/ia64/linux-xen/unaligned.c	Mon May 08 12:52:12 2006 -0600
     1.2 +++ b/xen/arch/ia64/linux-xen/unaligned.c	Mon May 08 12:56:57 2006 -0600
     1.3 @@ -377,7 +377,7 @@ get_rse_reg (struct pt_regs *regs, unsig
     1.4      if (ridx >= sof) {
     1.5          /* read of out-of-frame register returns an undefined value; 0 in our case.  */
     1.6          DPRINT("ignoring read from r%lu; only %lu registers are allocated!\n", r1, sof);
     1.7 -        panic("wrong stack register number (iip=%p)\n", regs->cr_iip);
     1.8 +        panic("wrong stack register number (iip=%lx)\n", regs->cr_iip);
     1.9      }
    1.10  
    1.11      if (ridx < sor)
     2.1 --- a/xen/arch/ia64/vmx/vmx_vcpu.c	Mon May 08 12:52:12 2006 -0600
     2.2 +++ b/xen/arch/ia64/vmx/vmx_vcpu.c	Mon May 08 12:56:57 2006 -0600
     2.3 @@ -206,7 +206,7 @@ IA64FAULT vmx_vcpu_set_rr(VCPU *vcpu, UI
     2.4      vcpu_get_rr(vcpu, reg, &oldrr.rrval);
     2.5      newrr.rrval=val;
     2.6      if (newrr.rid >= (1 << vcpu->domain->arch.rid_bits))
     2.7 -        panic_domain (NULL, "use of invalid rid %lx\n", newrr.rid);
     2.8 +        panic_domain (NULL, "use of invalid rid %x\n", newrr.rid);
     2.9      if(oldrr.ps!=newrr.ps){
    2.10          thash_purge_all(vcpu);
    2.11      }
     3.1 --- a/xen/arch/ia64/vmx/vtlb.c	Mon May 08 12:52:12 2006 -0600
     3.2 +++ b/xen/arch/ia64/vmx/vtlb.c	Mon May 08 12:56:57 2006 -0600
     3.3 @@ -390,9 +390,9 @@ void vtlb_insert(thash_cb_t *hcb, u64 pt
     3.4      vcpu_get_rr(current, va, &vrr.rrval);
     3.5      if (vrr.ps != ps) {
     3.6  //        machine_tlb_insert(hcb->vcpu, entry);
     3.7 -    	panic_domain(NULL, "not preferred ps with va: 0x%lx vrr.ps=%d ps=%d\n",
     3.8 -		     va, vrr.ps, ps);
     3.9 -    	return;
    3.10 +        panic_domain(NULL, "not preferred ps with va: 0x%lx vrr.ps=%d ps=%ld\n",
    3.11 +                     va, vrr.ps, ps);
    3.12 +        return;
    3.13      }
    3.14      hash_table = vsa_thash(hcb->pta, va, vrr.rrval, &tag);
    3.15      if( INVALID_TLB(hash_table) ) {
     4.1 --- a/xen/arch/ia64/xen/process.c	Mon May 08 12:52:12 2006 -0600
     4.2 +++ b/xen/arch/ia64/xen/process.c	Mon May 08 12:56:57 2006 -0600
     4.3 @@ -195,10 +195,10 @@ void check_bad_nested_interruption(unsig
     4.4  	}
     4.5  	vector &= ~0xf;
     4.6  	if (vector != IA64_DATA_TLB_VECTOR &&
     4.7 -		vector != IA64_ALT_DATA_TLB_VECTOR &&
     4.8 -		vector != IA64_VHPT_TRANS_VECTOR) {
     4.9 -panic_domain(regs,"psr.ic off, delivering fault=%lx,ipsr=%p,iip=%p,ifa=%p,isr=%p,PSCB.iip=%p\n",
    4.10 -	vector,regs->cr_ipsr,regs->cr_iip,PSCB(v,ifa),isr,PSCB(v,iip));
    4.11 +	    vector != IA64_ALT_DATA_TLB_VECTOR &&
    4.12 +	    vector != IA64_VHPT_TRANS_VECTOR) {
    4.13 +		panic_domain(regs,"psr.ic off, delivering fault=%lx,ipsr=%lx,iip=%lx,ifa=%lx,isr=%lx,PSCB.iip=%lx\n",
    4.14 +		             vector,regs->cr_ipsr,regs->cr_iip,PSCB(v,ifa),isr,PSCB(v,iip));
    4.15  	}
    4.16  }
    4.17  
    4.18 @@ -358,7 +358,7 @@ ia64_fault (unsigned long vector, unsign
    4.19  	struct pt_regs *regs = (struct pt_regs *) &stack;
    4.20  	unsigned long code;
    4.21  	char buf[128];
    4.22 -	static const char * const reason[] = {
    4.23 +	static const char *reason[] = {
    4.24  		"IA-64 Illegal Operation fault",
    4.25  		"IA-64 Privileged Operation fault",
    4.26  		"IA-64 Privileged Register fault",