ia64/xen-unstable

changeset 19468:cc4a2290c224

x86: small adjustment to asm constraints for c/s 19400

Properly indicate the variable that the asm writes to, and allow
compiler more freedom in selecting a suitable input operand for the
ltr instruction.

Signed-off-by: Jan Beulich <jbeulich@novell.com>
author Keir Fraser <keir.fraser@citrix.com>
date Tue Mar 31 13:14:10 2009 +0100 (2009-03-31)
parents 28a4dacea7ab
children f9501b0bcc1b
files xen/arch/x86/traps.c
line diff
     1.1 --- a/xen/arch/x86/traps.c	Tue Mar 31 13:12:35 2009 +0100
     1.2 +++ b/xen/arch/x86/traps.c	Tue Mar 31 13:14:10 2009 +0100
     1.3 @@ -3048,8 +3048,8 @@ void load_TR(void)
     1.4  
     1.5      /* Switch to non-compat GDT (which has B bit clear) to execute LTR. */
     1.6      asm volatile (
     1.7 -        "sgdt %1; lgdt %2; ltr %%ax; lgdt %1"
     1.8 -        : : "a" (TSS_ENTRY << 3), "m" (old_gdt), "m" (tss_gdt) : "memory" );
     1.9 +        "sgdt %0; lgdt %2; ltr %w1; lgdt %0"
    1.10 +        : "=m" (old_gdt) : "rm" (TSS_ENTRY << 3), "m" (tss_gdt) : "memory" );
    1.11  }
    1.12  
    1.13  void __devinit percpu_traps_init(void)