ia64/xen-unstable

changeset 15880:c94683db19e9

[IA64] Remove unused arguments of vmx_switch_rr7

Signed-off-by: Tristan Gingold <tgingold@free.fr>
author Alex Williamson <alex.williamson@hp.com>
date Tue Sep 11 15:07:42 2007 -0600 (2007-09-11)
parents fec8b52b1a7f
children 42caadb14edb
files xen/arch/ia64/vmx/vmx_entry.S xen/arch/ia64/vmx/vmx_phy_mode.c xen/arch/ia64/vmx/vmx_vcpu.c xen/include/asm-ia64/vmx_vcpu.h
line diff
     1.1 --- a/xen/arch/ia64/vmx/vmx_entry.S	Tue Sep 11 19:11:02 2007 +0100
     1.2 +++ b/xen/arch/ia64/vmx/vmx_entry.S	Tue Sep 11 15:07:42 2007 -0600
     1.3 @@ -603,10 +603,8 @@ END(ia64_leave_hypercall)
     1.4  
     1.5  /*
     1.6   * in0: new rr7
     1.7 - * in1: virtual address of shared_info
     1.8 - * in2: virtual address of shared_arch_info (VPD)
     1.9 - * in3: virtual address of guest_vhpt
    1.10 - * in4: virtual address of pal code segment
    1.11 + * in1: virtual address of guest_vhpt
    1.12 + * in2: virtual address of pal code segment
    1.13   * r8: will contain old rid value
    1.14   */
    1.15  
    1.16 @@ -622,7 +620,7 @@ END(ia64_leave_hypercall)
    1.17  GLOBAL_ENTRY(vmx_switch_rr7)
    1.18     // not sure this unwind statement is correct...
    1.19     .prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(1)
    1.20 -   alloc loc1 = ar.pfs, 5, 9, 0, 0
    1.21 +   alloc loc1 = ar.pfs, 3, 7, 0, 0
    1.22  1: {
    1.23       mov r28  = in0        // copy procedure index
    1.24       mov r8   = ip         // save ip to compute branch
    1.25 @@ -633,22 +631,20 @@ 1: {
    1.26      ;;
    1.27      tpa loc2 = loc2         // get physical address of per cpu date
    1.28      ;;
    1.29 -    dep loc3 = 0,in1,60,4          // get physical address of shared_info
    1.30 -    dep loc4 = 0,in2,60,4          // get physical address of shared_arch_info
    1.31 -    dep loc5 = 0,in3,60,4          // get physical address of guest_vhpt
    1.32 -    dep loc6 = 0,in4,60,4          // get physical address of pal code
    1.33 +    dep loc5 = 0,in1,60,4          // get physical address of guest_vhpt
    1.34 +    dep loc6 = 0,in2,60,4          // get physical address of pal code
    1.35      ;;
    1.36 -    mov loc7 = psr          // save psr
    1.37 +    mov loc4 = psr          // save psr
    1.38      ;;
    1.39 -    mov loc8 = ar.rsc           // save RSE configuration
    1.40 +    mov loc3 = ar.rsc           // save RSE configuration
    1.41      ;;
    1.42      mov ar.rsc = 0          // put RSE in enforced lazy, LE mode
    1.43      movl r16=PSR_BITS_TO_CLEAR
    1.44      movl r17=PSR_BITS_TO_SET
    1.45      ;;
    1.46 -    or loc7 = loc7,r17      // add in psr the bits to set
    1.47 +    or loc4 = loc4,r17      // add in psr the bits to set
    1.48      ;;
    1.49 -    andcm r16=loc7,r16      // removes bits to clear from psr
    1.50 +    andcm r16=loc4,r16      // removes bits to clear from psr
    1.51      br.call.sptk.many rp=ia64_switch_mode_phys
    1.52  1:
    1.53     // now in physical mode with psr.i/ic off so do rr7 switch
    1.54 @@ -709,10 +705,10 @@ 1:
    1.55     or loc5 = r25,loc5          // construct PA | page properties
    1.56     mov r23 = IA64_GRANULE_SHIFT <<2
    1.57     ;;
    1.58 -   ptr.d   in3,r23
    1.59 +   ptr.d   in1,r23
    1.60     ;;
    1.61     mov cr.itir=r23
    1.62 -   mov cr.ifa=in3
    1.63 +   mov cr.ifa=in1
    1.64     ;;
    1.65     itr.d dtr[r24]=loc5     // wire in new mapping...
    1.66     ;;
    1.67 @@ -723,21 +719,21 @@ 1:
    1.68     or loc6 = r25,loc6          // construct PA | page properties
    1.69     mov r23 = IA64_GRANULE_SHIFT<<2
    1.70     ;;
    1.71 -   ptr.i   in4,r23
    1.72 +   ptr.i   in2,r23
    1.73     ;;
    1.74     mov cr.itir=r23
    1.75 -   mov cr.ifa=in4
    1.76 +   mov cr.ifa=in2
    1.77     ;;
    1.78     itr.i itr[r24]=loc6     // wire in new mapping...
    1.79     ;;
    1.80  
    1.81     // done, switch back to virtual and return
    1.82 -   mov r16=loc7            // r16= original psr
    1.83 +   mov r16=loc4            // r16= original psr
    1.84     br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
    1.85     mov ar.pfs = loc1
    1.86     mov rp = loc0
    1.87     ;;
    1.88 -   mov ar.rsc=loc8         // restore RSE configuration
    1.89 +   mov ar.rsc=loc3         // restore RSE configuration
    1.90     srlz.d              // seralize restoration of psr.l
    1.91     br.ret.sptk.many rp
    1.92  END(vmx_switch_rr7)
     2.1 --- a/xen/arch/ia64/vmx/vmx_phy_mode.c	Tue Sep 11 19:11:02 2007 +0100
     2.2 +++ b/xen/arch/ia64/vmx/vmx_phy_mode.c	Tue Sep 11 15:07:42 2007 -0600
     2.3 @@ -104,8 +104,6 @@ physical_mode_init(VCPU *vcpu)
     2.4      vcpu->arch.mode_flags = GUEST_IN_PHY;
     2.5  }
     2.6  
     2.7 -extern void vmx_switch_rr7(unsigned long ,shared_info_t*,void *,void *,void *);
     2.8 -
     2.9  void
    2.10  physical_tlb_miss(VCPU *vcpu, u64 vadr, int type)
    2.11  {
    2.12 @@ -185,8 +183,6 @@ vmx_load_all_rr(VCPU *vcpu)
    2.13  		     vrrtomrr(vcpu, VMX(vcpu, vrr[VRN6])));
    2.14  	ia64_dv_serialize_data();
    2.15  	vmx_switch_rr7(vrrtomrr(vcpu,VMX(vcpu, vrr[VRN7])),
    2.16 -			(void *)vcpu->domain->shared_info,
    2.17 -			(void *)vcpu->arch.privregs,
    2.18  			(void *)vcpu->arch.vhpt.hash, pal_vaddr );
    2.19  	ia64_set_pta(VMX(vcpu, mpta));
    2.20  	vmx_ia64_set_dcr(vcpu);
     3.1 --- a/xen/arch/ia64/vmx/vmx_vcpu.c	Tue Sep 11 19:11:02 2007 +0100
     3.2 +++ b/xen/arch/ia64/vmx/vmx_vcpu.c	Tue Sep 11 15:07:42 2007 -0600
     3.3 @@ -165,9 +165,8 @@ IA64FAULT vmx_vcpu_set_rr(VCPU *vcpu, u6
     3.4      VMX(vcpu,vrr[reg>>VRN_SHIFT]) = val;
     3.5      switch((u64)(reg>>VRN_SHIFT)) {
     3.6      case VRN7:
     3.7 -        vmx_switch_rr7(vrrtomrr(vcpu,val),vcpu->domain->shared_info,
     3.8 -        (void *)vcpu->arch.privregs,
     3.9 -        (void *)vcpu->arch.vhpt.hash, pal_vaddr );
    3.10 +        vmx_switch_rr7(vrrtomrr(vcpu,val),
    3.11 +                       (void *)vcpu->arch.vhpt.hash, pal_vaddr );
    3.12         break;
    3.13      case VRN4:
    3.14          rrval = vrrtomrr(vcpu,val);
     4.1 --- a/xen/include/asm-ia64/vmx_vcpu.h	Tue Sep 11 19:11:02 2007 +0100
     4.2 +++ b/xen/include/asm-ia64/vmx_vcpu.h	Tue Sep 11 15:07:42 2007 -0600
     4.3 @@ -114,8 +114,7 @@ extern void memwrite_v(VCPU * vcpu, thas
     4.4                         size_t s);
     4.5  extern void memwrite_p(VCPU * vcpu, u64 * src, u64 * dest, size_t s);
     4.6  extern void vcpu_load_kernel_regs(VCPU * vcpu);
     4.7 -extern void vmx_switch_rr7(unsigned long, shared_info_t *, void *, void *,
     4.8 -                           void *);
     4.9 +extern void vmx_switch_rr7(unsigned long, void *, void *);
    4.10  
    4.11  extern void dtlb_fault(VCPU * vcpu, u64 vadr);
    4.12  extern void nested_dtlb(VCPU * vcpu);