ia64/xen-unstable

changeset 18610:c89fd1e9c49c

vt-d: Fix dma_set_pte_superpage

Superpage bit is bit 7 in VT-d page table entry.

Signed-off-by: Weidong Han <weidong.han@intel.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Oct 10 10:04:58 2008 +0100 (2008-10-10)
parents a9be7b357b0b
children 583e45983aaa
files xen/drivers/passthrough/vtd/iommu.h
line diff
     1.1 --- a/xen/drivers/passthrough/vtd/iommu.h	Fri Oct 10 10:03:28 2008 +0100
     1.2 +++ b/xen/drivers/passthrough/vtd/iommu.h	Fri Oct 10 10:04:58 2008 +0100
     1.3 @@ -258,15 +258,17 @@ struct context_entry {
     1.4  struct dma_pte {
     1.5      u64 val;
     1.6  };
     1.7 -#define dma_clear_pte(p)    do {(p).val = 0;} while(0)
     1.8 -#define dma_set_pte_readable(p) do {(p).val |= 1;} while(0)
     1.9 -#define dma_set_pte_writable(p) do {(p).val |= 2;} while(0)
    1.10 -#define dma_set_pte_superpage(p) do {(p).val |= 8;} while(0)
    1.11 -#define dma_set_pte_prot(p, prot) do { (p).val = (((p).val >> 2) << 2) | ((prot) & 3);} while (0)
    1.12 -#define dma_pte_addr(p) ((p).val & PAGE_MASK_4K)
    1.13 -#define dma_set_pte_addr(p, addr) do {(p).val |= ((addr) >> PAGE_SHIFT_4K) << PAGE_SHIFT_4K;} while(0)
    1.14  #define DMA_PTE_READ (1)
    1.15  #define DMA_PTE_WRITE (2)
    1.16 +#define dma_clear_pte(p)    do {(p).val = 0;} while(0)
    1.17 +#define dma_set_pte_readable(p) do {(p).val |= DMA_PTE_READ;} while(0)
    1.18 +#define dma_set_pte_writable(p) do {(p).val |= DMA_PTE_WRITE;} while(0)
    1.19 +#define dma_set_pte_superpage(p) do {(p).val |= (1 << 7);} while(0)
    1.20 +#define dma_set_pte_prot(p, prot) \
    1.21 +            do {(p).val = ((p).val & ~3) | ((prot) & 3); } while (0)
    1.22 +#define dma_pte_addr(p) ((p).val & PAGE_MASK_4K)
    1.23 +#define dma_set_pte_addr(p, addr) do {\
    1.24 +            (p).val |= ((addr) & PAGE_MASK_4K); } while (0)
    1.25  #define dma_pte_present(p) (((p).val & 3) != 0)
    1.26  
    1.27  /* interrupt remap entry */