ia64/xen-unstable

changeset 10433:c5005be9ef91

[IA64] Create vpsr_pp in privregs instead of using tmp[8].

Signed-off-by: Tristan Gingold <tristan.gingold@bull.net>
author awilliam@xenbuild.aw
date Tue Jun 20 15:56:48 2006 -0600 (2006-06-20)
parents 59be60d5664b
children c78f750a264c
files xen/arch/ia64/xen/vcpu.c xen/include/public/arch-ia64.h
line diff
     1.1 --- a/xen/arch/ia64/xen/vcpu.c	Tue Jun 20 10:40:14 2006 -0600
     1.2 +++ b/xen/arch/ia64/xen/vcpu.c	Tue Jun 20 15:56:48 2006 -0600
     1.3 @@ -271,8 +271,7 @@ IA64FAULT vcpu_reset_psr_sm(VCPU *vcpu, 
     1.4  	if (imm.pp) {
     1.5  		ipsr->pp = 1;
     1.6  		psr.pp = 1;	// priv perf ctrs always enabled
     1.7 -// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
     1.8 -		PSCB(vcpu,tmp[8]) = 0;	// but fool the domain if it gets psr
     1.9 +		PSCB(vcpu,vpsr_pp) = 0;	// but fool the domain if it gets psr
    1.10  	}
    1.11  	if (imm.up) { ipsr->up = 0; psr.up = 0; }
    1.12  	if (imm.sp) { ipsr->sp = 0; psr.sp = 0; }
    1.13 @@ -315,9 +314,9 @@ IA64FAULT vcpu_set_psr_sm(VCPU *vcpu, UI
    1.14  	if (imm.dfh) ipsr->dfh = 1;
    1.15  	if (imm.dfl) ipsr->dfl = 1;
    1.16  	if (imm.pp) {
    1.17 -		ipsr->pp = 1; psr.pp = 1;
    1.18 -// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
    1.19 -		PSCB(vcpu,tmp[8]) = 1;
    1.20 +		ipsr->pp = 1;
    1.21 +		psr.pp = 1;
    1.22 +		PSCB(vcpu,vpsr_pp) = 1;
    1.23  	}
    1.24  	if (imm.sp) { ipsr->sp = 1; psr.sp = 1; }
    1.25  	if (imm.i) {
    1.26 @@ -362,12 +361,11 @@ IA64FAULT vcpu_set_psr_l(VCPU *vcpu, UIN
    1.27  	if (newpsr.dfl) ipsr->dfl = 1;
    1.28  	if (newpsr.pp) {
    1.29  		ipsr->pp = 1; psr.pp = 1;
    1.30 -// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
    1.31 -		PSCB(vcpu,tmp[8]) = 1;
    1.32 +		PSCB(vcpu,vpsr_pp) = 1;
    1.33  	}
    1.34  	else {
    1.35  		ipsr->pp = 1; psr.pp = 1;
    1.36 -		PSCB(vcpu,tmp[8]) = 0;
    1.37 +		PSCB(vcpu,vpsr_pp) = 0;
    1.38  	}
    1.39  	if (newpsr.up) { ipsr->up = 1; psr.up = 1; }
    1.40  	if (newpsr.sp) { ipsr->sp = 1; psr.sp = 1; }
    1.41 @@ -406,8 +404,7 @@ IA64FAULT vcpu_get_psr(VCPU *vcpu, UINT6
    1.42  	else newpsr.ic = 0;
    1.43  	if (PSCB(vcpu,metaphysical_mode)) newpsr.dt = 0;
    1.44  	else newpsr.dt = 1;
    1.45 -// FIXME: need new field in mapped_regs_t for virtual psr.pp (psr.be too?)
    1.46 -	if (PSCB(vcpu,tmp[8])) newpsr.pp = 1;
    1.47 +	if (PSCB(vcpu,vpsr_pp)) newpsr.pp = 1;
    1.48  	else newpsr.pp = 0;
    1.49  	*pval = *(unsigned long *)&newpsr;
    1.50  	return IA64_NO_FAULT;
     2.1 --- a/xen/include/public/arch-ia64.h	Tue Jun 20 10:40:14 2006 -0600
     2.2 +++ b/xen/include/public/arch-ia64.h	Tue Jun 20 15:56:48 2006 -0600
     2.3 @@ -286,14 +286,15 @@ struct mapped_regs {
     2.4              unsigned long interrupt_mask_addr;
     2.5              int pending_interruption;
     2.6              int incomplete_regframe; // see SDM vol2 6.8
     2.7 -            unsigned long reserved5_1[4];
     2.8 +            unsigned char vpsr_pp;
     2.9 +            unsigned char reserved5_2[7];
    2.10 +            unsigned long reserved5_1[3];
    2.11              int metaphysical_mode; // 1 = use metaphys mapping, 0 = use virtual
    2.12              int banknum; // 0 or 1, which virtual register bank is active
    2.13              unsigned long rrs[8]; // region registers
    2.14              unsigned long krs[8]; // kernel registers
    2.15              unsigned long pkrs[8]; // protection key registers
    2.16              unsigned long tmp[8]; // temp registers (e.g. for hyperprivops)
    2.17 -            // FIXME: tmp[8] temp'ly being used for virtual psr.pp
    2.18          };
    2.19      };
    2.20      unsigned long  reserved6[3456];