ia64/xen-unstable

changeset 19207:c4c4ba857d8b

[IA64] This is consistent with the x86 version of this function.

Signed-off-by: Simon Horman <horms@verge.net.au>
author Isaku Yamahata <yamahata@valinux.co.jp>
date Mon Mar 02 16:52:22 2009 +0900 (2009-03-02)
parents b432c632ebe8
children 6227bf629626
files xen/arch/ia64/linux-xen/irq_ia64.c xen/arch/ia64/linux-xen/mca.c xen/include/asm-ia64/hvm/iommu.h xen/include/asm-ia64/linux-xen/asm/README.origin xen/include/asm-ia64/linux-xen/asm/hw_irq.h xen/include/asm-ia64/linux/asm/README.origin xen/include/asm-ia64/linux/asm/hw_irq.h
line diff
     1.1 --- a/xen/arch/ia64/linux-xen/irq_ia64.c	Fri Feb 13 19:11:38 2009 +0900
     1.2 +++ b/xen/arch/ia64/linux-xen/irq_ia64.c	Mon Mar 02 16:52:22 2009 +0900
     1.3 @@ -242,10 +242,6 @@ static struct irqaction ipi_irqaction = 
     1.4  };
     1.5  #endif
     1.6  
     1.7 -#ifdef XEN
     1.8 -extern void setup_vector (unsigned int vec, struct irqaction *action);
     1.9 -#endif
    1.10 -
    1.11  void
    1.12  register_percpu_irq (ia64_vector vec, struct irqaction *action)
    1.13  {
    1.14 @@ -276,7 +272,7 @@ int request_irq_vector(unsigned int vect
    1.15  		unsigned long irqflags, const char * devname, void *dev_id)
    1.16  {
    1.17  	struct irqaction * action;
    1.18 -	int retval=0;
    1.19 +	int retval;
    1.20  
    1.21  	/*
    1.22  	 * Sanity-check: shared interrupts must pass in a real dev-ID,
    1.23 @@ -295,7 +291,8 @@ int request_irq_vector(unsigned int vect
    1.24  	action->handler = handler;
    1.25  	action->name = devname;
    1.26  	action->dev_id = dev_id;
    1.27 -	setup_vector(vector, action);
    1.28 +
    1.29 +	retval = setup_vector(vector, action);
    1.30  	if (retval)
    1.31  		xfree(action);
    1.32  
     2.1 --- a/xen/arch/ia64/linux-xen/mca.c	Fri Feb 13 19:11:38 2009 +0900
     2.2 +++ b/xen/arch/ia64/linux-xen/mca.c	Mon Mar 02 16:52:22 2009 +0900
     2.3 @@ -112,9 +112,6 @@ unsigned long __per_cpu_mca[NR_CPUS];
     2.4  /* In mca_asm.S */
     2.5  extern void			ia64_monarch_init_handler (void);
     2.6  extern void			ia64_slave_init_handler (void);
     2.7 -#ifdef XEN
     2.8 -extern void setup_vector (unsigned int vec, struct irqaction *action);
     2.9 -#endif
    2.10  
    2.11  static ia64_mc_info_t		ia64_mc_info;
    2.12  
     3.1 --- a/xen/include/asm-ia64/hvm/iommu.h	Fri Feb 13 19:11:38 2009 +0900
     3.2 +++ b/xen/include/asm-ia64/hvm/iommu.h	Mon Mar 02 16:52:22 2009 +0900
     3.3 @@ -4,8 +4,8 @@
     3.4  #include <asm/hvm/irq.h>
     3.5  #include <public/event_channel.h>
     3.6  #include <public/arch-ia64/hvm/save.h>
     3.7 -#include <asm/linux/asm/hw_irq.h>
     3.8 -#include <asm/linux-xen/asm/iosapic.h>
     3.9 +#include <asm/hw_irq.h>
    3.10 +#include <asm/iosapic.h>
    3.11  
    3.12  struct iommu_ops;
    3.13  extern struct iommu_ops intel_iommu_ops;
     4.1 --- a/xen/include/asm-ia64/linux-xen/asm/README.origin	Fri Feb 13 19:11:38 2009 +0900
     4.2 +++ b/xen/include/asm-ia64/linux-xen/asm/README.origin	Mon Mar 02 16:52:22 2009 +0900
     4.3 @@ -10,6 +10,7 @@ cache.h			-> linux/include/asm-ia64/cach
     4.4  gcc_intrin.h		-> linux/include/asm-ia64/gcc_intrin.h
     4.5  ia64regs.h		-> linux/include/asm-ia64/ia64regs.h
     4.6  io.h			-> linux/include/asm-ia64/io.h
     4.7 +hw_irq.h		-> linux/include/asm-ia64/hw_irq.h
     4.8  kregs.h			-> linux/include/asm-ia64/kregs.h
     4.9  mca_asm.h		-> linux/include/asm-ia64/mca_asm.h
    4.10  meminit.h		-> linux/include/asm-ia64/meminit.h
     5.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     5.2 +++ b/xen/include/asm-ia64/linux-xen/asm/hw_irq.h	Mon Mar 02 16:52:22 2009 +0900
     5.3 @@ -0,0 +1,141 @@
     5.4 +#ifndef _ASM_IA64_HW_IRQ_H
     5.5 +#define _ASM_IA64_HW_IRQ_H
     5.6 +
     5.7 +/*
     5.8 + * Copyright (C) 2001-2003 Hewlett-Packard Co
     5.9 + *	David Mosberger-Tang <davidm@hpl.hp.com>
    5.10 + */
    5.11 +
    5.12 +#include <linux/interrupt.h>
    5.13 +#include <linux/sched.h>
    5.14 +#include <linux/types.h>
    5.15 +#include <linux/profile.h>
    5.16 +
    5.17 +#include <asm/machvec.h>
    5.18 +#include <asm/ptrace.h>
    5.19 +#include <asm/smp.h>
    5.20 +
    5.21 +typedef u8 ia64_vector;
    5.22 +
    5.23 +/*
    5.24 + * 0 special
    5.25 + *
    5.26 + * 1,3-14 are reserved from firmware
    5.27 + *
    5.28 + * 16-255 (vectored external interrupts) are available
    5.29 + *
    5.30 + * 15 spurious interrupt (see IVR)
    5.31 + *
    5.32 + * 16 lowest priority, 255 highest priority
    5.33 + *
    5.34 + * 15 classes of 16 interrupts each.
    5.35 + */
    5.36 +#define IA64_MIN_VECTORED_IRQ		 16
    5.37 +#define IA64_MAX_VECTORED_IRQ		255
    5.38 +#define IA64_NUM_VECTORS		256
    5.39 +
    5.40 +#define AUTO_ASSIGN_IRQ			(-1)
    5.41 +
    5.42 +#define IA64_SPURIOUS_INT_VECTOR	0x0f
    5.43 +
    5.44 +/*
    5.45 + * Vectors 0x10-0x1f are used for low priority interrupts, e.g. CMCI.
    5.46 + */
    5.47 +#define IA64_CPEP_VECTOR		0x1c	/* corrected platform error polling vector */
    5.48 +#define IA64_CMCP_VECTOR		0x1d	/* corrected machine-check polling vector */
    5.49 +#define IA64_CPE_VECTOR			0x1e	/* corrected platform error interrupt vector */
    5.50 +#define IA64_CMC_VECTOR			0x1f	/* corrected machine-check interrupt vector */
    5.51 +/*
    5.52 + * Vectors 0x20-0x2f are reserved for legacy ISA IRQs.
    5.53 + */
    5.54 +#define IA64_FIRST_DEVICE_VECTOR	0x30
    5.55 +#define IA64_LAST_DEVICE_VECTOR		0xe7
    5.56 +#define IA64_NUM_DEVICE_VECTORS		(IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1)
    5.57 +
    5.58 +#define IA64_MCA_RENDEZ_VECTOR		0xe8	/* MCA rendez interrupt */
    5.59 +#define IA64_PERFMON_VECTOR		0xee	/* performanc monitor interrupt vector */
    5.60 +#define IA64_TIMER_VECTOR		0xef	/* use highest-prio group 15 interrupt for timer */
    5.61 +#define	IA64_MCA_WAKEUP_VECTOR		0xf0	/* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */
    5.62 +#define IA64_IPI_RESCHEDULE		0xfd	/* SMP reschedule */
    5.63 +#define IA64_IPI_VECTOR			0xfe	/* inter-processor interrupt vector */
    5.64 +
    5.65 +/* Used for encoding redirected irqs */
    5.66 +
    5.67 +#define IA64_IRQ_REDIRECTED		(1 << 31)
    5.68 +
    5.69 +/* IA64 inter-cpu interrupt related definitions */
    5.70 +
    5.71 +#define IA64_IPI_DEFAULT_BASE_ADDR	0xfee00000
    5.72 +
    5.73 +/* Delivery modes for inter-cpu interrupts */
    5.74 +enum {
    5.75 +        IA64_IPI_DM_INT =       0x0,    /* pend an external interrupt */
    5.76 +        IA64_IPI_DM_PMI =       0x2,    /* pend a PMI */
    5.77 +        IA64_IPI_DM_NMI =       0x4,    /* pend an NMI (vector 2) */
    5.78 +        IA64_IPI_DM_INIT =      0x5,    /* pend an INIT interrupt */
    5.79 +        IA64_IPI_DM_EXTINT =    0x7,    /* pend an 8259-compatible interrupt. */
    5.80 +};
    5.81 +
    5.82 +extern __u8 isa_irq_to_vector_map[16];
    5.83 +#define isa_irq_to_vector(x)	isa_irq_to_vector_map[(x)]
    5.84 +
    5.85 +extern struct hw_interrupt_type irq_type_ia64_lsapic;	/* CPU-internal interrupt controller */
    5.86 +
    5.87 +extern int assign_irq_vector (int irq);	/* allocate a free vector */
    5.88 +extern void free_irq_vector (int vector);
    5.89 +extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
    5.90 +extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
    5.91 +#ifdef XEN
    5.92 +extern int xen_do_IRQ(ia64_vector vector);
    5.93 +extern int setup_vector(unsigned int vec, struct irqaction *action);
    5.94 +#endif
    5.95 +
    5.96 +static inline void
    5.97 +hw_resend_irq (struct hw_interrupt_type *h, unsigned int vector)
    5.98 +{
    5.99 +	platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
   5.100 +}
   5.101 +
   5.102 +/*
   5.103 + * Default implementations for the irq-descriptor API:
   5.104 + */
   5.105 +
   5.106 +extern irq_desc_t irq_desc[NR_IRQS];
   5.107 +
   5.108 +#ifndef CONFIG_IA64_GENERIC
   5.109 +static inline unsigned int
   5.110 +__ia64_local_vector_to_irq (ia64_vector vec)
   5.111 +{
   5.112 +	return (unsigned int) vec;
   5.113 +}
   5.114 +#endif
   5.115 +
   5.116 +/*
   5.117 + * Next follows the irq descriptor interface.  On IA-64, each CPU supports 256 interrupt
   5.118 + * vectors.  On smaller systems, there is a one-to-one correspondence between interrupt
   5.119 + * vectors and the Linux irq numbers.  However, larger systems may have multiple interrupt
   5.120 + * domains meaning that the translation from vector number to irq number depends on the
   5.121 + * interrupt domain that a CPU belongs to.  This API abstracts such platform-dependent
   5.122 + * differences and provides a uniform means to translate between vector and irq numbers
   5.123 + * and to obtain the irq descriptor for a given irq number.
   5.124 + */
   5.125 +
   5.126 +/* Return a pointer to the irq descriptor for IRQ.  */
   5.127 +static inline irq_desc_t *
   5.128 +irq_descp (int irq)
   5.129 +{
   5.130 +	return irq_desc + irq;
   5.131 +}
   5.132 +
   5.133 +/*
   5.134 + * Convert the local IA-64 vector to the corresponding irq number.  This translation is
   5.135 + * done in the context of the interrupt domain that the currently executing CPU belongs
   5.136 + * to.
   5.137 + */
   5.138 +static inline unsigned int
   5.139 +local_vector_to_irq (ia64_vector vec)
   5.140 +{
   5.141 +	return platform_local_vector_to_irq(vec);
   5.142 +}
   5.143 +
   5.144 +#endif /* _ASM_IA64_HW_IRQ_H */
     6.1 --- a/xen/include/asm-ia64/linux/asm/README.origin	Fri Feb 13 19:11:38 2009 +0900
     6.2 +++ b/xen/include/asm-ia64/linux/asm/README.origin	Mon Mar 02 16:52:22 2009 +0900
     6.3 @@ -17,7 +17,6 @@ dma.h			-> linux/include/asm-ia64/dma.h
     6.4  fpswa.h			-> linux/include/asm-ia64/fpswa.h
     6.5  fpu.h			-> linux/include/asm-ia64/fpu.h
     6.6  hdreg.h			-> linux/include/asm-ia64/hdreg.h
     6.7 -hw_irq.h		-> linux/include/asm-ia64/hw_irq.h
     6.8  intrinsics.h		-> linux/include/asm-ia64/intrinsics.h
     6.9  ioctl.h			-> linux/include/asm-ia64/ioctl.h
    6.10  irq.h			-> linux/include/asm-ia64/irq.h
     7.1 --- a/xen/include/asm-ia64/linux/asm/hw_irq.h	Fri Feb 13 19:11:38 2009 +0900
     7.2 +++ /dev/null	Thu Jan 01 00:00:00 1970 +0000
     7.3 @@ -1,138 +0,0 @@
     7.4 -#ifndef _ASM_IA64_HW_IRQ_H
     7.5 -#define _ASM_IA64_HW_IRQ_H
     7.6 -
     7.7 -/*
     7.8 - * Copyright (C) 2001-2003 Hewlett-Packard Co
     7.9 - *	David Mosberger-Tang <davidm@hpl.hp.com>
    7.10 - */
    7.11 -
    7.12 -#include <linux/interrupt.h>
    7.13 -#include <linux/sched.h>
    7.14 -#include <linux/types.h>
    7.15 -#include <linux/profile.h>
    7.16 -
    7.17 -#include <asm/machvec.h>
    7.18 -#include <asm/ptrace.h>
    7.19 -#include <asm/smp.h>
    7.20 -
    7.21 -typedef u8 ia64_vector;
    7.22 -
    7.23 -/*
    7.24 - * 0 special
    7.25 - *
    7.26 - * 1,3-14 are reserved from firmware
    7.27 - *
    7.28 - * 16-255 (vectored external interrupts) are available
    7.29 - *
    7.30 - * 15 spurious interrupt (see IVR)
    7.31 - *
    7.32 - * 16 lowest priority, 255 highest priority
    7.33 - *
    7.34 - * 15 classes of 16 interrupts each.
    7.35 - */
    7.36 -#define IA64_MIN_VECTORED_IRQ		 16
    7.37 -#define IA64_MAX_VECTORED_IRQ		255
    7.38 -#define IA64_NUM_VECTORS		256
    7.39 -
    7.40 -#define AUTO_ASSIGN_IRQ			(-1)
    7.41 -
    7.42 -#define IA64_SPURIOUS_INT_VECTOR	0x0f
    7.43 -
    7.44 -/*
    7.45 - * Vectors 0x10-0x1f are used for low priority interrupts, e.g. CMCI.
    7.46 - */
    7.47 -#define IA64_CPEP_VECTOR		0x1c	/* corrected platform error polling vector */
    7.48 -#define IA64_CMCP_VECTOR		0x1d	/* corrected machine-check polling vector */
    7.49 -#define IA64_CPE_VECTOR			0x1e	/* corrected platform error interrupt vector */
    7.50 -#define IA64_CMC_VECTOR			0x1f	/* corrected machine-check interrupt vector */
    7.51 -/*
    7.52 - * Vectors 0x20-0x2f are reserved for legacy ISA IRQs.
    7.53 - */
    7.54 -#define IA64_FIRST_DEVICE_VECTOR	0x30
    7.55 -#define IA64_LAST_DEVICE_VECTOR		0xe7
    7.56 -#define IA64_NUM_DEVICE_VECTORS		(IA64_LAST_DEVICE_VECTOR - IA64_FIRST_DEVICE_VECTOR + 1)
    7.57 -
    7.58 -#define IA64_MCA_RENDEZ_VECTOR		0xe8	/* MCA rendez interrupt */
    7.59 -#define IA64_PERFMON_VECTOR		0xee	/* performanc monitor interrupt vector */
    7.60 -#define IA64_TIMER_VECTOR		0xef	/* use highest-prio group 15 interrupt for timer */
    7.61 -#define	IA64_MCA_WAKEUP_VECTOR		0xf0	/* MCA wakeup (must be >MCA_RENDEZ_VECTOR) */
    7.62 -#define IA64_IPI_RESCHEDULE		0xfd	/* SMP reschedule */
    7.63 -#define IA64_IPI_VECTOR			0xfe	/* inter-processor interrupt vector */
    7.64 -
    7.65 -/* Used for encoding redirected irqs */
    7.66 -
    7.67 -#define IA64_IRQ_REDIRECTED		(1 << 31)
    7.68 -
    7.69 -/* IA64 inter-cpu interrupt related definitions */
    7.70 -
    7.71 -#define IA64_IPI_DEFAULT_BASE_ADDR	0xfee00000
    7.72 -
    7.73 -/* Delivery modes for inter-cpu interrupts */
    7.74 -enum {
    7.75 -        IA64_IPI_DM_INT =       0x0,    /* pend an external interrupt */
    7.76 -        IA64_IPI_DM_PMI =       0x2,    /* pend a PMI */
    7.77 -        IA64_IPI_DM_NMI =       0x4,    /* pend an NMI (vector 2) */
    7.78 -        IA64_IPI_DM_INIT =      0x5,    /* pend an INIT interrupt */
    7.79 -        IA64_IPI_DM_EXTINT =    0x7,    /* pend an 8259-compatible interrupt. */
    7.80 -};
    7.81 -
    7.82 -extern __u8 isa_irq_to_vector_map[16];
    7.83 -#define isa_irq_to_vector(x)	isa_irq_to_vector_map[(x)]
    7.84 -
    7.85 -extern struct hw_interrupt_type irq_type_ia64_lsapic;	/* CPU-internal interrupt controller */
    7.86 -
    7.87 -extern int assign_irq_vector (int irq);	/* allocate a free vector */
    7.88 -extern void free_irq_vector (int vector);
    7.89 -extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
    7.90 -extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
    7.91 -extern int xen_do_IRQ(ia64_vector vector);
    7.92 -
    7.93 -static inline void
    7.94 -hw_resend_irq (struct hw_interrupt_type *h, unsigned int vector)
    7.95 -{
    7.96 -	platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
    7.97 -}
    7.98 -
    7.99 -/*
   7.100 - * Default implementations for the irq-descriptor API:
   7.101 - */
   7.102 -
   7.103 -extern irq_desc_t irq_desc[NR_IRQS];
   7.104 -
   7.105 -#ifndef CONFIG_IA64_GENERIC
   7.106 -static inline unsigned int
   7.107 -__ia64_local_vector_to_irq (ia64_vector vec)
   7.108 -{
   7.109 -	return (unsigned int) vec;
   7.110 -}
   7.111 -#endif
   7.112 -
   7.113 -/*
   7.114 - * Next follows the irq descriptor interface.  On IA-64, each CPU supports 256 interrupt
   7.115 - * vectors.  On smaller systems, there is a one-to-one correspondence between interrupt
   7.116 - * vectors and the Linux irq numbers.  However, larger systems may have multiple interrupt
   7.117 - * domains meaning that the translation from vector number to irq number depends on the
   7.118 - * interrupt domain that a CPU belongs to.  This API abstracts such platform-dependent
   7.119 - * differences and provides a uniform means to translate between vector and irq numbers
   7.120 - * and to obtain the irq descriptor for a given irq number.
   7.121 - */
   7.122 -
   7.123 -/* Return a pointer to the irq descriptor for IRQ.  */
   7.124 -static inline irq_desc_t *
   7.125 -irq_descp (int irq)
   7.126 -{
   7.127 -	return irq_desc + irq;
   7.128 -}
   7.129 -
   7.130 -/*
   7.131 - * Convert the local IA-64 vector to the corresponding irq number.  This translation is
   7.132 - * done in the context of the interrupt domain that the currently executing CPU belongs
   7.133 - * to.
   7.134 - */
   7.135 -static inline unsigned int
   7.136 -local_vector_to_irq (ia64_vector vec)
   7.137 -{
   7.138 -	return platform_local_vector_to_irq(vec);
   7.139 -}
   7.140 -
   7.141 -#endif /* _ASM_IA64_HW_IRQ_H */