ia64/xen-unstable

changeset 19057:c1320922d05e

x86: Tighten MSR access checks so only dom0 can access cpufreq MSRs,
and then only when it is the cpufreq controller.

Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
author Keir Fraser <keir.fraser@citrix.com>
date Fri Jan 16 15:43:59 2009 +0000 (2009-01-16)
parents 3c9b66b1798d
children 8df3c145923f
files xen/arch/x86/traps.c
line diff
     1.1 --- a/xen/arch/x86/traps.c	Fri Jan 16 15:32:12 2009 +0000
     1.2 +++ b/xen/arch/x86/traps.c	Fri Jan 16 15:43:59 2009 +0000
     1.3 @@ -1632,6 +1632,12 @@ void (*pv_post_outb_hook)(unsigned int p
     1.4  # define read_sreg(regs, sr) read_segment_register(sr)
     1.5  #endif
     1.6  
     1.7 +static int is_cpufreq_controller(struct domain *d)
     1.8 +{
     1.9 +    return ((cpufreq_controller == FREQCTL_dom0_kernel) &&
    1.10 +            (d->domain_id == 0));
    1.11 +}
    1.12 +
    1.13  static int emulate_privileged_op(struct cpu_user_regs *regs)
    1.14  {
    1.15      struct vcpu *v = current;
    1.16 @@ -2143,7 +2149,7 @@ static int emulate_privileged_op(struct 
    1.17          case MSR_K8_PSTATE7:
    1.18              if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD )
    1.19                  goto fail;
    1.20 -            if ( cpufreq_controller != FREQCTL_dom0_kernel )
    1.21 +            if ( !is_cpufreq_controller(v->domain) )
    1.22                  break;
    1.23              if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
    1.24                  goto fail;
    1.25 @@ -2181,16 +2187,11 @@ static int emulate_privileged_op(struct 
    1.26          case MSR_IA32_MPERF:
    1.27          case MSR_IA32_APERF:
    1.28          case MSR_IA32_PERF_CTL:
    1.29 -            if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
    1.30 -                goto fail;
    1.31 -            if ( cpufreq_controller != FREQCTL_dom0_kernel )
    1.32 -                break;
    1.33 -            if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
    1.34 -                goto fail;
    1.35 -            break;
    1.36          case MSR_IA32_THERM_CONTROL:
    1.37              if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
    1.38                  goto fail;
    1.39 +            if ( !is_cpufreq_controller(v->domain) )
    1.40 +                break;
    1.41              if ( wrmsr_safe(regs->ecx, eax, edx) != 0 )
    1.42                  goto fail;
    1.43              break;
    1.44 @@ -2249,7 +2250,7 @@ static int emulate_privileged_op(struct 
    1.45          case MSR_K8_PSTATE7:
    1.46              if ( boot_cpu_data.x86_vendor != X86_VENDOR_AMD )
    1.47                  goto fail;
    1.48 -            if ( cpufreq_controller != FREQCTL_dom0_kernel )
    1.49 +            if ( !is_cpufreq_controller(v->domain) )
    1.50              {
    1.51                  regs->eax = regs->edx = 0;
    1.52                  break;
    1.53 @@ -2267,7 +2268,6 @@ static int emulate_privileged_op(struct 
    1.54                           MSR_IA32_MISC_ENABLE_XTPR_DISABLE;
    1.55              break;
    1.56          case MSR_EFER:
    1.57 -        case MSR_IA32_THERM_CONTROL:
    1.58          case MSR_AMD_PATCHLEVEL:
    1.59          default:
    1.60              if ( rdmsr_hypervisor_regs(regs->ecx, &l, &h) )