ia64/xen-unstable

changeset 7282:bb8120b53a96

Convert a few privops to existing hyperprivops in xenlinux
author djm@kirby.fc.hp.com
date Sun Oct 09 09:04:49 2005 -0600 (2005-10-09)
parents eba5d2627b18
children 333f722ed6d0
files linux-2.6-xen-sparse/arch/ia64/xen/xenivt.S
line diff
     1.1 --- a/linux-2.6-xen-sparse/arch/ia64/xen/xenivt.S	Sat Oct 08 22:55:14 2005 -0600
     1.2 +++ b/linux-2.6-xen-sparse/arch/ia64/xen/xenivt.S	Sun Oct 09 09:04:49 2005 -0600
     1.3 @@ -188,16 +188,26 @@ ENTRY(vhpt_miss)
     1.4  (p7)	tbit.nz.unc p10,p11=r19,32		// is it an instruction TLB miss?
     1.5  	dep r23=0,r20,0,PAGE_SHIFT		// clear low bits to get page address
     1.6  	;;
     1.7 -(p10)	itc.i r18				// insert the instruction TLB entry
     1.8 -(p11)	itc.d r18				// insert the data TLB entry
     1.9 +#ifdef CONFIG_XEN
    1.10 +	mov r24=r8
    1.11 +	mov r8=r18
    1.12 +	;;
    1.13 +(p10)	XEN_HYPER_ITC_D
    1.14 +	;;
    1.15 +(p11)	XEN_HYPER_ITC_I
    1.16 +	;;
    1.17 +	mov r8=r24
    1.18 +	;;
    1.19  (p6)	br.cond.spnt.many page_fault		// handle bad address/page not present (page fault)
    1.20 -#ifdef CONFIG_XEN
    1.21  	;;
    1.22  	movl r24=XSI_IFA
    1.23  	;;
    1.24  	st8 [r24]=r22
    1.25  	;;
    1.26  #else
    1.27 +(p10)	itc.i r18				// insert the instruction TLB entry
    1.28 +(p11)	itc.d r18				// insert the data TLB entry
    1.29 +(p6)	br.cond.spnt.many page_fault		// handle bad address/page not present (page fault)
    1.30  	mov cr.ifa=r22
    1.31  #endif
    1.32  
    1.33 @@ -828,7 +838,17 @@ 1:	ld8 r18=[r17]
    1.34  	;;
    1.35  	cmp.eq p6,p7=r26,r18
    1.36  	;;
    1.37 +#ifdef CONFIG_XEN
    1.38 +	mov r26=r8
    1.39 +	mov r8=r25
    1.40 +	;;
    1.41 +(p6)	XEN_HYPER_ITC_I
    1.42 +	;;
    1.43 +	mov r8=r26
    1.44 +	;;
    1.45 +#else
    1.46  (p6)	itc.i r25				// install updated PTE
    1.47 +#endif
    1.48  	;;
    1.49  	/*
    1.50  	 * Tell the assemblers dependency-violation checker that the above "itc" instructions
    1.51 @@ -905,7 +925,17 @@ 1:	ld8 r18=[r17]
    1.52  	;;
    1.53  	cmp.eq p6,p7=r26,r18
    1.54  	;;
    1.55 +#ifdef CONFIG_XEN
    1.56 +	mov r26=r8
    1.57 +	mov r8=r25
    1.58 +	;;
    1.59 +(p6)	XEN_HYPER_ITC_D
    1.60 +	;;
    1.61 +	mov r8=r26
    1.62 +	;;
    1.63 +#else
    1.64  (p6)	itc.d r25				// install updated PTE
    1.65 +#endif
    1.66  	/*
    1.67  	 * Tell the assemblers dependency-violation checker that the above "itc" instructions
    1.68  	 * cannot possibly affect the following loads:
    1.69 @@ -1423,11 +1453,25 @@ ENTRY(dispatch_to_fault_handler)
    1.70  	SAVE_MIN_WITH_COVER_R19
    1.71  	alloc r14=ar.pfs,0,0,5,0
    1.72  	mov out0=r15
    1.73 +#ifdef CONFIG_XEN
    1.74 +	movl out1=XSI_ISR
    1.75 +	;;
    1.76 +	adds out2=XSI_IFA-XSI_ISR,out1
    1.77 +	adds out3=XSI_IIM-XSI_ISR,out1
    1.78 +	adds out4=XSI_ITIR-XSI_ISR,out1
    1.79 +	;;
    1.80 +	ld8 out1=[out1]
    1.81 +	ld8 out2=[out2]
    1.82 +	ld8 out3=[out4]
    1.83 +	ld8 out4=[out4]
    1.84 +	;;
    1.85 +#else
    1.86  	mov out1=cr.isr
    1.87  	mov out2=cr.ifa
    1.88  	mov out3=cr.iim
    1.89  	mov out4=cr.itir
    1.90  	;;
    1.91 +#endif
    1.92  	ssm psr.ic | PSR_DEFAULT_BITS
    1.93  	;;
    1.94  	srlz.i					// guarantee that interruption collection is on