ia64/xen-unstable

changeset 5513:b58f7c4ead49

bitkeeper revision 1.1713.2.12 (42b728d7RlgKAsY0Of9prTXJA4DJ5w)

More hyperprivop work
Signed-off-by: Dan Magenheimer <dan.magenheimer@hp.com>
author djm@kirby.fc.hp.com
date Mon Jun 20 20:36:39 2005 +0000 (2005-06-20)
parents 588e0bc74f9a
children 83f563ab42f6
files xen/arch/ia64/asm-offsets.c xen/arch/ia64/hyperprivop.S
line diff
     1.1 --- a/xen/arch/ia64/asm-offsets.c	Mon Jun 20 17:29:54 2005 +0000
     1.2 +++ b/xen/arch/ia64/asm-offsets.c	Mon Jun 20 20:36:39 2005 +0000
     1.3 @@ -79,8 +79,10 @@ void foo(void)
     1.4  	DEFINE(IA64_VCPU_IRR0_OFFSET, offsetof (struct vcpu, arch.irr[0]));
     1.5  	DEFINE(IA64_VCPU_IRR3_OFFSET, offsetof (struct vcpu, arch.irr[3]));
     1.6  	DEFINE(IA64_VCPU_INSVC3_OFFSET, offsetof (struct vcpu, arch.insvc[3]));
     1.7 +	DEFINE(IA64_VCPU_DOMAIN_ITM_OFFSET, offsetof (struct vcpu, arch.domain_itm));
     1.8  
     1.9  	BLANK();
    1.10 +	DEFINE(IA64_CPUINFO_ITM_NEXT_OFFSET, offsetof (struct cpuinfo_ia64, itm_next));
    1.11  
    1.12  	//DEFINE(IA64_SIGHAND_SIGLOCK_OFFSET,offsetof (struct sighand_struct, siglock));
    1.13  
     2.1 --- a/xen/arch/ia64/hyperprivop.S	Mon Jun 20 17:29:54 2005 +0000
     2.2 +++ b/xen/arch/ia64/hyperprivop.S	Mon Jun 20 20:36:39 2005 +0000
     2.3 @@ -97,6 +97,10 @@ 1:	// when we get to here r20=~=interrup
     2.4  	cmp.eq p7,p6=XEN_HYPER_EOI,r17
     2.5  (p7)	br.sptk.many hyper_eoi;;
     2.6  
     2.7 +	// HYPERPRIVOP_SET_ITM?
     2.8 +	cmp.eq p7,p6=XEN_HYPER_SET_ITM,r17
     2.9 +(p7)	br.sptk.many hyper_set_itm;;
    2.10 +
    2.11  	// if not one of the above, give up for now and do it the slow way
    2.12  	br.sptk.many dispatch_break_fault ;;
    2.13  
    2.14 @@ -802,3 +806,46 @@ 1:	mov r24=cr.ipsr
    2.15  	rfi
    2.16  	;;
    2.17  END(hyper_eoi)
    2.18 +
    2.19 +ENTRY(hyper_set_itm)
    2.20 +	// when we get to here r20=~=interrupts pending
    2.21 +	cmp.ne p7,p0=r20,r0
    2.22 +(p7)	br.spnt.many dispatch_break_fault ;;
    2.23 +#ifdef FAST_HYPERPRIVOP_CNT
    2.24 +	movl r20=fast_hyperpriv_cnt+(8*XEN_HYPER_SET_ITM);;
    2.25 +	ld8 r21=[r20];;
    2.26 +	adds r21=1,r21;;
    2.27 +	st8 [r20]=r21;;
    2.28 +#endif
    2.29 +	movl r20=(PERCPU_ADDR)+IA64_CPUINFO_ITM_NEXT_OFFSET;;
    2.30 +	ld8 r21=[r20];;
    2.31 +	mov r20=IA64_KR(CURRENT);;
    2.32 +	adds r20=IA64_VCPU_DOMAIN_ITM_OFFSET,r20;;
    2.33 +	st8 [r20]=r8;;
    2.34 +	cmp.geu p6,p0=r21,r8;;
    2.35 +(p6)	mov r21=r8;;
    2.36 +	// now "safe set" cr.itm=r21
    2.37 +	mov r23=100;;
    2.38 +2:	mov cr.itm=r21;;
    2.39 +	srlz.d;;
    2.40 +	mov r22=ar.itc ;;
    2.41 +	cmp.leu p6,p0=r21,r22;;
    2.42 +	add r21=r21,r23;;
    2.43 +	shl r23=r23,1;;
    2.44 +(p6)	br.cond.spnt.few 2b;;
    2.45 +1:	mov r24=cr.ipsr
    2.46 +	mov r25=cr.iip;;
    2.47 +	extr.u r26=r24,41,2 ;;
    2.48 +	cmp.eq p6,p7=2,r26 ;;
    2.49 +(p6)	mov r26=0
    2.50 +(p6)	adds r25=16,r25
    2.51 +(p7)	adds r26=1,r26
    2.52 +	;;
    2.53 +	dep r24=r26,r24,41,2
    2.54 +	;;
    2.55 +	mov cr.ipsr=r24
    2.56 +	mov cr.iip=r25
    2.57 +	mov pr=r31,-1 ;;
    2.58 +	rfi
    2.59 +	;;
    2.60 +END(hyper_set_itm)