ia64/xen-unstable

changeset 7720:b2ea26d2099a

Support recent change moving virtual IOAPIC model into Xen for
ia64/VTI. Now ia64/vti will create links to arch/x86/dm/vmx_vioapic.c
and include/x86/vmx_vlapic.h.

Firstly, a small change to common virtual IOAPIC model to be used by
both sides. Also some compilation fix to tools is included in first
one. Secondly, there are ia64-specific changes to hook to common
IOAPIC model.

Based on this patch upon latest xen-ia64-unstable tip, we can see
multiple domains working again on XEN/IA64, including both domU and
VTI domain simultaneously in run-time.

Signed-off-by Kevin Tian <kevin.tian@intel.com>
Signed-off-by Anthony Xu <Anthony.xu@intel.com>
Signed-off-by Yunhong Jiang <yunhong.jiang@intel.com>
Signed-off-by Eddie Dong <eddie.dong@intel.com>
author kaf24@firebug.cl.cam.ac.uk
date Wed Nov 09 14:53:12 2005 +0100 (2005-11-09)
parents 34a0dcb1700c
children 136b2d20dc81
files tools/examples/xmexample.vti tools/ioemu/ia64_intrinsic.h tools/ioemu/target-i386-dm/Makefile tools/ioemu/vl.c tools/libxc/xc_ia64_stubs.c tools/libxc/xc_linux_build.c xen/arch/ia64/Makefile xen/arch/ia64/Rules.mk xen/arch/ia64/vmx/mmio.c xen/arch/ia64/vmx/vlsapic.c xen/arch/ia64/vmx/vmx_init.c xen/arch/ia64/vmx/vmx_support.c xen/arch/ia64/xen/domain.c xen/arch/x86/dm/vmx_vioapic.c xen/include/asm-ia64/vmx.h xen/include/asm-ia64/vmx_platform.h xen/include/asm-ia64/vmx_vcpu.h xen/include/asm-ia64/vmx_vpd.h xen/include/asm-x86/vmx_vioapic.h xen/include/asm-x86/vmx_vlapic.h
line diff
     1.1 --- a/tools/examples/xmexample.vti	Wed Nov 09 14:42:15 2005 +0100
     1.2 +++ b/tools/examples/xmexample.vti	Wed Nov 09 14:53:12 2005 +0100
     1.3 @@ -26,6 +26,9 @@ name = "ExampleVMXDomain"
     1.4  # Which CPU to start domain on? 
     1.5  #cpu = -1   # leave to Xen to pick
     1.6  
     1.7 +# Disable vif for now
     1.8 +nics=0
     1.9 +
    1.10  # Optionally define mac and/or bridge for the network interfaces.
    1.11  # Random MACs are assigned if not given.
    1.12  #vif = [ 'mac=aa:00:00:00:00:11, bridge=xen-br0' ]
     2.1 --- a/tools/ioemu/ia64_intrinsic.h	Wed Nov 09 14:42:15 2005 +0100
     2.2 +++ b/tools/ioemu/ia64_intrinsic.h	Wed Nov 09 14:53:12 2005 +0100
     2.3 @@ -236,6 +236,7 @@ u64_t _InterlockedCompareExchange64_acq(
     2.4  #define __ia64_fc(addr)	asm volatile ("fc %0" :: "r"(addr) : "memory")
     2.5  #define ia64_sync_i()	asm volatile (";; sync.i" ::: "memory")
     2.6  
     2.7 +register unsigned long ia64_r13 asm ("r13") __attribute_used__;
     2.8  #define __ia64_getreg(regnum)							\
     2.9  ({										\
    2.10  	uint64_t ia64_intri_res;							\
     3.1 --- a/tools/ioemu/target-i386-dm/Makefile	Wed Nov 09 14:42:15 2005 +0100
     3.2 +++ b/tools/ioemu/target-i386-dm/Makefile	Wed Nov 09 14:53:12 2005 +0100
     3.3 @@ -188,7 +188,7 @@ endif
     3.4  #########################################################
     3.5  
     3.6  DEFINES+=-D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE
     3.7 -LIBS+=-lm -L../../libxc -lxenctrl
     3.8 +LIBS+=-lm -L../../libxc -lxenctrl -lxenguest
     3.9  ifndef CONFIG_USER_ONLY
    3.10  LIBS+=-lz
    3.11  endif
     4.1 --- a/tools/ioemu/vl.c	Wed Nov 09 14:42:15 2005 +0100
     4.2 +++ b/tools/ioemu/vl.c	Wed Nov 09 14:53:12 2005 +0100
     4.3 @@ -523,8 +523,8 @@ int64_t cpu_get_real_ticks(void)
     4.4  
     4.5  #elif defined(__ia64__)
     4.6  #include "ia64_intrinsic.h"
     4.7 -#define cpu_get_reak_ticks()	\
     4.8 -    ia64_getreg(_IA64_REG_AR_ITC)
     4.9 +#define cpu_get_real_ticks()	\
    4.10 +	__ia64_getreg(_IA64_REG_AR_ITC)
    4.11  
    4.12  #else
    4.13  #error unsupported CPU
     5.1 --- a/tools/libxc/xc_ia64_stubs.c	Wed Nov 09 14:42:15 2005 +0100
     5.2 +++ b/tools/libxc/xc_ia64_stubs.c	Wed Nov 09 14:53:12 2005 +0100
     5.3 @@ -603,6 +603,7 @@ int xc_vmx_build(int xc_handle,
     5.4                   int memsize,
     5.5                   const char *image_name,
     5.6                   unsigned int control_evtchn,
     5.7 +		 unsigned int lapic,
     5.8                   unsigned int vcpus,
     5.9                   unsigned int store_evtchn,
    5.10                   unsigned long *store_mfn)
     6.1 --- a/tools/libxc/xc_linux_build.c	Wed Nov 09 14:42:15 2005 +0100
     6.2 +++ b/tools/libxc/xc_linux_build.c	Wed Nov 09 14:53:12 2005 +0100
     6.3 @@ -783,7 +783,7 @@ int xc_linux_build(int xc_handle,
     6.4      /* currently done by hypervisor, should move here */
     6.5      /* ctxt->regs.r28 = dom_fw_setup(); */
     6.6      ctxt->vcpu.privregs = 0;
     6.7 -    ctxt->sys_pgnr = nr_pages - 3;
     6.8 +    ctxt->sys_pgnr = 3;
     6.9      i = 0; /* silence unused variable warning */
    6.10  #else /* x86 */
    6.11      /*
     7.1 --- a/xen/arch/ia64/Makefile	Wed Nov 09 14:42:15 2005 +0100
     7.2 +++ b/xen/arch/ia64/Makefile	Wed Nov 09 14:53:12 2005 +0100
     7.3 @@ -15,7 +15,7 @@ OBJS = xensetup.o setup.o time.o irq.o i
     7.4  OBJS += vmx_init.o vmx_virt.o vmx_vcpu.o vmx_process.o vmx_vsa.o vmx_ivt.o\
     7.5  	vmx_phy_mode.o vmx_utility.o vmx_interrupt.o vmx_entry.o vmmu.o \
     7.6  	vtlb.o mmio.o vlsapic.o vmx_hypercall.o mm.o vmx_support.o \
     7.7 -	pal_emul.o vmx_irq_ia64.o
     7.8 +	pal_emul.o vmx_irq_ia64.o vmx_vioapic.o
     7.9  
    7.10  # lib files from xen/arch/ia64/linux/ (linux/arch/ia64/lib)
    7.11  OBJS +=	bitop.o clear_page.o flush.o copy_page_mck.o			\
    7.12 @@ -68,6 +68,11 @@ asm-xsi-offsets.s: asm-xsi-offsets.c
    7.13  	 || ln -s $(BASEDIR)/include/xen $(BASEDIR)/include/linux
    7.14  	[ -e $(BASEDIR)/include/asm-ia64/xen ] \
    7.15  	 || ln -s $(BASEDIR)/include/asm-ia64/linux $(BASEDIR)/include/asm-ia64/xen
    7.16 +# Link to DM file in Xen for ia64/vti
    7.17 +	[ -e $(BASEDIR)/include/asm-ia64/vmx_vioapic.h ] \
    7.18 +	 || ln -s ../../include/asm-x86/vmx_vioapic.h $(BASEDIR)/include/asm-ia64/vmx_vioapic.h
    7.19 +	[ -e $(BASEDIR)/arch/ia64/vmx/vmx_vioapic.c ] \
    7.20 +	 || ln -s ../../../arch/x86/dm/vmx_vioapic.c $(BASEDIR)/arch/ia64/vmx/vmx_vioapic.c
    7.21  # Solve circular reference on asm-offsets.h
    7.22  	[ -f $(BASEDIR)/include/asm-ia64/asm-offsets.h ] \
    7.23  	 || echo "#define IA64_TASK_SIZE 0" > $(BASEDIR)/include/asm-ia64/asm-offsets.h
     8.1 --- a/xen/arch/ia64/Rules.mk	Wed Nov 09 14:42:15 2005 +0100
     8.2 +++ b/xen/arch/ia64/Rules.mk	Wed Nov 09 14:53:12 2005 +0100
     8.3 @@ -24,7 +24,7 @@ CFLAGS  += -I$(BASEDIR)/include/asm-ia64
     8.4  	   -I$(BASEDIR)/include/asm-ia64/linux-null 			\
     8.5             -I$(BASEDIR)/arch/ia64/linux -I$(BASEDIR)/arch/ia64/linux-xen
     8.6  CFLAGS  += -Wno-pointer-arith -Wredundant-decls
     8.7 -CFLAGS  += -DIA64 -DXEN -DLINUX_2_6
     8.8 +CFLAGS  += -DIA64 -DXEN -DLINUX_2_6 -DV_IOSAPIC_READY
     8.9  CFLAGS	+= -ffixed-r13 -mfixed-range=f12-f15,f32-f127
    8.10  CFLAGS	+= -w -g
    8.11  ifeq ($(VALIDATE_VT),y)
     9.1 --- a/xen/arch/ia64/vmx/mmio.c	Wed Nov 09 14:42:15 2005 +0100
     9.2 +++ b/xen/arch/ia64/vmx/mmio.c	Wed Nov 09 14:53:12 2005 +0100
     9.3 @@ -202,11 +202,13 @@ static void legacy_io_access(VCPU *vcpu,
     9.4      return;
     9.5  }
     9.6  
     9.7 +extern struct vmx_mmio_handler vioapic_mmio_handler;
     9.8  static void mmio_access(VCPU *vcpu, u64 src_pa, u64 *dest, size_t s, int ma, int dir)
     9.9  {
    9.10      struct virutal_platform_def *v_plat;
    9.11      //mmio_type_t iot;
    9.12      unsigned long iot;
    9.13 +    struct vmx_mmio_handler *vioapic_handler = &vioapic_mmio_handler;
    9.14      iot=__gpfn_is_io(vcpu->domain, src_pa>>PAGE_SHIFT);
    9.15      v_plat = vmx_vcpu_get_plat(vcpu);
    9.16  
    9.17 @@ -220,6 +222,11 @@ static void mmio_access(VCPU *vcpu, u64 
    9.18      case GPFN_GFW:
    9.19          break;
    9.20      case GPFN_IOSAPIC:
    9.21 +	if (!dir)
    9.22 +	    vioapic_handler->write_handler(vcpu, src_pa, s, *dest);
    9.23 +	else
    9.24 +	    *dest = vioapic_handler->read_handler(vcpu, src_pa, s);
    9.25 +	break;
    9.26      case GPFN_FRAME_BUFFER:
    9.27      case GPFN_LOW_MMIO:
    9.28          low_mmio_access(vcpu, src_pa, dest, s, dir);
    10.1 --- a/xen/arch/ia64/vmx/vlsapic.c	Wed Nov 09 14:42:15 2005 +0100
    10.2 +++ b/xen/arch/ia64/vmx/vlsapic.c	Wed Nov 09 14:53:12 2005 +0100
    10.3 @@ -37,15 +37,9 @@
    10.4  #include <asm/hw_irq.h>
    10.5  #include <asm/vmx_pal_vsa.h>
    10.6  #include <asm/kregs.h>
    10.7 +#include <asm/vmx_platform.h>
    10.8 +#include <asm/vmx_vioapic.h>
    10.9  
   10.10 -#define  SHARED_VLAPIC_INF
   10.11 -#ifdef V_IOSAPIC_READY
   10.12 -static inline vl_apic_info* get_psapic(VCPU *vcpu)
   10.13 -{
   10.14 -    shared_iopage_t  *sp = get_sp(vcpu->domain);
   10.15 -    return &(sp->vcpu_iodata[vcpu->vcpu_id].apic_intr);
   10.16 -}
   10.17 -#endif
   10.18  //u64  fire_itc;
   10.19  //u64  fire_itc2;
   10.20  //u64  fire_itm;
   10.21 @@ -273,48 +267,71 @@ static void update_vhpi(VCPU *vcpu, int 
   10.22  }
   10.23  
   10.24  #ifdef V_IOSAPIC_READY
   10.25 -void vlapic_update_shared_info(VCPU *vcpu)
   10.26 +/* Assist to check virtual interrupt lines */
   10.27 +void vmx_virq_line_assist(struct vcpu *v)
   10.28  {
   10.29 -    //int	i;
   10.30 -    
   10.31 -    vl_apic_info *ps;
   10.32 -
   10.33 -    if (vcpu->domain == dom0)
   10.34 -	return;
   10.35 +    global_iodata_t *spg = &get_sp(v->domain)->sp_global;
   10.36 +    uint16_t *virq_line, irqs;
   10.37  
   10.38 -    ps = get_psapic(vcpu);
   10.39 -    ps->vl_lapic_id = ((VCPU(vcpu, lid) >> 16) & 0xffff) << 16; 
   10.40 -    printf("vl_lapic_id = %x\n", ps->vl_lapic_id);
   10.41 -    ps->vl_apr = 0;
   10.42 -    // skip ps->vl_logical_dest && ps->vl_dest_format
   10.43 -    // IPF support physical destination mode only
   10.44 -    ps->vl_arb_id = 0;
   10.45 -    /*
   10.46 -    for ( i=0; i<4; i++ ) {
   10.47 -    	ps->tmr[i] = 0;		// edge trigger 
   10.48 +    virq_line = &spg->pic_irr;
   10.49 +    if (*virq_line) {
   10.50 +	do {
   10.51 +	    irqs = *(volatile uint16_t*)virq_line;
   10.52 +	} while ((uint16_t)cmpxchg(virq_line, irqs, 0) != irqs);
   10.53 +	vmx_vioapic_do_irqs(v->domain, irqs);
   10.54      }
   10.55 -    */
   10.56 +
   10.57 +    virq_line = &spg->pic_clear_irr;
   10.58 +    if (*virq_line) {
   10.59 +	do {
   10.60 +	    irqs = *(volatile uint16_t*)virq_line;
   10.61 +	} while ((uint16_t)cmpxchg(virq_line, irqs, 0) != irqs);
   10.62 +	vmx_vioapic_do_irqs_clear(v->domain, irqs);
   10.63 +    }
   10.64  }
   10.65  
   10.66 -void vlapic_update_ext_irq(VCPU *vcpu)
   10.67 +void vmx_virq_line_init(struct domain *d)
   10.68  {
   10.69 -    int  vec;
   10.70 +    global_iodata_t *spg = &get_sp(d)->sp_global;
   10.71 +
   10.72 +    spg->pic_elcr = 0xdef8; /* Level/Edge trigger mode */
   10.73 +    spg->pic_irr = 0;
   10.74 +    spg->pic_last_irr = 0;
   10.75 +    spg->pic_clear_irr = 0;
   10.76 +}
   10.77 +
   10.78 +int ioapic_match_logical_addr(vmx_vioapic_t *s, int number, uint16_t dest)
   10.79 +{
   10.80 +    return (VLAPIC_ID(s->lapic_info[number]) == dest);
   10.81 +}
   10.82 +
   10.83 +struct vlapic* apic_round_robin(struct domain *d,
   10.84 +				uint8_t dest_mode,
   10.85 +				uint8_t vector,
   10.86 +				uint32_t bitmap)
   10.87 +{
   10.88 +    uint8_t bit;
   10.89 +    vmx_vioapic_t *s;
   10.90      
   10.91 -    vl_apic_info *ps = get_psapic(vcpu);
   10.92 -    while ( (vec = highest_bits(ps->irr)) != NULL_VECTOR ) {
   10.93 -    	clear_bit (vec, ps->irr);
   10.94 -        vmx_vcpu_pend_interrupt(vcpu, vec);
   10.95 +    if (!bitmap) {
   10.96 +	printk("<apic_round_robin> no bit on bitmap\n");
   10.97 +	return NULL;
   10.98      }
   10.99 +
  10.100 +    s = &d->arch.vmx_platform.vmx_vioapic;
  10.101 +    for (bit = 0; bit < s->lapic_count; bit++) {
  10.102 +	if (bitmap & (1 << bit))
  10.103 +	    return s->lapic_info[bit];
  10.104 +    }
  10.105 +
  10.106 +    return NULL;
  10.107  }
  10.108  #endif
  10.109  
  10.110  void vlsapic_reset(VCPU *vcpu)
  10.111  {
  10.112      int     i;
  10.113 -#ifdef V_IOSAPIC_READY
  10.114 -    vl_apic_info  *psapic;	// shared lapic inf.
  10.115 -#endif
  10.116 -    
  10.117 +
  10.118      VCPU(vcpu, lid) = ia64_getreg(_IA64_REG_CR_LID);
  10.119      VCPU(vcpu, ivr) = 0;
  10.120      VCPU(vcpu,tpr) = 0x10000;
  10.121 @@ -331,9 +348,10 @@ void vlsapic_reset(VCPU *vcpu)
  10.122      for ( i=0; i<4; i++) {
  10.123          VLSAPIC_INSVC(vcpu,i) = 0;
  10.124      }
  10.125 +
  10.126  #ifdef V_IOSAPIC_READY
  10.127 -    vlapic_update_shared_info(vcpu);
  10.128 -    //vlapic_update_shared_irr(vcpu);
  10.129 +    vcpu->arch.arch_vmx.vlapic.vcpu = vcpu;
  10.130 +    vmx_vioapic_add_lapic(&vcpu->arch.arch_vmx.vlapic, vcpu);
  10.131  #endif
  10.132      DPRINTK("VLSAPIC inservice base=%lp\n", &VLSAPIC_INSVC(vcpu,0) );
  10.133  }
    11.1 --- a/xen/arch/ia64/vmx/vmx_init.c	Wed Nov 09 14:42:15 2005 +0100
    11.2 +++ b/xen/arch/ia64/vmx/vmx_init.c	Wed Nov 09 14:53:12 2005 +0100
    11.3 @@ -48,9 +48,11 @@
    11.4  #include <asm/vmx.h>
    11.5  #include <xen/mm.h>
    11.6  #include <public/arch-ia64.h>
    11.7 +#include <asm/vmx_vioapic.h>
    11.8  
    11.9  /* Global flag to identify whether Intel vmx feature is on */
   11.10  u32 vmx_enabled = 0;
   11.11 +unsigned int opt_vmx_debug_level = 0;
   11.12  static u32 vm_order;
   11.13  static u64 buffer_size;
   11.14  static u64 vp_env_info;
   11.15 @@ -307,9 +309,8 @@ vmx_change_double_mapping(struct vcpu *v
   11.16   * is registered here.
   11.17   */
   11.18  void
   11.19 -vmx_final_setup_domain(struct domain *d)
   11.20 +vmx_final_setup_guest(struct vcpu *v)
   11.21  {
   11.22 -	struct vcpu *v = d->vcpu[0];
   11.23  	vpd_t *vpd;
   11.24  
   11.25  	/* Allocate resources for vcpu 0 */
   11.26 @@ -318,8 +319,7 @@ vmx_final_setup_domain(struct domain *d)
   11.27  	vpd = alloc_vpd();
   11.28  	ASSERT(vpd);
   11.29  
   11.30 -//	v->arch.arch_vmx.vpd = vpd;
   11.31 -    v->arch.privregs = vpd;
   11.32 +	v->arch.privregs = vpd;
   11.33  	vpd->virt_env_vaddr = vm_buffer;
   11.34  
   11.35  	/* Per-domain vTLB and vhpt implementation. Now vmx domain will stick
   11.36 @@ -341,7 +341,8 @@ vmx_final_setup_domain(struct domain *d)
   11.37  	vlsapic_reset(v);
   11.38  	vtm_init(v);
   11.39  
   11.40 -	/* Other vmx specific initialization work */
   11.41 +	/* One more step to enable interrupt assist */
   11.42 +	set_bit(ARCH_VMX_INTR_ASSIST, &v->arch.arch_vmx.flags);
   11.43  }
   11.44  
   11.45  typedef struct io_range {
   11.46 @@ -431,9 +432,8 @@ int vmx_alloc_contig_pages(struct domain
   11.47  	return 0;
   11.48  }
   11.49  
   11.50 -void vmx_setup_platform(struct vcpu *v, struct vcpu_guest_context *c)
   11.51 +void vmx_setup_platform(struct domain *d, struct vcpu_guest_context *c)
   11.52  {
   11.53 -	struct domain *d = v->domain;
   11.54  	shared_iopage_t *sp;
   11.55  
   11.56  	ASSERT(d != dom0); /* only for non-privileged vti domain */
   11.57 @@ -441,27 +441,19 @@ void vmx_setup_platform(struct vcpu *v, 
   11.58  		__va(__gpa_to_mpa(d, IO_PAGE_START));
   11.59  	sp = get_sp(d);
   11.60  	//memset((char *)sp,0,PAGE_SIZE);
   11.61 -	//sp->sp_global.eport = 2;
   11.62 -#ifdef V_IOSAPIC_READY
   11.63 -	sp->vcpu_number = 1;
   11.64 -#endif
   11.65  	/* TEMP */
   11.66  	d->arch.vmx_platform.pib_base = 0xfee00000UL;
   11.67  
   11.68 -	/* One more step to enable interrupt assist */
   11.69 -	set_bit(ARCH_VMX_INTR_ASSIST, &v->arch.arch_vmx.flags);
   11.70  	/* Only open one port for I/O and interrupt emulation */
   11.71 -	if (v == d->vcpu[0]) {
   11.72 -	    memset(&d->shared_info->evtchn_mask[0], 0xff,
   11.73 -		sizeof(d->shared_info->evtchn_mask));
   11.74 -	    clear_bit(iopacket_port(d), &d->shared_info->evtchn_mask[0]);
   11.75 -	}
   11.76 +	memset(&d->shared_info->evtchn_mask[0], 0xff,
   11.77 +	    sizeof(d->shared_info->evtchn_mask));
   11.78 +	clear_bit(iopacket_port(d), &d->shared_info->evtchn_mask[0]);
   11.79  
   11.80 -	/* FIXME: only support PMT table continuously by far */
   11.81 -//	d->arch.pmt = __va(c->pt_base);
   11.82 +	/* Initialize the virtual interrupt lines */
   11.83 +	vmx_virq_line_init(d);
   11.84  
   11.85 -
   11.86 -	vmx_final_setup_domain(d);
   11.87 +	/* Initialize iosapic model within hypervisor */
   11.88 +	vmx_vioapic_init(d);
   11.89  }
   11.90  
   11.91  
    12.1 --- a/xen/arch/ia64/vmx/vmx_support.c	Wed Nov 09 14:42:15 2005 +0100
    12.2 +++ b/xen/arch/ia64/vmx/vmx_support.c	Wed Nov 09 14:53:12 2005 +0100
    12.3 @@ -156,9 +156,8 @@ void vmx_intr_assist(struct vcpu *v)
    12.4  	panic("Corruption: bad shared page: %lx\n", (unsigned long)vio);
    12.5  
    12.6  #ifdef V_IOSAPIC_READY
    12.7 -    vlapic_update_ext_irq(v);
    12.8 -#else
    12.9 -    //panic("IOSAPIC model is missed in qemu\n");
   12.10 +    /* Confirm virtual interrupt line signals, and set pending bits in vpd */
   12.11 +    vmx_virq_line_assist(v);
   12.12  #endif
   12.13      return;
   12.14  }
    13.1 --- a/xen/arch/ia64/xen/domain.c	Wed Nov 09 14:42:15 2005 +0100
    13.2 +++ b/xen/arch/ia64/xen/domain.c	Wed Nov 09 14:53:12 2005 +0100
    13.3 @@ -293,10 +293,14 @@ int arch_set_info_guest(struct vcpu *v, 
    13.4  		return -EINVAL;
    13.5  	    }
    13.6  
    13.7 -	    vmx_setup_platform(v, c);
    13.8 +	    if (v == d->vcpu[0])
    13.9 +		vmx_setup_platform(d, c);
   13.10 +
   13.11 +	    vmx_final_setup_guest(v);
   13.12  	}
   13.13  
   13.14  	*regs = c->regs;
   13.15 +	d->arch.sys_pgnr = c->sys_pgnr;
   13.16  	new_thread(v, regs->cr_iip, 0, 0);
   13.17  
   13.18   	v->vcpu_info->arch.evtchn_vector = c->vcpu.evtchn_vector;
   13.19 @@ -307,7 +311,6 @@ int arch_set_info_guest(struct vcpu *v, 
   13.20  	}
   13.21  
   13.22  	v->arch.domain_itm_last = -1L;
   13.23 -	d->arch.sys_pgnr = c->sys_pgnr;
   13.24  	d->shared_info->arch = c->shared;
   13.25  
   13.26  	/* Don't redo final setup */
   13.27 @@ -991,7 +994,7 @@ int construct_dom0(struct domain *d,
   13.28  	 */
   13.29  	printk("Dom0: 0x%lx, domain: 0x%lx\n", (u64)dom0, (u64)d);
   13.30  	if (vmx_dom0)
   13.31 -	    vmx_final_setup_domain(dom0);
   13.32 +	    vmx_final_setup_guest(v);
   13.33  
   13.34  	set_bit(_VCPUF_initialised, &v->vcpu_flags);
   13.35  
    14.1 --- a/xen/arch/x86/dm/vmx_vioapic.c	Wed Nov 09 14:42:15 2005 +0100
    14.2 +++ b/xen/arch/x86/dm/vmx_vioapic.c	Wed Nov 09 14:53:12 2005 +0100
    14.3 @@ -297,12 +297,14 @@ static int ioapic_inj_irq(vmx_vioapic_t 
    14.4      switch (delivery_mode) {
    14.5      case VLAPIC_DELIV_MODE_FIXED:
    14.6      case VLAPIC_DELIV_MODE_LPRI:
    14.7 -        if (test_and_set_bit(vector, &target->irr[0]) && trig_mode == 1) {
    14.8 +        if (test_and_set_bit(vector, &VLAPIC_IRR(target)) && trig_mode == 1) {
    14.9              /* the level interrupt should not happen before it is cleard */
   14.10              printk("<ioapic_inj_irq> level interrupt happen before cleard\n");
   14.11          }
   14.12 +#ifndef __ia64__
   14.13          if (trig_mode)
   14.14              test_and_set_bit(vector, &target->tmr[0]);
   14.15 +#endif
   14.16          result = 1;
   14.17          break;
   14.18      default:
   14.19 @@ -367,7 +369,7 @@ static uint32_t ioapic_get_delivery_bitm
   14.20  
   14.21      if (dest_mode == 0) { /* Physical mode */
   14.22          for (i = 0; i < s->lapic_count; i++) {
   14.23 -            if (s->lapic_info[i]->id == dest) {
   14.24 +            if (VLAPIC_ID(s->lapic_info[i]) == dest) {
   14.25                  mask = 1 << i;
   14.26                  break;
   14.27              }
    15.1 --- a/xen/include/asm-ia64/vmx.h	Wed Nov 09 14:42:15 2005 +0100
    15.2 +++ b/xen/include/asm-ia64/vmx.h	Wed Nov 09 14:53:12 2005 +0100
    15.3 @@ -25,14 +25,13 @@
    15.4  #define RR7_SWITCH_SHIFT	12	/* 4k enough */
    15.5  #include <public/io/ioreq.h>
    15.6  
    15.7 -
    15.8  extern void identify_vmx_feature(void);
    15.9  extern unsigned int vmx_enabled;
   15.10  extern void vmx_init_env(void);
   15.11 -extern void vmx_final_setup_domain(struct domain *d);
   15.12 +extern void vmx_final_setup_guest(struct vcpu *v);
   15.13  extern void vmx_save_state(struct vcpu *v);
   15.14  extern void vmx_load_state(struct vcpu *v);
   15.15 -extern void vmx_setup_platform(struct vcpu *v, struct vcpu_guest_context *c);
   15.16 +extern void vmx_setup_platform(struct domain *d, struct vcpu_guest_context *c);
   15.17  #ifdef XEN_DBL_MAPPING
   15.18  extern vmx_insert_double_mapping(u64,u64,u64,u64,u64);
   15.19  extern void vmx_purge_double_mapping(u64, u64, u64);
   15.20 @@ -57,4 +56,22 @@ static inline shared_iopage_t *get_sp(st
   15.21  {
   15.22      return (shared_iopage_t *)d->arch.vmx_platform.shared_page_va;
   15.23  }
   15.24 +
   15.25 +typedef unsigned long (*vmx_mmio_read_t)(struct vcpu *v,
   15.26 +                                         unsigned long addr,
   15.27 +                                         unsigned long length);
   15.28 +
   15.29 +typedef void (*vmx_mmio_write_t)(struct vcpu *v,
   15.30 +                                 unsigned long addr,
   15.31 +                                 unsigned long length,
   15.32 +                                 unsigned long val);
   15.33 +
   15.34 +typedef int (*vmx_mmio_check_t)(struct vcpu *v, unsigned long addr);
   15.35 +
   15.36 +struct vmx_mmio_handler {
   15.37 +    vmx_mmio_check_t check_handler;
   15.38 +    vmx_mmio_read_t read_handler;
   15.39 +    vmx_mmio_write_t write_handler;
   15.40 +};
   15.41 +
   15.42  #endif /* _ASM_IA64_VT_H */
    16.1 --- a/xen/include/asm-ia64/vmx_platform.h	Wed Nov 09 14:42:15 2005 +0100
    16.2 +++ b/xen/include/asm-ia64/vmx_platform.h	Wed Nov 09 14:53:12 2005 +0100
    16.3 @@ -20,18 +20,54 @@
    16.4  #define __ASM_IA64_VMX_PLATFORM_H__
    16.5  
    16.6  #include <public/xen.h>
    16.7 -
    16.8 +#include <public/arch-ia64.h>
    16.9 +#include <asm/vmx_vioapic.h>
   16.10  
   16.11  struct mmio_list;
   16.12  typedef struct virutal_platform_def {
   16.13 -    //unsigned long          *real_mode_data; /* E820, etc. */
   16.14 -    unsigned long          shared_page_va;
   16.15 -    //struct vmx_virpit_t    vmx_pit;
   16.16 -    //struct vmx_handler_t   vmx_handler;
   16.17 -    //struct mi_per_cpu_info mpci;            /* MMIO */
   16.18 +    unsigned long       shared_page_va;
   16.19      unsigned long       pib_base;
   16.20      unsigned char       xtp;
   16.21      struct mmio_list    *mmio;
   16.22 +    /* One IOSAPIC now... */
   16.23 +    struct vmx_vioapic   vmx_vioapic;
   16.24  } vir_plat_t;
   16.25  
   16.26 +static inline int __fls(uint32_t word)
   16.27 +{
   16.28 +    long double d = word;
   16.29 +    long exp;
   16.30 +
   16.31 +    __asm__ __volatile__ ("getf.exp %0=%1" : "=r"(exp) : "f"(d));
   16.32 +    return word ? (exp - 0xffff) : -1;
   16.33 +}
   16.34 +
   16.35 +/* This is a connect structure between vIOSAPIC model and vLSAPIC model.
   16.36 + * vlapic is required by vIOSAPIC model to manipulate pending bits, and
   16.37 + * we just map them into vpd here
   16.38 + */
   16.39 +typedef struct vlapic {
   16.40 +    struct vcpu	*vcpu;	/* Link to current vcpu */
   16.41 +} vlapic_t;
   16.42 +
   16.43 +extern uint64_t dummy_tmr[];
   16.44 +#define VCPU(_v,_x)	_v->arch.privregs->_x
   16.45 +#define VLAPIC_ID(l) (uint16_t)(VCPU((l)->vcpu, lid) >> 16)
   16.46 +#define VLAPIC_IRR(l) VCPU((l)->vcpu, irr[0])
   16.47 +
   16.48 +/* As long as we register vlsapic to ioapic controller, it's said enabled */
   16.49 +#define vlapic_enabled(l) 1
   16.50 +#define vmx_apic_support(d) 1
   16.51 +
   16.52 +#define VLAPIC_DELIV_MODE_FIXED		0x0
   16.53 +#define VLAPIC_DELIV_MODE_REDIR		0x1
   16.54 +#define VLAPIC_DELIV_MODE_LPRI		VLAPIC_DELIV_MODE_REDIR
   16.55 +#define VLAPIC_DELIV_MODE_PMI		0x2
   16.56 +#define VLAPIC_DELIV_MODE_SMI		0x2 /* For IA32 */
   16.57 +#define VLAPIC_DELIV_MODE_RESERVED	0x3
   16.58 +#define VLAPIC_DELIV_MODE_NMI		0x4
   16.59 +#define VLAPIC_DELIV_MODE_INIT		0x5
   16.60 +#define VLAPIC_DELIV_MODE_STARTUP	0x6 /* For IA32 */
   16.61 +#define VLAPIC_DELIV_MODE_EXT		0x7
   16.62 +
   16.63  #endif
    17.1 --- a/xen/include/asm-ia64/vmx_vcpu.h	Wed Nov 09 14:42:15 2005 +0100
    17.2 +++ b/xen/include/asm-ia64/vmx_vcpu.h	Wed Nov 09 14:53:12 2005 +0100
    17.3 @@ -107,10 +107,6 @@ extern void vtm_set_itv(VCPU *vcpu);
    17.4  extern void vtm_interruption_update(VCPU *vcpu, vtime_t* vtm);
    17.5  extern void vtm_domain_out(VCPU *vcpu);
    17.6  extern void vtm_domain_in(VCPU *vcpu);
    17.7 -#ifdef V_IOSAPIC_READY
    17.8 -extern void vlapic_update_ext_irq(VCPU *vcpu);
    17.9 -extern void vlapic_update_shared_info(VCPU *vcpu);
   17.10 -#endif
   17.11  extern void vlsapic_reset(VCPU *vcpu);
   17.12  extern int vmx_check_pending_irq(VCPU *vcpu);
   17.13  extern void guest_write_eoi(VCPU *vcpu);
   17.14 @@ -278,9 +274,6 @@ IA64FAULT
   17.15  vmx_vcpu_set_lid(VCPU *vcpu, u64 val)
   17.16  {
   17.17      VCPU(vcpu,lid)=val;
   17.18 -#ifdef V_IOSAPIC_READY
   17.19 -    vlapic_update_shared_info(vcpu);
   17.20 -#endif
   17.21      return IA64_NO_FAULT;
   17.22  }
   17.23  extern IA64FAULT vmx_vcpu_set_tpr(VCPU *vcpu, u64 val);
    18.1 --- a/xen/include/asm-ia64/vmx_vpd.h	Wed Nov 09 14:42:15 2005 +0100
    18.2 +++ b/xen/include/asm-ia64/vmx_vpd.h	Wed Nov 09 14:53:12 2005 +0100
    18.3 @@ -25,6 +25,7 @@
    18.4  #ifndef __ASSEMBLY__
    18.5  
    18.6  #include <asm/vtm.h>
    18.7 +#include <asm/vmx_platform.h>
    18.8  #include <public/arch-ia64.h>
    18.9  
   18.10  #define VPD_SHIFT	17	/* 128K requirement */
   18.11 @@ -65,7 +66,8 @@ typedef struct {
   18.12  struct arch_vmx_struct {
   18.13  //    struct virutal_platform_def     vmx_platform;
   18.14  //	vpd_t       *vpd;
   18.15 -	vtime_t	    vtm;
   18.16 +    vtime_t	    vtm;
   18.17 +    struct vlapic   vlapic;
   18.18      unsigned long   vrr[8];
   18.19      unsigned long   vkr[8];
   18.20      unsigned long   cr_iipa;   /* for emulation */
   18.21 @@ -106,6 +108,7 @@ struct arch_vmx_struct {
   18.22  #define DBG_LEVEL_3     (1 << 3)
   18.23  #define DBG_LEVEL_IO    (1 << 4)
   18.24  #define DBG_LEVEL_VMMU  (1 << 5)
   18.25 +#define DBG_LEVEL_IOAPIC 	(1 << 6)
   18.26  
   18.27  extern unsigned int opt_vmx_debug_level;
   18.28  #define VMX_DBG_LOG(level, _f, _a...)           \
    19.1 --- a/xen/include/asm-x86/vmx_vioapic.h	Wed Nov 09 14:42:15 2005 +0100
    19.2 +++ b/xen/include/asm-x86/vmx_vioapic.h	Wed Nov 09 14:53:12 2005 +0100
    19.3 @@ -63,25 +63,6 @@
    19.4  
    19.5  #define IOAPIC_REG_VERSION 0x1
    19.6  
    19.7 -#ifdef __ia64__
    19.8 -typedef union RedirStatus
    19.9 -{
   19.10 -    uint64_t value;
   19.11 -    struct {
   19.12 -        uint16_t dest_id;
   19.13 -        uint8_t reserved[3];
   19.14 -        uint8_t reserve:7;
   19.15 -        uint8_t mask:1;         /* interrupt mask*/
   19.16 -        uint8_t trigmod:1;
   19.17 -        uint8_t remoteirr:1;
   19.18 -        uint8_t polarity:1;
   19.19 -        uint8_t delivestatus:1;
   19.20 -        uint8_t destmode:1;
   19.21 -        uint8_t deliver_mode:3;
   19.22 -        uint8_t vector;
   19.23 -    } RedirForm;
   19.24 -} RedirStatus;
   19.25 -#else
   19.26  typedef union RedirStatus
   19.27  {
   19.28      uint64_t value;
   19.29 @@ -95,11 +76,15 @@ typedef union RedirStatus
   19.30          uint8_t trigmod:1;
   19.31          uint8_t mask:1;         /* interrupt mask*/
   19.32          uint8_t reserve:7;
   19.33 +#ifndef __ia64__
   19.34          uint8_t reserved[4];
   19.35          uint8_t dest_id;
   19.36 +#else
   19.37 +        uint8_t reserved[3];
   19.38 +        uint16_t dest_id;
   19.39 +#endif
   19.40      } RedirForm;
   19.41  } RedirStatus;
   19.42 -#endif
   19.43  
   19.44  #define IOAPIC_MEM_LENGTH    0x100
   19.45  #define IOAPIC_ENABLE_MASK   0x0
    20.1 --- a/xen/include/asm-x86/vmx_vlapic.h	Wed Nov 09 14:42:15 2005 +0100
    20.2 +++ b/xen/include/asm-x86/vmx_vlapic.h	Wed Nov 09 14:53:12 2005 +0100
    20.3 @@ -151,6 +151,9 @@ static __inline__ int find_highest_bit(u
    20.4  #define vlapic_global_enabled(vlapic)               \
    20.5    !(test_bit(_VLAPIC_GLOB_DISABLE, &(vlapic)->status))
    20.6  
    20.7 +#define VLAPIC_IRR(t) ((t)->irr[0])
    20.8 +#define VLAPIC_ID(t)  ((t)->id)
    20.9 +
   20.10  typedef struct direct_intr_info {
   20.11      int deliver_mode;
   20.12      int source[6];