ia64/xen-unstable

changeset 13907:ac18d251df63

[IA64][MINIOS] Port of mini-os to ia64

ia64 specific parts of mini-os.

Minimal config:

# Kernel image file.
kernel = "mini-os.gz"
# Initial memory allocation (in megabytes) for the new domain.
memory = 64
# A name for your domain.
name = "Mini-OS"

Signed-off-by: Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
author awilliam@xenbuild2.aw
date Thu Feb 15 13:13:36 2007 -0700 (2007-02-15)
parents eb6c19ed6e67
children 9529d667d042
files extras/mini-os/arch/ia64/Makefile extras/mini-os/arch/ia64/__divdi3.S extras/mini-os/arch/ia64/__udivdi3.S extras/mini-os/arch/ia64/__umoddi3.S extras/mini-os/arch/ia64/arch.mk extras/mini-os/arch/ia64/common.c extras/mini-os/arch/ia64/debug.c extras/mini-os/arch/ia64/efi.c extras/mini-os/arch/ia64/fw.S extras/mini-os/arch/ia64/gen_off.c extras/mini-os/arch/ia64/ia64.S extras/mini-os/arch/ia64/ivt.S extras/mini-os/arch/ia64/minios-ia64.lds extras/mini-os/arch/ia64/mm.c extras/mini-os/arch/ia64/sal.c extras/mini-os/arch/ia64/sched.c extras/mini-os/arch/ia64/time.c extras/mini-os/arch/ia64/xencomm.c extras/mini-os/include/ia64/arch_mm.h extras/mini-os/include/ia64/arch_sched.h extras/mini-os/include/ia64/arch_spinlock.h extras/mini-os/include/ia64/asm.h extras/mini-os/include/ia64/atomic.h extras/mini-os/include/ia64/efi.h extras/mini-os/include/ia64/endian.h extras/mini-os/include/ia64/hypercall-ia64.h extras/mini-os/include/ia64/ia64_cpu.h extras/mini-os/include/ia64/ia64_fpu.h extras/mini-os/include/ia64/os.h extras/mini-os/include/ia64/page.h extras/mini-os/include/ia64/pal.h extras/mini-os/include/ia64/privop.h extras/mini-os/include/ia64/sal.h extras/mini-os/include/ia64/traps.h
line diff
     1.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     1.2 +++ b/extras/mini-os/arch/ia64/Makefile	Thu Feb 15 13:13:36 2007 -0700
     1.3 @@ -0,0 +1,56 @@
     1.4 +#
     1.5 +# Special makefile for ia64.
     1.6 +#
     1.7 +
     1.8 +include arch.mk
     1.9 +include ../../minios.mk
    1.10 +
    1.11 +ARCH_SRCS := sal.c
    1.12 +ARCH_SRCS += efi.c
    1.13 +ARCH_SRCS += time.c
    1.14 +ARCH_SRCS += ivt.S
    1.15 +ARCH_SRCS += fw.S
    1.16 +ARCH_SRCS += common.c
    1.17 +ARCH_SRCS += time.c
    1.18 +ARCH_SRCS += mm.c
    1.19 +ARCH_SRCS += debug.c
    1.20 +ARCH_SRCS += sched.c
    1.21 +ARCH_SRCS += xencomm.c
    1.22 +ARCH_SRCS += __umoddi3.S
    1.23 +ARCH_SRCS += __udivdi3.S
    1.24 +ARCH_SRCS += __divdi3.S
    1.25 +
    1.26 +ARCH_OBJS := sal.o
    1.27 +ARCH_OBJS += efi.o
    1.28 +ARCH_OBJS += time.o
    1.29 +ARCH_OBJS += ivt.o
    1.30 +ARCH_OBJS += fw.o
    1.31 +ARCH_OBJS += common.o
    1.32 +ARCH_OBJS += time.o
    1.33 +ARCH_OBJS += mm.o
    1.34 +ARCH_OBJS += debug.o
    1.35 +ARCH_OBJS += sched.o
    1.36 +ARCH_OBJS += xencomm.o
    1.37 +ARCH_OBJS += __umoddi3.o
    1.38 +ARCH_OBJS += __udivdi3.o
    1.39 +ARCH_OBJS += __divdi3.o
    1.40 +
    1.41 +GEN_OFF_SRC := gen_off.c
    1.42 +GEN_OFF_BIN := gen_off
    1.43 +GEN_OFF_H   := $(ARCH_SPEC_INC)/offsets.h
    1.44 +
    1.45 +all: $(ARCH_LIB)
    1.46 +
    1.47 +$(GEN_OFF_BIN): $(GEN_OFF_SRC)
    1.48 +	$(CC) -o $@ $(CPPFLAGS) $<
    1.49 +
    1.50 +$(GEN_OFF_H): $(GEN_OFF_BIN)
    1.51 +	./$(GEN_OFF_BIN) > $(GEN_OFF_H)
    1.52 +
    1.53 +$(ARCH_LIB): $(GEN_OFF_H) $(ARCH_OBJS) $(HEAD_ARCH_OBJ)
    1.54 +	$(AR) rv $(ARCH_LIB) $(ARCH_OBJS)
    1.55 +
    1.56 +clean:
    1.57 +	rm -f $(ARCH_LIB) $(ARCH_OBJS) $(HEAD_ARCH_OBJ)
    1.58 +	rm -f $(GEN_OFF_BIN)
    1.59 +	rm -f $(GEN_OFF_H)
     2.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     2.2 +++ b/extras/mini-os/arch/ia64/__divdi3.S	Thu Feb 15 13:13:36 2007 -0700
     2.3 @@ -0,0 +1,141 @@
     2.4 +.file "__divdi3.s"
     2.5 +
     2.6 +// $FreeBSD: src/sys/libkern/ia64/__divdi3.S,v 1.1 2000/10/04 17:53:03 dfr Exp $
     2.7 +//  
     2.8 +// Copyright (c) 2000, Intel Corporation
     2.9 +// All rights reserved.
    2.10 +//
    2.11 +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, 
    2.12 +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, 
    2.13 +// Intel Corporation.
    2.14 +//
    2.15 +// WARRANTY DISCLAIMER
    2.16 +//
    2.17 +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    2.18 +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
    2.19 +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    2.20 +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS 
    2.21 +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    2.22 +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    2.23 +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
    2.24 +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
    2.25 +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
    2.26 +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
    2.27 +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    2.28 +//
    2.29 +// Intel Corporation is the author of this code, and requests that all
    2.30 +// problem reports or change requests be submitted to it directly at
    2.31 +// http://developer.intel.com/opensource.
    2.32 +//
    2.33 +
    2.34 +.section .text
    2.35 +.proc __divdi3#
    2.36 +.align 32
    2.37 +.global __divdi3#
    2.38 +.align 32
    2.39 +
    2.40 +// 64-bit signed integer divide
    2.41 +
    2.42 +__divdi3:
    2.43 +
    2.44 +{ .mii
    2.45 +  alloc r31=ar.pfs,2,0,0,0
    2.46 +  nop.i 0
    2.47 +  nop.i 0;;
    2.48 +} { .mmi
    2.49 +
    2.50 +  // 64-BIT SIGNED INTEGER DIVIDE BEGINS HERE
    2.51 +
    2.52 +  setf.sig f8=r32
    2.53 +  setf.sig f9=r33
    2.54 +  nop.i 0;;
    2.55 +} { .mfb
    2.56 +  nop.m 0
    2.57 +  fcvt.xf f6=f8
    2.58 +  nop.b 0
    2.59 +} { .mfb
    2.60 +  nop.m 0
    2.61 +  fcvt.xf f7=f9
    2.62 +  nop.b 0;;
    2.63 +} { .mfi
    2.64 +  nop.m 0
    2.65 +  // Step (1)
    2.66 +  // y0 = 1 / b in f8
    2.67 +  frcpa.s1 f8,p6=f6,f7
    2.68 +  nop.i 0;;
    2.69 +} { .mfi
    2.70 +  nop.m 0
    2.71 +  // Step (2)
    2.72 +  // e0 = 1 - b * y0 in f9
    2.73 +  (p6) fnma.s1 f9=f7,f8,f1
    2.74 +  nop.i 0
    2.75 +} { .mfi
    2.76 +  nop.m 0
    2.77 +  // Step (3)
    2.78 +  // q0 = a * y0 in f10
    2.79 +  (p6) fma.s1 f10=f6,f8,f0
    2.80 +  nop.i 0;;
    2.81 +} { .mfi
    2.82 +  nop.m 0
    2.83 +  // Step (4)
    2.84 +  // e1 = e0 * e0 in f11
    2.85 +  (p6) fma.s1 f11=f9,f9,f0
    2.86 +  nop.i 0
    2.87 +} { .mfi
    2.88 +  nop.m 0
    2.89 +  // Step (5)
    2.90 +  // q1 = q0 + e0 * q0 in f10
    2.91 +  (p6) fma.s1 f10=f9,f10,f10
    2.92 +  nop.i 0;;
    2.93 +} { .mfi
    2.94 +  nop.m 0
    2.95 +  // Step (6)
    2.96 +  // y1 = y0 + e0 * y0 in f8
    2.97 +  (p6) fma.s1 f8=f9,f8,f8
    2.98 +  nop.i 0;;
    2.99 +} { .mfi
   2.100 +  nop.m 0
   2.101 +  // Step (7)
   2.102 +  // q2 = q1 + e1 * q1 in f9
   2.103 +  (p6) fma.s1 f9=f11,f10,f10
   2.104 +  nop.i 0;;
   2.105 +} { .mfi
   2.106 +  nop.m 0
   2.107 +  // Step (8)
   2.108 +  // y2 = y1 + e1 * y1 in f8
   2.109 +  (p6) fma.s1 f8=f11,f8,f8
   2.110 +  nop.i 0;;
   2.111 +} { .mfi
   2.112 +  nop.m 0
   2.113 +  // Step (9)
   2.114 +  // r2 = a - b * q2 in f10
   2.115 +  (p6) fnma.s1 f10=f7,f9,f6
   2.116 +  nop.i 0;;
   2.117 +} { .mfi
   2.118 +  nop.m 0
   2.119 +  // Step (10)
   2.120 +  // q3 = q2 + r2 * y2 in f8
   2.121 +  (p6) fma.s1 f8=f10,f8,f9
   2.122 +  nop.i 0;;
   2.123 +} { .mfb
   2.124 +  nop.m 0
   2.125 +  // Step (11)
   2.126 +  // q = trunc (q3)
   2.127 +  fcvt.fx.trunc.s1 f8=f8
   2.128 +  nop.b 0;;
   2.129 +} { .mmi
   2.130 +  // quotient will be in r8 (if b != 0)
   2.131 +  getf.sig r8=f8
   2.132 +  nop.m 0
   2.133 +  nop.i 0;;
   2.134 +}
   2.135 +
   2.136 +  // 64-BIT SIGNED INTEGER DIVIDE ENDS HERE
   2.137 +
   2.138 +{ .mmb
   2.139 +  nop.m 0
   2.140 +  nop.m 0
   2.141 +  br.ret.sptk b0;;
   2.142 +}
   2.143 +
   2.144 +.endp __divdi3
     3.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     3.2 +++ b/extras/mini-os/arch/ia64/__udivdi3.S	Thu Feb 15 13:13:36 2007 -0700
     3.3 @@ -0,0 +1,142 @@
     3.4 +.file "__udivdi3.s"
     3.5 +
     3.6 +// $FreeBSD: src/sys/libkern/ia64/__udivdi3.S,v 1.1 2000/10/04 17:53:03 dfr Exp $
     3.7 +//  
     3.8 +// Copyright (c) 2000, Intel Corporation
     3.9 +// All rights reserved.
    3.10 +//
    3.11 +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, 
    3.12 +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, 
    3.13 +// Intel Corporation.
    3.14 +//
    3.15 +// WARRANTY DISCLAIMER
    3.16 +//
    3.17 +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    3.18 +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
    3.19 +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    3.20 +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS 
    3.21 +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    3.22 +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    3.23 +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
    3.24 +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
    3.25 +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
    3.26 +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
    3.27 +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    3.28 +//
    3.29 +// Intel Corporation is the author of this code, and requests that all
    3.30 +// problem reports or change requests be submitted to it directly at
    3.31 +// http://developer.intel.com/opensource.
    3.32 +//
    3.33 +
    3.34 +.section .text
    3.35 +.proc __udivdi3#
    3.36 +.align 32
    3.37 +.global __udivdi3#
    3.38 +.align 32
    3.39 +
    3.40 +// 64-bit unsigned integer divide
    3.41 +
    3.42 +__udivdi3:
    3.43 +
    3.44 +{ .mii
    3.45 +  alloc r31=ar.pfs,2,0,0,0
    3.46 +  nop.i 0
    3.47 +  nop.i 0;;
    3.48 +}
    3.49 +
    3.50 +{ .mmi
    3.51 +
    3.52 +  // 64-BIT UNSIGNED INTEGER DIVIDE BEGINS HERE
    3.53 +
    3.54 +  setf.sig f8=r32
    3.55 +  setf.sig f9=r33
    3.56 +  nop.i 0;;
    3.57 +} { .mfb
    3.58 +  nop.m 0
    3.59 +  fma.s1 f6=f8,f1,f0
    3.60 +  nop.b 0
    3.61 +} { .mfb
    3.62 +  nop.m 0
    3.63 +  fma.s1 f7=f9,f1,f0
    3.64 +  nop.b 0;;
    3.65 +} { .mfi
    3.66 +  nop.m 0
    3.67 +  // Step (1)
    3.68 +  // y0 = 1 / b in f8
    3.69 +  frcpa.s1 f8,p6=f6,f7
    3.70 +  nop.i 0;;
    3.71 +} { .mfi
    3.72 +  nop.m 0
    3.73 +  // Step (2)
    3.74 +  // e0 = 1 - b * y0 in f9
    3.75 +  (p6) fnma.s1 f9=f7,f8,f1
    3.76 +  nop.i 0
    3.77 +} { .mfi
    3.78 +  nop.m 0
    3.79 +  // Step (3)
    3.80 +  // q0 = a * y0 in f10
    3.81 +  (p6) fma.s1 f10=f6,f8,f0
    3.82 +  nop.i 0;;
    3.83 +} { .mfi
    3.84 +  nop.m 0
    3.85 +  // Step (4)
    3.86 +  // e1 = e0 * e0 in f11
    3.87 +  (p6) fma.s1 f11=f9,f9,f0
    3.88 +  nop.i 0
    3.89 +} { .mfi
    3.90 +  nop.m 0
    3.91 +  // Step (5)
    3.92 +  // q1 = q0 + e0 * q0 in f10
    3.93 +  (p6) fma.s1 f10=f9,f10,f10
    3.94 +  nop.i 0;;
    3.95 +} { .mfi
    3.96 +  nop.m 0
    3.97 +  // Step (6)
    3.98 +  // y1 = y0 + e0 * y0 in f8
    3.99 +  (p6) fma.s1 f8=f9,f8,f8
   3.100 +  nop.i 0;;
   3.101 +} { .mfi
   3.102 +  nop.m 0
   3.103 +  // Step (7)
   3.104 +  // q2 = q1 + e1 * q1 in f9
   3.105 +  (p6) fma.s1 f9=f11,f10,f10
   3.106 +  nop.i 0;;
   3.107 +} { .mfi
   3.108 +  nop.m 0
   3.109 +  // Step (8)
   3.110 +  // y2 = y1 + e1 * y1 in f8
   3.111 +  (p6) fma.s1 f8=f11,f8,f8
   3.112 +  nop.i 0;;
   3.113 +} { .mfi
   3.114 +  nop.m 0
   3.115 +  // Step (9)
   3.116 +  // r2 = a - b * q2 in f10
   3.117 +  (p6) fnma.s1 f10=f7,f9,f6
   3.118 +  nop.i 0;;
   3.119 +} { .mfi
   3.120 +  nop.m 0
   3.121 +  // Step (10)
   3.122 +  // q3 = q2 + r2 * y2 in f8
   3.123 +  (p6) fma.s1 f8=f10,f8,f9
   3.124 +  nop.i 0;;
   3.125 +} { .mfb
   3.126 +  nop.m 0
   3.127 +  // (11) q = trunc(q3)
   3.128 +  fcvt.fxu.trunc.s1 f8=f8
   3.129 +  nop.b 0;;
   3.130 +} { .mmi
   3.131 +  // quotient will be in r8 (if b != 0)
   3.132 +  getf.sig r8=f8
   3.133 +  nop.m 0
   3.134 +  nop.i 0;;
   3.135 +}
   3.136 +
   3.137 +  // 64-BIT UNSIGNED INTEGER DIVIDE ENDS HERE
   3.138 +
   3.139 +{ .mmb
   3.140 +  nop.m 0
   3.141 +  nop.m 0
   3.142 +  br.ret.sptk b0;;
   3.143 +}
   3.144 +
   3.145 +.endp __udivdi3
     4.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     4.2 +++ b/extras/mini-os/arch/ia64/__umoddi3.S	Thu Feb 15 13:13:36 2007 -0700
     4.3 @@ -0,0 +1,154 @@
     4.4 +.file "__umoddi3.s"
     4.5 +
     4.6 +// $FreeBSD: src/sys/libkern/ia64/__umoddi3.S,v 1.3 2003/02/11 20:15:11 schweikh Exp $
     4.7 +//  
     4.8 +// Copyright (c) 2000, Intel Corporation
     4.9 +// All rights reserved.
    4.10 +//
    4.11 +// Contributed 2/15/2000 by Marius Cornea, John Harrison, Cristina Iordache, 
    4.12 +// Ted Kubaska, Bob Norin, and Shane Story of the Computational Software Lab, 
    4.13 +// Intel Corporation.
    4.14 +//
    4.15 +// WARRANTY DISCLAIMER
    4.16 +//
    4.17 +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
    4.18 +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
    4.19 +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    4.20 +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS 
    4.21 +// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    4.22 +// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    4.23 +// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
    4.24 +// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
    4.25 +// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
    4.26 +// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
    4.27 +// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    4.28 +//
    4.29 +// Intel Corporation is the author of this code, and requests that all
    4.30 +// problem reports or change requests be submitted to it directly at
    4.31 +// http://developer.intel.com/opensource.
    4.32 +//
    4.33 +
    4.34 +.section .text
    4.35 +
    4.36 +  // 64-bit unsigned integer remainder
    4.37 +
    4.38 +.proc __umoddi3#
    4.39 +.align 32
    4.40 +.global __umoddi3#
    4.41 +.align 32
    4.42 +
    4.43 +__umoddi3:
    4.44 +
    4.45 +{ .mii
    4.46 +  alloc r31=ar.pfs,3,0,0,0
    4.47 +  nop.i 0
    4.48 +  nop.i 0
    4.49 +} { .mmb
    4.50 +
    4.51 +  // 64-BIT UNSIGNED INTEGER REMAINDER BEGINS HERE
    4.52 +
    4.53 +  // general register used:
    4.54 +  //    r32 - 64-bit unsigned integer dividend, called a below
    4.55 +  //    r33 - 64-bit unsigned integer divisor, called b below
    4.56 +  //    r8 - 64-bit unsigned integer result
    4.57 +  // floating-point registers used: f6, f7, f8, f9, f10, f11, f12
    4.58 +  // predicate registers used: p6
    4.59 +
    4.60 +  setf.sig f12=r32  // holds a in integer form
    4.61 +  setf.sig f7=r33
    4.62 +  nop.b 0;;
    4.63 +} { .mfi
    4.64 +  // get 2s complement of b
    4.65 +  sub r33=r0,r33
    4.66 +  fcvt.xuf.s1 f6=f12
    4.67 +  nop.i 0
    4.68 +} { .mfi
    4.69 +  nop.m 0
    4.70 +  fcvt.xuf.s1 f7=f7
    4.71 +  nop.i 0;;
    4.72 +} { .mfi
    4.73 +  nop.m 0
    4.74 +  // Step (1)
    4.75 +  // y0 = 1 / b in f8
    4.76 +  frcpa.s1 f8,p6=f6,f7
    4.77 +  nop.i 0;;
    4.78 +} { .mfi
    4.79 +  nop.m 0
    4.80 +  // Step (2)
    4.81 +  // q0 = a * y0 in f10
    4.82 +  (p6) fma.s1 f10=f6,f8,f0
    4.83 +  nop.i 0
    4.84 +} { .mfi
    4.85 +  nop.m 0
    4.86 +  // Step (3)
    4.87 +  // e0 = 1 - b * y0 in f9
    4.88 +  (p6) fnma.s1 f9=f7,f8,f1
    4.89 +  nop.i 0;;
    4.90 +} { .mfi
    4.91 +  nop.m 0
    4.92 +  // Step (4)
    4.93 +  // q1 = q0 + e0 * q0 in f10
    4.94 +  (p6) fma.s1 f10=f9,f10,f10
    4.95 +  nop.i 0
    4.96 +} { .mfi
    4.97 +  nop.m 0
    4.98 +  // Step (5)
    4.99 +  // e1 = e0 * e0 in f11
   4.100 +  (p6) fma.s1 f11=f9,f9,f0
   4.101 +  nop.i 0;;
   4.102 +} { .mfi
   4.103 +  nop.m 0
   4.104 +  // Step (6)
   4.105 +  // y1 = y0 + e0 * y0 in f8
   4.106 +  (p6) fma.s1 f8=f9,f8,f8
   4.107 +  nop.i 0;;
   4.108 +} { .mfi
   4.109 +  nop.m 0
   4.110 +  // Step (7)
   4.111 +  // q2 = q1 + e1 * q1 in f9
   4.112 +  (p6) fma.s1 f9=f11,f10,f10
   4.113 +  nop.i 0;;
   4.114 +} { .mfi
   4.115 +  nop.m 0
   4.116 +  // Step (8)
   4.117 +  // y2 = y1 + e1 * y1 in f8
   4.118 +  (p6) fma.s1 f8=f11,f8,f8
   4.119 +  nop.i 0;;
   4.120 +} { .mfi
   4.121 +  nop.m 0
   4.122 +  // Step (9)
   4.123 +  // r2 = a - b * q2 in f10
   4.124 +  (p6) fnma.s1 f10=f7,f9,f6
   4.125 +  nop.i 0;;
   4.126 +} { .mfi
   4.127 +  // f7=-b
   4.128 +  setf.sig f7=r33
   4.129 +  // Step (10)
   4.130 +  // q3 = q2 + r2 * y2 in f8
   4.131 +  (p6) fma.s1 f8=f10,f8,f9
   4.132 +  nop.i 0;;
   4.133 +} { .mfi
   4.134 +  nop.m 0
   4.135 +  // (11) q = trunc(q3)
   4.136 +  fcvt.fxu.trunc.s1 f8=f8
   4.137 +  nop.i 0;;
   4.138 +}  { .mfi
   4.139 +  nop.m 0
   4.140 +  // (12) r = a + (-b) * q
   4.141 +  xma.l f8=f8,f7,f12
   4.142 +  nop.i 0;;
   4.143 +}  { .mib
   4.144 +  getf.sig r8=f8
   4.145 +  nop.i 0
   4.146 +  nop.b 0
   4.147 +}
   4.148 +
   4.149 +  // 64-BIT UNSIGNED INTEGER REMAINDER ENDS HERE
   4.150 +
   4.151 +{ .mib
   4.152 +  nop.m 0
   4.153 +  nop.i 0
   4.154 +  br.ret.sptk b0;;
   4.155 +}
   4.156 +
   4.157 +.endp __umoddi3
     5.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     5.2 +++ b/extras/mini-os/arch/ia64/arch.mk	Thu Feb 15 13:13:36 2007 -0700
     5.3 @@ -0,0 +1,5 @@
     5.4 +ARCH_CFLAGS := -mfixed-range=f2-f5,f12-f15,f32-f127 -mconstant-gp
     5.5 +ARCH_CFLAGS += -O2
     5.6 +ARCH_ASFLAGS := -x assembler-with-cpp
     5.7 +ARCH_ASFLAGS += -mfixed-range=f2-f5,f12-f15,f32-f127 -fomit-frame-pointer
     5.8 +ARCH_ASFLAGS += -fno-builtin -fno-common -fno-strict-aliasing -mconstant-gp
     6.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     6.2 +++ b/extras/mini-os/arch/ia64/common.c	Thu Feb 15 13:13:36 2007 -0700
     6.3 @@ -0,0 +1,236 @@
     6.4 +/*
     6.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
     6.6 + *
     6.7 + ****************************************************************************
     6.8 + *
     6.9 + * Redistribution and use in source and binary forms, with or without
    6.10 + * modification, are permitted provided that the following conditions
    6.11 + * are met:
    6.12 + * 1. Redistributions of source code must retain the above copyright
    6.13 + *    notice, this list of conditions and the following disclaimer.
    6.14 + * 2. Redistributions in binary form must reproduce the above copyright
    6.15 + *    notice, this list of conditions and the following disclaimer in the
    6.16 + *    documentation and/or other materials provided with the distribution.
    6.17 + *
    6.18 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
    6.19 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    6.20 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
    6.21 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
    6.22 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    6.23 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
    6.24 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    6.25 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    6.26 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    6.27 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    6.28 + * SUCH DAMAGE.
    6.29 + *
    6.30 + ****************************************************************************
    6.31 + *
    6.32 + * Parts are taken from FreeBSD.
    6.33 + *
    6.34 + */
    6.35 +
    6.36 +
    6.37 +#include "os.h"
    6.38 +#include "types.h"
    6.39 +#include "lib.h"
    6.40 +#include "page.h"
    6.41 +#include "xen/xen.h"
    6.42 +#include "privop.h"
    6.43 +#include "xen/callback.h"
    6.44 +#include "ia64_cpu.h"
    6.45 +#include "hypervisor.h"
    6.46 +#include "events.h"
    6.47 +#include "console.h"
    6.48 +#include "time.h"
    6.49 +#include "xmalloc.h"
    6.50 +
    6.51 +
    6.52 +/* For more console boot messages. */
    6.53 +int bootverbose;
    6.54 +
    6.55 +/*
    6.56 + * This structure contains start-of-day info, such as pagetable base pointer,
    6.57 + * address of the shared_info structure, and things like that.
    6.58 + */
    6.59 +union start_info_union start_info_union;
    6.60 +
    6.61 +shared_info_t *HYPERVISOR_shared_info = (shared_info_t *)XSI_BASE;
    6.62 +
    6.63 +struct machine_fw machineFwG;
    6.64 +
    6.65 +
    6.66 +struct xen_ia64_boot_param ia64BootParamG;
    6.67 +char boot_cmd_line[COMMAND_LINE_SIZE+1];
    6.68 +
    6.69 +
    6.70 +void
    6.71 +ia64_write_itr_i(ia64_pte_t* pteP, u32 reg, uint64_t vAddr,
    6.72 +		  uint64_t ps, uint64_t pk)
    6.73 +{
    6.74 +	/* The virtual address. */
    6.75 +	__asm __volatile("mov	cr.ifa=%0" :: "r"(vAddr));
    6.76 +	/* The page size */
    6.77 +	__asm __volatile("mov	cr.itir=%0;;" :: "r"((ps << IA64_ITIR_PS)|(pk << IA64_ITIR_KEY)));
    6.78 +	/* Put pte into instruction translation register. */ 
    6.79 +	__asm __volatile("itr.i	itr[%0]=%1" :: "r"(reg), "r"(*(uint64_t*)pteP));
    6.80 +	/* Serialization */
    6.81 +	__asm __volatile("srlz.i");
    6.82 +}
    6.83 +
    6.84 +void
    6.85 +map_pal_code(void)
    6.86 +{
    6.87 +	ia64_pte_t pte;
    6.88 +
    6.89 +	xen_set_virtual_psr_ic(0);
    6.90 +	memset(&pte, 0, sizeof(pte));		/* Prepare the pte */
    6.91 +	pte.pte_p = 1;				/* present bit */
    6.92 +	pte.pte_ma = PTE_MA_WB;			/* memory attribute */
    6.93 +	pte.pte_a = 1;				/* accessed bit */
    6.94 +	pte.pte_d = 1;				/* dirty bit */
    6.95 +	pte.pte_pl = PTE_PL_KERN;		/* privilege level */
    6.96 +	pte.pte_ar = PTE_AR_RWX;		/* access rights */
    6.97 +	pte.pte_ppn = ((uint64_t) __pa(machineFwG.ia64_pal_base)) >> 14;
    6.98 +	pte.pte_ed = 0;				/* exception deferral */
    6.99 +
   6.100 +	/*
   6.101 +	 * Must purge here because a itc/dtc with the same address
   6.102 +	 * may be in the tlb!
   6.103 +	 */
   6.104 +	ia64_ptc_l(machineFwG.ia64_pal_base, PTE_PS_16K);
   6.105 +	ia64_write_itr_i(&pte, IA64_TR_PAL,
   6.106 +			 (uint64_t) machineFwG.ia64_pal_base, PTE_PS_16K, 0);
   6.107 +	xen_set_virtual_psr_ic(1);
   6.108 +}
   6.109 +
   6.110 +extern char hypervisor_callback;
   6.111 +
   6.112 +static void
   6.113 +registerCallback(void)
   6.114 +{
   6.115 +	struct callback_register event =
   6.116 +	{
   6.117 +		.type = SWAP(CALLBACKTYPE_event),
   6.118 +		.address = SWAP((unsigned long)&hypervisor_callback),
   6.119 +	};
   6.120 +	HYPERVISOR_callback_op(CALLBACKOP_register, &event);
   6.121 +}
   6.122 +
   6.123 +static void
   6.124 +init_start_info(start_info_t* xen_start_info)
   6.125 +{
   6.126 +	/* Make a copy of the start_info structure */
   6.127 +	start_info.nr_pages = SWAP(xen_start_info->nr_pages);
   6.128 +	start_info.shared_info = SWAP(xen_start_info->shared_info);
   6.129 +	start_info.flags = SWAP(xen_start_info->flags);
   6.130 +	start_info.store_mfn = SWAP(xen_start_info->store_mfn);
   6.131 +	start_info.store_evtchn	= SWAP(xen_start_info->store_evtchn);
   6.132 +	start_info.console.domU.mfn = SWAP(xen_start_info->console.domU.mfn);
   6.133 +	start_info.console.domU.evtchn =
   6.134 +				SWAP(xen_start_info->console.domU.evtchn);
   6.135 +	start_info.pt_base = SWAP(xen_start_info->pt_base);
   6.136 +	start_info.nr_pt_frames	= SWAP(xen_start_info->nr_pt_frames);
   6.137 +	start_info.mfn_list = SWAP(xen_start_info->mfn_list);
   6.138 +	start_info.mod_start = SWAP(xen_start_info->mod_start);
   6.139 +	start_info.mod_len = SWAP(xen_start_info->mod_len);
   6.140 +}
   6.141 +
   6.142 +static void
   6.143 +init_boot_params(void)
   6.144 +{
   6.145 +	/* ia64_boot_paramP is initialised in ia64.S!  */
   6.146 +	ia64BootParamG.command_line = SWAP(ia64_boot_paramP->command_line);
   6.147 +	ia64BootParamG.efi_systab = SWAP(ia64_boot_paramP->efi_systab);
   6.148 +	ia64BootParamG.efi_memmap = SWAP(ia64_boot_paramP->efi_memmap);
   6.149 +	ia64BootParamG.efi_memmap_size =
   6.150 +				SWAP(ia64_boot_paramP->efi_memmap_size);
   6.151 +	ia64BootParamG.efi_memdesc_size	=
   6.152 +				SWAP(ia64_boot_paramP->efi_memdesc_size);
   6.153 +	ia64BootParamG.efi_memdesc_version =
   6.154 +				SWAP(ia64_boot_paramP->efi_memdesc_version);
   6.155 +	ia64BootParamG.console_info.num_cols =
   6.156 +				SWAP(ia64_boot_paramP->console_info.num_cols);
   6.157 +	ia64BootParamG.console_info.num_rows =
   6.158 +				SWAP(ia64_boot_paramP->console_info.num_rows);
   6.159 +	ia64BootParamG.console_info.orig_x =
   6.160 +				SWAP(ia64_boot_paramP->console_info.orig_x);
   6.161 +	ia64BootParamG.console_info.orig_y =
   6.162 +				SWAP(ia64_boot_paramP->console_info.orig_y);
   6.163 +	ia64BootParamG.fpswa = SWAP(ia64_boot_paramP->fpswa);
   6.164 +	ia64BootParamG.initrd_start = SWAP(ia64_boot_paramP->initrd_start);
   6.165 +	ia64BootParamG.initrd_size = SWAP(ia64_boot_paramP->initrd_size);
   6.166 +	ia64BootParamG.domain_start = SWAP(ia64_boot_paramP->domain_start);
   6.167 +	ia64BootParamG.domain_size = SWAP(ia64_boot_paramP->domain_size);
   6.168 +
   6.169 +	/*
   6.170 +	 * Copy and parse the boot command line.
   6.171 +	 * Currently only a check of bootverbose is done.
   6.172 +	 */
   6.173 +	memset(boot_cmd_line, 0, sizeof(boot_cmd_line));
   6.174 +	strncpy(boot_cmd_line,
   6.175 +		(char*)__va(ia64BootParamG.command_line), COMMAND_LINE_SIZE);
   6.176 +	boot_cmd_line[COMMAND_LINE_SIZE - 1] = '\0';
   6.177 +
   6.178 +	/* Look for bootverbose. */
   6.179 +	if (strstr(boot_cmd_line, "bootverbose"))
   6.180 +		bootverbose = 1;
   6.181 +}
   6.182 +
   6.183 +void
   6.184 +arch_init(start_info_t *si)
   6.185 +{
   6.186 +	efi_time_t tm;
   6.187 +	static int initialized;
   6.188 +
   6.189 +	if (initialized)
   6.190 +		return;
   6.191 +
   6.192 +	init_start_info(si);
   6.193 +
   6.194 +	init_boot_params();
   6.195 +
   6.196 +	init_efi();
   6.197 +
   6.198 +	map_pal_code();
   6.199 +
   6.200 +	ia64_sal_init(machineFwG.ia64_sal_tableP);
   6.201 +
   6.202 +	if (efi_get_time(&tm)) {
   6.203 +		printk("EFI-SystemTime: %d.%d.%d   %d:%d:%d",
   6.204 +		       tm.Day, tm.Month, tm.Year,
   6.205 +		       tm.Hour, tm.Minute, tm.Second);
   6.206 +
   6.207 +		if (tm.TimeZone == EFI_UNSPECIFIED_TIMEZONE)
   6.208 +			printk("   Timezone not specified!\n");
   6.209 +		else
   6.210 +			printk("   TimeZone: %d Daylight: 0x%x\n",
   6.211 +			       tm.TimeZone, tm.Daylight);
   6.212 +	} else 
   6.213 +		printk("efi_get_time() failed\n");
   6.214 +
   6.215 +	registerCallback();
   6.216 +	initialized = 1;
   6.217 +}
   6.218 +
   6.219 +void
   6.220 +arch_print_info(void)
   6.221 +{
   6.222 +	int major, minor;
   6.223 +
   6.224 +	minor = HYPERVISOR_xen_version(XENVER_version, 0);
   6.225 +	major = minor >> 16;
   6.226 +	minor &= ~0xffffffff;
   6.227 +	printk("Running on Xen version: %d.%d\n", major, minor);
   6.228 +	printk("machine addr of shared_info_t  : 0x%lx\n",
   6.229 +	       start_info.shared_info);
   6.230 +	printk("machine page number of shared page: 0x%lx\n",
   6.231 +	       start_info.store_mfn);
   6.232 +	printk("evtchn for store communication : %d\n",
   6.233 +	       start_info.store_evtchn);
   6.234 +	printk("MACHINE address of console page: 0x%lx\n",
   6.235 +	       start_info.console.domU.mfn);
   6.236 +	printk("evtchn for console messages    : %d\n",
   6.237 +	       start_info.console.domU.evtchn);
   6.238 +	printk("xen_guest_cmdline              : %s\n", boot_cmd_line);
   6.239 +}
     7.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     7.2 +++ b/extras/mini-os/arch/ia64/debug.c	Thu Feb 15 13:13:36 2007 -0700
     7.3 @@ -0,0 +1,179 @@
     7.4 +/* 
     7.5 + ****************************************************************************
     7.6 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com
     7.7 + *
     7.8 + * Description:	ia64 specific part of the mini-os
     7.9 + * 		Prints debug information on a crash of mini-os
    7.10 + *
    7.11 + * Parts are taken from FreeBSD.
    7.12 + *
    7.13 + ****************************************************************************
    7.14 + * Permission is hereby granted, free of charge, to any person obtaining a copy
    7.15 + * of this software and associated documentation files (the "Software"), to
    7.16 + * deal in the Software without restriction, including without limitation the
    7.17 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
    7.18 + * sell copies of the Software, and to permit persons to whom the Software is
    7.19 + * furnished to do so, subject to the following conditions:
    7.20 + * 
    7.21 + * The above copyright notice and this permission notice shall be included in
    7.22 + * all copies or substantial portions of the Software.
    7.23 + * 
    7.24 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
    7.25 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
    7.26 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
    7.27 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
    7.28 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
    7.29 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
    7.30 + * DEALINGS IN THE SOFTWARE.
    7.31 + */
    7.32 +
    7.33 +#include "os.h"
    7.34 +
    7.35 +static const char *ia64_vector_names[] = {
    7.36 +	"VHPT Translation",			/* 0 */
    7.37 +	"Instruction TLB",			/* 1 */
    7.38 +	"Data TLB",				/* 2 */
    7.39 +	"Alternate Instruction TLB",		/* 3 */
    7.40 +	"Alternate Data TLB",			/* 4 */
    7.41 +	"Data Nested TLB",			/* 5 */
    7.42 +	"Instruction Key Miss",			/* 6 */
    7.43 +	"Data Key Miss",			/* 7 */
    7.44 +	"Dirty-Bit",				/* 8 */
    7.45 +	"Instruction Access-Bit",		/* 9 */
    7.46 +	"Data Access-Bit",			/* 10 */
    7.47 +	"Break Instruction",			/* 11 */
    7.48 +	"External Interrupt",			/* 12 */
    7.49 +	"Reserved 13",				/* 13 */
    7.50 +	"Reserved 14",				/* 14 */
    7.51 +	"Reserved 15",				/* 15 */
    7.52 +	"Reserved 16",				/* 16 */
    7.53 +	"Reserved 17",				/* 17 */
    7.54 +	"Reserved 18",				/* 18 */
    7.55 +	"Reserved 19",				/* 19 */
    7.56 +	"Page Not Present",			/* 20 */
    7.57 +	"Key Permission",			/* 21 */
    7.58 +	"Instruction Access Rights",		/* 22 */
    7.59 +	"Data Access Rights",			/* 23 */
    7.60 +	"General Exception",			/* 24 */
    7.61 +	"Disabled FP-Register",			/* 25 */
    7.62 +	"NaT Consumption",			/* 26 */
    7.63 +	"Speculation",				/* 27 */
    7.64 +	"Reserved 28",				/* 28 */
    7.65 +	"Debug",				/* 29 */
    7.66 +	"Unaligned Reference",			/* 30 */
    7.67 +	"Unsupported Data Reference",		/* 31 */
    7.68 +	"Floating-point Fault",			/* 32 */
    7.69 +	"Floating-point Trap",			/* 33 */
    7.70 +	"Lower-Privilege Transfer Trap",	/* 34 */
    7.71 +	"Taken Branch Trap",			/* 35 */
    7.72 +	"Single Step Trap",			/* 36 */
    7.73 +	"Reserved 37",				/* 37 */
    7.74 +	"Reserved 38",				/* 38 */
    7.75 +	"Reserved 39",				/* 39 */
    7.76 +	"Reserved 40",				/* 40 */
    7.77 +	"Reserved 41",				/* 41 */
    7.78 +	"Reserved 42",				/* 42 */
    7.79 +	"Reserved 43",				/* 43 */
    7.80 +	"Reserved 44",				/* 44 */
    7.81 +	"IA-32 Exception",			/* 45 */
    7.82 +	"IA-32 Intercept",			/* 46 */
    7.83 +	"IA-32 Interrupt",			/* 47 */
    7.84 +	"Reserved 48",				/* 48 */
    7.85 +	"Reserved 49",				/* 49 */
    7.86 +	"Reserved 50",				/* 50 */
    7.87 +	"Reserved 51",				/* 51 */
    7.88 +	"Reserved 52",				/* 52 */
    7.89 +	"Reserved 53",				/* 53 */
    7.90 +	"Reserved 54",				/* 54 */
    7.91 +	"Reserved 55",				/* 55 */
    7.92 +	"Reserved 56",				/* 56 */
    7.93 +	"Reserved 57",				/* 57 */
    7.94 +	"Reserved 58",				/* 58 */
    7.95 +	"Reserved 59",				/* 59 */
    7.96 +	"Reserved 60",				/* 60 */
    7.97 +	"Reserved 61",				/* 61 */
    7.98 +	"Reserved 62",				/* 62 */
    7.99 +	"Reserved 63",				/* 63 */
   7.100 +	"Reserved 64",				/* 64 */
   7.101 +	"Reserved 65",				/* 65 */
   7.102 +	"Reserved 66",				/* 66 */
   7.103 +	"Reserved 67",				/* 67 */
   7.104 +};
   7.105 +
   7.106 +typedef struct
   7.107 +{
   7.108 +#if !defined(BIG_ENDIAN)
   7.109 +	uint64_t sof	:7;	/* 0-6 size of frame */
   7.110 +	uint64_t sol	:7;	/* 7-13 size of locals (in + loc) */
   7.111 +	uint64_t sor	:4;
   7.112 +	uint64_t rrb_gr	:7;
   7.113 +	uint64_t rrb_fr	:7;
   7.114 +	uint64_t rrb_pr	:6;
   7.115 +	uint64_t res	:25;	/* reserved */
   7.116 +	uint64_t v	:1;	/* The v bit */
   7.117 +#else /* !BIG_ENDIAN */
   7.118 +	uint64_t v	:1;	/* The v bit */
   7.119 +	uint64_t res	:25;	/* reserved */
   7.120 +	uint64_t rrb_pr	:6;
   7.121 +	uint64_t rrb_fr	:7;
   7.122 +	uint64_t rrb_gr	:7;
   7.123 +	uint64_t sor	:4;
   7.124 +	uint64_t sol	:7;	/* 7-13 size of locals (in + loc) */
   7.125 +	uint64_t sof	:7;	/* 0-6 size of frame */
   7.126 +#endif /* BIG_ENDIAN */
   7.127 +} ifs_t;
   7.128 +
   7.129 +void
   7.130 +do_trap_error(trap_frame_t* tf)
   7.131 +{
   7.132 +	ifs_t curIfs;
   7.133 +
   7.134 +	printk("TRAP in mini-os:\n");
   7.135 +	printk("  trap: %d (%s)\n", tf->trap_num,
   7.136 +	       ia64_vector_names[tf->trap_num]);
   7.137 +	printk("  iip : 0x%.16lx  ifa: 0x%.16lx\n", tf->iip, tf->ifa);
   7.138 +	printk("  ipsr: 0x%.16lx  ifs: 0x%.16lx\n", tf->ipsr, tf->ifs);
   7.139 +	printk("  isr : 0x%.16lx\n", tf->isr);
   7.140 +	printk("  gp  : 0x%.16lx  sp : 0x%.16lx\n", tf->gp, tf->sp);
   7.141 +	printk("  rp  : 0x%.16lx  tp : 0x%.16lx\n", tf->b0, tf->tp);
   7.142 +	printk("  b6  : 0x%.16lx  b7 : 0x%.16lx\n", tf->b6, tf->b7);
   7.143 +	printk("  r8  : 0x%.16lx\n", tf->r8);
   7.144 +	printk("  bsp : 0x%.16lx  rsc: 0x%.16lx\n", tf->bsp, tf->rsc);
   7.145 +	printk("  r14 : 0x%.16lx  r15: 0x%.16lx\n", tf->r14, tf->r15);
   7.146 +	printk("  r16 : 0x%.16lx  r17: 0x%.16lx\n", tf->r16, tf->r17);
   7.147 +	printk("  r18 : 0x%.16lx  r19: 0x%.16lx\n", tf->r18, tf->r19);
   7.148 +	printk("  r20 : 0x%.16lx  r21: 0x%.16lx\n", tf->r20, tf->r21);
   7.149 +	printk("  r22 : 0x%.16lx  r23: 0x%.16lx\n", tf->r22, tf->r23);
   7.150 +	printk("  r24 : 0x%.16lx  r25: 0x%.16lx\n", tf->r24, tf->r25);
   7.151 +	printk("  r26 : 0x%.16lx  r27: 0x%.16lx\n", tf->r26, tf->r27);
   7.152 +	printk("  r28 : 0x%.16lx  r29: 0x%.16lx\n", tf->r28, tf->r29);
   7.153 +	printk("  r30 : 0x%.16lx  r31: 0x%.16lx\n", tf->r30, tf->r31);
   7.154 +
   7.155 +	__asm __volatile("flushrs;;");
   7.156 +	curIfs = *((ifs_t*)((void*)(&tf->ifs)));
   7.157 +	if (!curIfs.v)
   7.158 +		printk(" ifs.v = 0");
   7.159 +	else {
   7.160 +		uint64_t* regP;
   7.161 +		uint32_t  i;
   7.162 +
   7.163 +		printk("  cfm.sof: %d  cfm.sol: %d\n", curIfs.sof, curIfs.sol);
   7.164 +		regP = (uint64_t *)(tf->bsp + tf->ndirty);
   7.165 +		for (i = curIfs.sof; i != 0; ) {
   7.166 +			if (i <= (((uint64_t)regP & 0x000001f8) >> 3)) {
   7.167 +				regP -= i;
   7.168 +				i = 0;
   7.169 +				break;
   7.170 +			}
   7.171 +			i -= ((uint64_t)regP & 0x000001f8) >> 3;
   7.172 +			regP = (uint64_t *)((uint64_t)regP & ~0x000001ff) - 1;
   7.173 +		}
   7.174 +		for (i = 0; i < curIfs.sof; i++) {
   7.175 +			if (((uint64_t)regP & 0x000001f8) == 0x000001f8)
   7.176 +				regP++;
   7.177 +			printk("  r%d: 0x%lx\n",  i+32, *regP);
   7.178 +			regP++;
   7.179 +		}
   7.180 +	}
   7.181 +	HYPERVISOR_shutdown(SHUTDOWN_poweroff);
   7.182 +}
     8.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     8.2 +++ b/extras/mini-os/arch/ia64/efi.c	Thu Feb 15 13:13:36 2007 -0700
     8.3 @@ -0,0 +1,237 @@
     8.4 +/*
     8.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
     8.6 + * The code is partly taken from FreeBSD.
     8.7 + *
     8.8 + ***************************************************************************
     8.9 + *
    8.10 + * Redistribution and use in source and binary forms, with or without
    8.11 + * modification, are permitted provided that the following conditions
    8.12 + * are met:
    8.13 + * 1. Redistributions of source code must retain the above copyright
    8.14 + *    notice, this list of conditions and the following disclaimer.
    8.15 + * 2. Redistributions in binary form must reproduce the above copyright
    8.16 + *    notice, this list of conditions and the following disclaimer in the
    8.17 + *    documentation and/or other materials provided with the distribution.
    8.18 + *
    8.19 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
    8.20 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    8.21 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
    8.22 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
    8.23 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    8.24 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
    8.25 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    8.26 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    8.27 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    8.28 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    8.29 + * SUCH DAMAGE.
    8.30 + *
    8.31 + */
    8.32 +
    8.33 +
    8.34 +#include "os.h"
    8.35 +#include "efi.h"
    8.36 +#include "page.h"
    8.37 +#include "lib.h"
    8.38 +#include "console.h"
    8.39 +
    8.40 +
    8.41 +/* The implementation is in fw.S. */
    8.42 +extern uint64_t
    8.43 +ia64_call_efi_func(uint64_t funcP,uint64_t a,uint64_t b,uint64_t c,uint64_t d);
    8.44 +
    8.45 +int
    8.46 +efi_get_time(efi_time_t* tmP)
    8.47 +{
    8.48 +	memset(tmP, 0, sizeof(efi_time_t));
    8.49 +	if (ia64_call_efi_func((uint64_t)machineFwG.efi.getTimeF,
    8.50 +			       (uint64_t)tmP,
    8.51 +			       (uint64_t)NULL, 0, 0) != EFI_SUCCESS) {
    8.52 +		printk("efi.getTime() failed\n");
    8.53 +		return 0;
    8.54 +	}
    8.55 +
    8.56 +#if defined(BIG_ENDIAN)
    8.57 +	tmP->Year = SWAP(tmP->Year);
    8.58 +	tmP->TimeZone = SWAP(tmP->TimeZone);
    8.59 +	tmP->Nanosecond = SWAP(tmP->Nanosecond);
    8.60 +#endif
    8.61 +
    8.62 +	return 1;
    8.63 +}
    8.64 +
    8.65 +/*
    8.66 + * The function compares two efi_guid_t and returns 0 on equality, otherwise 1.
    8.67 + */
    8.68 +static int
    8.69 +efi_guid_cmp(efi_guid_t* a_le, efi_guid_t* b)
    8.70 +{
    8.71 +#if defined(BIG_ENDIAN)
    8.72 +	if(SWAP(a_le->Data1) != b->Data1)
    8.73 +		return 1;
    8.74 +	if(SWAP(a_le->Data2) != b->Data2)
    8.75 +		return 1;
    8.76 +	if(SWAP(a_le->Data3) != b->Data3)
    8.77 +		return 1;
    8.78 +	return memcmp(a_le->Data4, b->Data4, sizeof(uint8_t)*8);
    8.79 +#else
    8.80 +	return memcmp(a_le, b, sizeof(efi_guid_t));
    8.81 +#endif
    8.82 +}
    8.83 +
    8.84 +void
    8.85 +init_efi(void)
    8.86 +{
    8.87 +	efi_system_table_t* efiSysTableP;
    8.88 +	int mdcnt, i, numConvMem;
    8.89 +	efi_memory_descriptor_t *memdP, *mdP;
    8.90 +	efi_status_t status;
    8.91 +	char fwVendor[100] = "unknown";
    8.92 +	efi_char16_t* fwP;
    8.93 +	efi_runtime_services_t* rsP;
    8.94 +
    8.95 +	efi_configuration_table_t* confP = (efi_configuration_table_t*)0;
    8.96 +	efi_guid_t sal = SAL_SYSTEM_TABLE_GUID;
    8.97 +	efi_guid_t acpi = ACPI_TABLE_GUID;
    8.98 +	efi_guid_t acpi20 = ACPI_20_TABLE_GUID;
    8.99 +	
   8.100 +	memset(&machineFwG, 0, sizeof(machineFwG));
   8.101 +	/* Read the efi_system_table.  */
   8.102 +	efiSysTableP = (efi_system_table_t*)__va(ia64BootParamG.efi_systab);
   8.103 +	machineFwG.efi.efiSysTableP = efiSysTableP;
   8.104 +	PRINT_BV("EfiSystemTable at: %p\n", efiSysTableP);
   8.105 +	fwP = (uint16_t*) __va(SWAP(efiSysTableP->FirmwareVendor));
   8.106 +	if (fwP) {
   8.107 +		for (i = 0; i < (int)sizeof(fwVendor) - 1 && *fwP; ++i)
   8.108 +			fwVendor[i] = SWAP(*fwP++);
   8.109 +		fwVendor[i] = '\0';
   8.110 +	}
   8.111 +	PRINT_BV("  EFI-FirmwareVendor        : %s\n", fwVendor);
   8.112 +	PRINT_BV("  EFI-FirmwareRevision      : %d\n",
   8.113 +		 SWAP(efiSysTableP->FirmwareRevision));
   8.114 +	PRINT_BV("  EFI-SystemTable-Revision  : %d.%d\n",
   8.115 +		 SWAP(efiSysTableP->Hdr.Revision)>>16,
   8.116 +		 SWAP(efiSysTableP->Hdr.Revision)&0xffff);
   8.117 +	rsP = (efi_runtime_services_t*)
   8.118 +		__va(SWAP(efiSysTableP->RuntimeServices));
   8.119 +	mdcnt = ia64BootParamG.efi_memmap_size /
   8.120 +		ia64BootParamG.efi_memdesc_size;
   8.121 +	memdP = (efi_memory_descriptor_t*) __va(ia64BootParamG.efi_memmap);
   8.122 +
   8.123 +	PRINT_BV("EFI-Memorydescriptors: %d\n", mdcnt);
   8.124 +
   8.125 +	for (i = numConvMem = 0, mdP = memdP; i < mdcnt; i++,
   8.126 +	     mdP = NextMemoryDescriptor(mdP, ia64BootParamG.efi_memdesc_size)) {
   8.127 +		/* Relocate runtime memory segments for firmware. */
   8.128 +		PRINT_BV("  %d. Type: %x  Attributes: 0x%lx\n",
   8.129 +			 i, SWAP(mdP->Type), SWAP(mdP->Attribute));
   8.130 +		PRINT_BV("     PhysStart: 0x%lx  NumPages: 0x%lx\n",
   8.131 +			 SWAP(mdP->PhysicalStart), SWAP(mdP->NumberOfPages));
   8.132 +		switch (SWAP(mdP->Type)) {
   8.133 +			case EfiRuntimeServicesData:
   8.134 +				PRINT_BV("     -> EfiRuntimeServicesData\n");
   8.135 +				break;
   8.136 +			case EfiACPIReclaimMemory:
   8.137 +				PRINT_BV("     -> EfiACPIReclaimMemory\n");
   8.138 +				break;
   8.139 +			case EfiACPIMemoryNVS:
   8.140 +				PRINT_BV("     -> EfiACPIMemoryNVS\n");
   8.141 +				break;
   8.142 +			case EfiConventionalMemory:
   8.143 +				PRINT_BV("     -> EfiConventionalMemory\n");
   8.144 +				PRINT_BV("        start: 0x%lx end: 0x%lx\n",
   8.145 +					SWAP(mdP->PhysicalStart),
   8.146 +					SWAP(mdP->PhysicalStart)+
   8.147 +					SWAP(mdP->NumberOfPages)*EFI_PAGE_SIZE);
   8.148 +				if (numConvMem) {
   8.149 +					printk("     Currently only one efi "
   8.150 +						"memory chunk supported !!!\n");
   8.151 +					break;
   8.152 +				}
   8.153 +				machineFwG.mach_mem_start =
   8.154 +					SWAP(mdP->PhysicalStart);
   8.155 +				machineFwG.mach_mem_size =
   8.156 +					SWAP(mdP->NumberOfPages)*EFI_PAGE_SIZE;
   8.157 +				numConvMem++;
   8.158 +				break;
   8.159 +			case EfiMemoryMappedIOPortSpace:
   8.160 +				PRINT_BV("     -> EfiMemMappedIOPortSpace\n");
   8.161 +				break;
   8.162 +			case EfiPalCode:
   8.163 +                       		machineFwG.ia64_pal_base =
   8.164 +					__va(SWAP(mdP->PhysicalStart));
   8.165 +				PRINT_BV("     -> EfiPalCode\n"
   8.166 +					 "        start : %p\n",
   8.167 +					 machineFwG.ia64_pal_base);
   8.168 +				break;
   8.169 +		}
   8.170 +		/* I have to setup the VirtualStart address of every
   8.171 +		 * RUNTIME-area in preparing the later call of
   8.172 +		 * SetVirtualAddressMap() therewidth the efi stuff uses
   8.173 +		 * virtual addressing and the efi runtime functions
   8.174 +		 * may be called directly.
   8.175 +		 */
   8.176 +		if (SWAP(mdP->Attribute) & EFI_MEMORY_RUNTIME) {
   8.177 +			if (SWAP(mdP->Attribute) & EFI_MEMORY_WB)
   8.178 +				mdP->VirtualStart =
   8.179 +					SWAP(__va(mdP->PhysicalStart));
   8.180 +			else {
   8.181 +				if (SWAP(mdP->Attribute) & EFI_MEMORY_UC)
   8.182 +					printk("efi_init: RuntimeMemory with "
   8.183 +						"UC attribute !!!!!!\n");
   8.184 +					/*
   8.185 +					mdP->VirtualStart =
   8.186 +					IA64_PHYS_TO_RR6(mdP->PhysicalStart);
   8.187 +					*/
   8.188 +			}
   8.189 +		}
   8.190 +	}
   8.191 +	/* Now switch efi runtime stuff to virtual addressing. */
   8.192 +	status = ia64_call_efi_physical(
   8.193 +			(void*)__va(SWAP((uint64_t)rsP->SetVirtualAddressMap)),
   8.194 +			ia64BootParamG.efi_memmap_size,
   8.195 +			ia64BootParamG.efi_memdesc_size,
   8.196 +			ia64BootParamG.efi_memdesc_version,
   8.197 +			ia64BootParamG.efi_memmap);
   8.198 +	status = EFI_SUCCESS;
   8.199 +	if (status != EFI_SUCCESS) {
   8.200 +		printk("warning: unable to switch EFI into virtual "
   8.201 +		       "(status=%lu)\n", status);
   8.202 +		return;
   8.203 +	}
   8.204 +	/* Getting efi function pointer for getEfiTime. */
   8.205 +	machineFwG.efi.getTimeF =
   8.206 +		(efi_get_time_t)__va(SWAP((uint64_t)rsP->GetTime));
   8.207 +	/* Getting efi function pointer for resetSystem. */
   8.208 +	machineFwG.efi.resetSystemF =
   8.209 +		(efi_reset_system_t)__va(SWAP((uint64_t)rsP->ResetSystem));
   8.210 +
   8.211 +	/* Scanning the Configuration table of the EfiSystemTable. */
   8.212 +	PRINT_BV("NumberOfConfigTableEntries: %ld\n",
   8.213 +		 SWAP(efiSysTableP->NumberOfTableEntries));
   8.214 +
   8.215 +	confP = (efi_configuration_table_t*)
   8.216 +			__va(SWAP(efiSysTableP->ConfigurationTable));
   8.217 +	for (i = 0; i < SWAP(efiSysTableP->NumberOfTableEntries); i++) {
   8.218 +		if (!efi_guid_cmp(&confP[i].VendorGuid, &sal)) {
   8.219 +			machineFwG.ia64_sal_tableP = (sal_system_table_t*)
   8.220 +				__va(SWAP((uint64_t) confP[i].VendorTable));
   8.221 +			PRINT_BV("  Found SalSystemTable at: 0x%lx\n",
   8.222 +				 (uint64_t) machineFwG.ia64_sal_tableP);
   8.223 +			continue;
   8.224 +		}
   8.225 +		if (!efi_guid_cmp(&confP[i].VendorGuid, &acpi)) {
   8.226 +			machineFwG.ia64_efi_acpi_table =
   8.227 +				__va(SWAP((uint64_t) confP[i].VendorTable));
   8.228 +			PRINT_BV("  Found AcpiTable at:      0x%lx\n",
   8.229 +				 (uint64_t) machineFwG.ia64_efi_acpi_table);
   8.230 +			continue;
   8.231 +		}
   8.232 +		if (!efi_guid_cmp(&confP[i].VendorGuid, &acpi20)) {
   8.233 +			machineFwG.ia64_efi_acpi20_table =
   8.234 +				__va(SWAP((uint64_t) confP[i].VendorTable));
   8.235 +			PRINT_BV("  Found Acpi20Table at:    0x%lx\n",
   8.236 +				 (uint64_t) machineFwG.ia64_efi_acpi20_table);
   8.237 +			continue;
   8.238 +		}
   8.239 +	}
   8.240 +}
     9.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
     9.2 +++ b/extras/mini-os/arch/ia64/fw.S	Thu Feb 15 13:13:36 2007 -0700
     9.3 @@ -0,0 +1,519 @@
     9.4 +/*
     9.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
     9.6 + * Parts taken from FreeBSD.
     9.7 + *
     9.8 + ***************************************************************************
     9.9 + *
    9.10 + * Redistribution and use in source and binary forms, with or without
    9.11 + * modification, are permitted provided that the following conditions
    9.12 + * are met:
    9.13 + * 1. Redistributions of source code must retain the above copyright
    9.14 + *    notice, this list of conditions and the following disclaimer.
    9.15 + * 2. Redistributions in binary form must reproduce the above copyright
    9.16 + *    notice, this list of conditions and the following disclaimer in the
    9.17 + *    documentation and/or other materials provided with the distribution.
    9.18 + *
    9.19 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
    9.20 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    9.21 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
    9.22 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
    9.23 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
    9.24 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
    9.25 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
    9.26 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
    9.27 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    9.28 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    9.29 + * SUCH DAMAGE.
    9.30 + *
    9.31 + */
    9.32 +
    9.33 +
    9.34 +#include "asm.h"
    9.35 +#include "page.h"
    9.36 +#include "ia64_cpu.h"
    9.37 +#include "ia64_fpu.h"
    9.38 +#include "offsets.h"
    9.39 +
    9.40 +
    9.41 +/*
    9.42 + * ia64_change_mode:	change mode to/from physical mode
    9.43 + *
    9.44 + * Arguments:
    9.45 + *	r14	psr for desired mode
    9.46 + *
    9.47 + * Modifies:
    9.48 + *	r15-r20	scratch
    9.49 + *	ar.bsp	translated to new mode
    9.50 + *	sp	translated to new mode
    9.51 + *	iip	translated to new mode
    9.52 + */
    9.53 +ENTRY(ia64_change_mode)
    9.54 +	rsm	psr.i | psr.ic
    9.55 +	mov	r19=ar.rsc		// save rsc while we change mode
    9.56 +	tbit.nz	p8,p9=r14,17		// Uses psr.dt-physical or virtual ?
    9.57 +			// p8 == true: switch to virtual
    9.58 +			// p9 == true: switch to physical
    9.59 +	;;
    9.60 +	mov	ar.rsc=IA64_RSE_LAZY	// turn off RSE
    9.61 +	mov	r16=rp
    9.62 +	;;
    9.63 +	flushrs				// clean the rse
    9.64 +	srlz.i
    9.65 +	;;
    9.66 +1:	mov	r15=ip
    9.67 +	mov	r17=ar.bsp
    9.68 +	mov	r18=ar.rnat
    9.69 +	;;
    9.70 +	add	r15=2f-1b,r15		// address to rfi to
    9.71 +		/* !!! must be the same like in  minios-ia64.lds */
    9.72 +(p8)	movl	r20=(KERNEL_START - (1<<KERNEL_PHYS_START_SHIFT))
    9.73 +	;;
    9.74 +			// (p8): switch to virtual
    9.75 +			// (p9): switch to physical
    9.76 +
    9.77 +		// from virtual to physical
    9.78 +(p9)	tpa	r15=r15			// ip
    9.79 +(p9)	tpa	r16=r16			// rp
    9.80 +(p9)	tpa	r17=r17			// ar.bsp
    9.81 +(p9)	tpa	sp=sp			// sp
    9.82 +	;;		/* Needed only for assembler violate ... warnings. */
    9.83 +		// from physical to virtual
    9.84 +(p8)	add	r15=r20,r15		// ip
    9.85 +(p8)	add	r16=r20,r16		// rp
    9.86 +(p8)	add	r17=r20,r17		// ar.bsp
    9.87 +(p8)	add	sp=r20,sp		// sp
    9.88 +	;;
    9.89 +	mov	ar.bspstore=r17
    9.90 +	mov	rp=r16
    9.91 +	;;
    9.92 +	mov	ar.rnat=r18
    9.93 +	mov	cr.iip=r15
    9.94 +	mov	cr.ipsr=r14		// psr for new mode
    9.95 +	mov	cr.ifs=r0
    9.96 +	;;
    9.97 +	rfi
    9.98 +	;;
    9.99 +2:	mov	ar.rsc=r19		// restore ar.rsc
   9.100 +	;;
   9.101 +	br.ret.sptk.few rp		// now in new mode
   9.102 +END(ia64_change_mode)
   9.103 +
   9.104 +/*
   9.105 + * ia64_physical_mode:  change mode to physical mode
   9.106 + *
   9.107 + * Return:
   9.108 + *  ret0  psr to restore
   9.109 + *
   9.110 + * Modifies:
   9.111 + *  r15-r18 scratch
   9.112 + *  ar.bsp  tranlated to physical mode
   9.113 + *  psr.i cleared
   9.114 + */
   9.115 +ENTRY(ia64_physical_mode)
   9.116 +	mov	r14=psr
   9.117 +	movl	r15=(IA64_PSR_I|IA64_PSR_IT|IA64_PSR_DT|	\
   9.118 +			IA64_PSR_RT|IA64_PSR_DFL|IA64_PSR_DFH)
   9.119 +	;;
   9.120 +	mov	ret0=r14
   9.121 +	movl	r16=IA64_PSR_BN
   9.122 +	;;
   9.123 +	andcm	r14=r14,r15	// clear various xT bits
   9.124 +	;;
   9.125 +	or	r14=r14,r16	// make sure BN=1
   9.126 +	or	ret0=ret0,r16	// make sure BN=1
   9.127 +	;;
   9.128 +	br.cond.sptk.many ia64_change_mode
   9.129 +END(ia64_physical_mode)
   9.130 +
   9.131 +/*
   9.132 + * ia64_call_efi_physical:	call an EFI procedure in physical mode
   9.133 + *
   9.134 + * Arguments:
   9.135 + *	in0		Address of EFI procedure descriptor
   9.136 + *	in1-in5		Arguments to EFI procedure
   9.137 + *
   9.138 + * Return:
   9.139 + *	ret0-ret3	return values from EFI
   9.140 + *
   9.141 + */
   9.142 +ENTRY(ia64_call_efi_physical)
   9.143 +	.prologue
   9.144 +	.regstk	6,4,5,0
   9.145 +	.save	ar.pfs,loc0
   9.146 +	alloc	loc0=ar.pfs,6,4,5,0
   9.147 +	;;
   9.148 +	.save	rp,loc1
   9.149 +	mov	loc1=rp
   9.150 +	;;
   9.151 +	.body
   9.152 +	br.call.sptk.many rp=ia64_physical_mode
   9.153 +	;;
   9.154 +
   9.155 +	mov	loc2=r8			// psr to restore mode
   9.156 +	mov	loc3=gp			// save kernel gp
   9.157 +	ld8	r14=[in0],8		// function address
   9.158 +	;;
   9.159 +	ld8	gp=[in0]		// function gp value
   9.160 +#if defined(BIG_ENDIAN)
   9.161 +	mux1	r14=r14,@rev		// swap because mini-os is in BE
   9.162 +	mov	ar.rsc=3
   9.163 +	;;
   9.164 +#endif
   9.165 +	mov	out0=in1
   9.166 +	mov	out1=in2
   9.167 +	mov	out2=in3
   9.168 +	mov	out3=in4
   9.169 +	mov	out4=in5
   9.170 +	mov	b6=r14
   9.171 +	;;
   9.172 +#if defined(BIG_ENDIAN)
   9.173 +	mux1	gp=gp,@rev		// swap because mini-os is in BE
   9.174 +	rum IA64_PSR_BE
   9.175 +	;;
   9.176 +#endif
   9.177 +
   9.178 +	br.call.sptk.many rp=b6		// call EFI procedure
   9.179 +
   9.180 +#if defined(BIG_ENDIAN)
   9.181 +	;;
   9.182 +	sum IA64_PSR_BE
   9.183 +	mov	ar.rsc=IA64_RSE_EAGER
   9.184 +#endif
   9.185 +	mov	gp=loc3			// restore kernel gp
   9.186 +	mov	r14=loc2		// psr to restore mode
   9.187 +	;;
   9.188 +	br.call.sptk.many rp=ia64_change_mode
   9.189 +	;;
   9.190 +	mov	rp=loc1
   9.191 +	mov	ar.pfs=loc0
   9.192 +	;;
   9.193 +	br.ret.sptk.many rp
   9.194 +END(ia64_call_efi_physical)
   9.195 +	
   9.196 +
   9.197 +/*
   9.198 + * struct ia64_pal_result ia64_call_pal_static(uint64_t proc,
   9.199 + *	uint64_t arg1, uint64_t arg2, uint64_t arg3)
   9.200 + */
   9.201 +ENTRY(ia64_call_pal_static)
   9.202 +	
   9.203 +	.regstk	4,5,0,0
   9.204 +palret	=	loc0
   9.205 +entry	=	loc1
   9.206 +rpsave	=	loc2
   9.207 +pfssave =	loc3
   9.208 +psrsave	=	loc4
   9.209 +
   9.210 +	alloc	pfssave=ar.pfs,4,5,0,0
   9.211 +	;; 
   9.212 +	mov	rpsave=rp
   9.213 +
   9.214 +	movl	entry=@gprel(ia64_pal_entry)
   9.215 +1:	mov	palret=ip		// for return address
   9.216 +	;;
   9.217 +	add	entry=entry,gp
   9.218 +	mov	psrsave=psr
   9.219 +	mov	r28=in0			// procedure number
   9.220 +	;;
   9.221 +	ld8	entry=[entry]		// read entry point
   9.222 +	mov	r29=in1			// copy arguments
   9.223 +	mov	r30=in2
   9.224 +	mov	r31=in3
   9.225 +	;;
   9.226 +	mov	b6=entry
   9.227 +	add	palret=2f-1b,palret	// calculate return address
   9.228 +	;;
   9.229 +	mov	b0=palret
   9.230 +	rsm	psr.i			// disable interrupts
   9.231 +	;;
   9.232 +#if defined(BIG_ENDIAN)
   9.233 +	rum	IA64_PSR_BE		// set psr.be==0
   9.234 +	;;
   9.235 +#endif
   9.236 +	br.cond.sptk b6			// call into firmware
   9.237 +	;;
   9.238 +#if defined(BIG_ENDIAN)
   9.239 +	sum	IA64_PSR_BE		// set psr.be==1
   9.240 +	;;
   9.241 +#endif
   9.242 +	ssm	psr.i			// enable interrupts
   9.243 +	;;
   9.244 +2:	mov	psr.l=psrsave
   9.245 +	mov	rp=rpsave
   9.246 +	mov	ar.pfs=pfssave
   9.247 +	;;
   9.248 +	srlz.d
   9.249 +	br.ret.sptk rp
   9.250 +
   9.251 +END(ia64_call_pal_static)
   9.252 +
   9.253 +/*
   9.254 + * Call a efi function.
   9.255 + * in0: func descriptor
   9.256 + * in1: param1
   9.257 + * ...
   9.258 + * in5: param5
   9.259 + */
   9.260 +ENTRY(ia64_call_efi_func)
   9.261 +	alloc	loc0=ar.pfs,6,3,5,0
   9.262 +
   9.263 +	mov	loc1=gp
   9.264 +	mov	loc2=rp
   9.265 +
   9.266 +	mov	out0=in1
   9.267 +	mov	out1=in2
   9.268 +	mov	out2=in3
   9.269 +	mov	out3=in4
   9.270 +	mov	out4=in5
   9.271 +
   9.272 +	ld8	r14=[in0],8		// get function address
   9.273 +	;;
   9.274 +	ld8	gp=[in0]		// function gp value
   9.275 +	;;
   9.276 +#if defined(BIG_ENDIAN)
   9.277 +	mux1	r14=r14,@rev		// swap if mini-os is in BE
   9.278 +	mux1	gp=gp,@rev		// swap if mini-os is in BE
   9.279 +#endif
   9.280 +	;;
   9.281 +	mov	b6=r14
   9.282 +
   9.283 +#if defined(BIG_ENDIAN)
   9.284 +	rum	IA64_PSR_BE
   9.285 +	;;
   9.286 +#endif
   9.287 +
   9.288 +	br.call.sptk.many rp=b6		// call EFI procedure
   9.289 +	
   9.290 +#if defined(BIG_ENDIAN)
   9.291 +	sum	IA64_PSR_BE
   9.292 +	;;
   9.293 +#endif
   9.294 +	
   9.295 +	mov	ar.pfs=loc0
   9.296 +	mov	gp=loc1
   9.297 +	mov	rp=loc2
   9.298 +	br.ret.sptk rp
   9.299 +
   9.300 +END(ia64_call_efi_func)
   9.301 +
   9.302 +
   9.303 +/* Restore the context from the thread context.
   9.304 + */
   9.305 +ENTRY(restore_context)
   9.306 +{	.mmi
   9.307 +	invala
   9.308 +	mov	ar.rsc=IA64_RSE_LAZY
   9.309 +	add	r29=SW_SP,in0
   9.310 +}
   9.311 +	add	r30=SW_RP,in0
   9.312 +	add	r31=SW_PR,in0
   9.313 +	;;
   9.314 +	ld8	r12=[r29],SW_LC-SW_SP		// load sp
   9.315 +	ld8	r16=[r30],SW_BSP-SW_RP		// load rp
   9.316 +	;;
   9.317 +	ld8	r17=[r31],SW_RNAT-SW_PR		// load pr
   9.318 +	ld8	r18=[r30],SW_PFS-SW_BSP		// load bsp
   9.319 +	mov	rp=r16
   9.320 +	;;
   9.321 +	ld8	r16=[r31],SW_R4-SW_RNAT		// load rnat
   9.322 +	mov	pr=r17,-1			// set pr
   9.323 +	mov	ar.bspstore=r18
   9.324 +	;;
   9.325 +	ld8	r18=[r30],SW_UNATA-SW_PFS	// load pfs
   9.326 +	ld8	r17=[r29],SW_UNATB-SW_LC	// load lc
   9.327 +	mov	ar.rnat=r16
   9.328 +	;;
   9.329 +	ld8	r16=[r30],SW_R5-SW_UNATA	// load unat_a
   9.330 +	mov	ar.pfs=r18
   9.331 +	mov	ar.lc=r17
   9.332 +	;;
   9.333 +	ld8.fill r4=[r31],SW_R6-SW_R4		// load r4
   9.334 +	mov	ar.unat=r16
   9.335 +	;;
   9.336 +	ld8.fill r5=[r30],SW_R7-SW_R5		// load r5
   9.337 +	ld8	r16=[r29],SW_B3-SW_UNATB	// load unat_b
   9.338 +	mov	ar.rsc=IA64_RSE_EAGER
   9.339 +	;;
   9.340 +	ld8.fill r6=[r31],SW_B1-SW_R6		// load r6
   9.341 +	ld8.fill r7=[r30],SW_B2-SW_R7		// load r7
   9.342 +	;;
   9.343 +	ld8	r17=[r31],SW_B4-SW_B1		// load b1
   9.344 +	ld8	r18=[r30],SW_B5-SW_B2		// load b2
   9.345 +	mov	ar.unat=r16			// unat_b
   9.346 +	;;
   9.347 +	ld8	r16=[r29],SW_F2-SW_B3		// load b3
   9.348 +	mov	b1=r17
   9.349 +	mov	b2=r18
   9.350 +	;;
   9.351 +	ld8	r17=[r31],SW_F3-SW_B4		// load b4
   9.352 +	ld8	r18=[r30],SW_F4-SW_B5		// load b5
   9.353 +	mov	b3=r16
   9.354 +	;;
   9.355 +	ldf.fill f2=[r29]			// load f2
   9.356 +	mov	b4=r17
   9.357 +	mov	b5=r18
   9.358 +	;;
   9.359 +	ldf.fill f3=[r31],SW_F5-SW_F3		// load f3
   9.360 +	ldf.fill f4=[r30],SW_F4-SW_F2		// load f4
   9.361 +	;;
   9.362 +	ldf.fill f5=[r31],SW_F5-SW_F3		// load f5
   9.363 +	ldf.fill f16=[r30],SW_F4-SW_F2		// load f16
   9.364 +	;;
   9.365 +	ldf.fill f17=[r31],SW_F5-SW_F3		// load f17
   9.366 +	ldf.fill f18=[r30],SW_F4-SW_F2		// load f18
   9.367 +	;;
   9.368 +	ldf.fill f19=[r31],SW_F5-SW_F3		// load f19
   9.369 +	ldf.fill f20=[r30],SW_F4-SW_F2		// load f20
   9.370 +	;;
   9.371 +	ldf.fill f21=[r31],SW_F5-SW_F3		// load f21
   9.372 +	ldf.fill f22=[r30],SW_F4-SW_F2		// load f22
   9.373 +	;;
   9.374 +	ldf.fill f23=[r31],SW_F5-SW_F3		// load f23
   9.375 +	ldf.fill f24=[r30],SW_F4-SW_F2		// load f24
   9.376 +	;;
   9.377 +	ldf.fill f25=[r31],SW_F5-SW_F3		// load f25
   9.378 +	ldf.fill f26=[r30],SW_F4-SW_F2		// load f26
   9.379 +	;;
   9.380 +	ldf.fill f27=[r31],SW_F5-SW_F3		// load f27
   9.381 +	ldf.fill f28=[r30],SW_F4-SW_F2		// load f28
   9.382 +	;;
   9.383 +	ldf.fill f29=[r31],SW_F5-SW_F3		// load f29
   9.384 +	ldf.fill f30=[r30],SW_F4-SW_F2		// load f30
   9.385 +	;;
   9.386 +	ldf.fill f31=[r30],SW_F4-SW_F2		// load f31
   9.387 +	add		r8=1,r0
   9.388 +	br.ret.sptk	rp
   9.389 +	;;
   9.390 +END(restore_context)
   9.391 +
   9.392 +/*
   9.393 + * void switch_context(struct thread* old, struct thread* new)
   9.394 + */
   9.395 +ENTRY(switch_context)
   9.396 +
   9.397 +	mov	ar.rsc=IA64_RSE_LAZY
   9.398 +	mov	r16=ar.unat
   9.399 +	add	r31=SW_UNATB,in0
   9.400 +	add	r30=SW_SP,in0
   9.401 +	;;
   9.402 +{	.mmi
   9.403 +	flushrs
   9.404 +	st8	[r30]=sp,SW_RP-SW_SP		// sp
   9.405 +	mov	r17=rp
   9.406 +	;;
   9.407 +}
   9.408 +	st8	[r31]=r16,SW_PR-SW_UNATB	// unat (before)
   9.409 +	st8	[r30]=r17,SW_BSP-SW_RP		// rp
   9.410 +	mov	r16=pr
   9.411 +	;;
   9.412 +	st8	[r31]=r16,SW_PFS-SW_PR		// pr
   9.413 +	mov	r17=ar.bsp
   9.414 +	mov	r16=ar.pfs
   9.415 +	;;
   9.416 +	st8	[r31]=r16,SW_RNAT-SW_PFS	// save pfs
   9.417 +	st8	[r30]=r17,SW_R4-SW_BSP		// save bsp
   9.418 +	mov	r16=ar.rnat
   9.419 +	;;
   9.420 +	st8	[r31]=r16,SW_R5-SW_RNAT		// save rnat
   9.421 +	mov	ar.rsc=IA64_RSE_EAGER
   9.422 +	;;
   9.423 +{	.mmi
   9.424 +	.mem.offset	8,0
   9.425 +	st8.spill	[r30]=r4,SW_R6-SW_R4	// r4
   9.426 +	.mem.offset	16,0
   9.427 +	st8.spill	[r31]=r5,SW_R7-SW_R5	// r5
   9.428 +	mov		r16=b1
   9.429 +	;;
   9.430 +}
   9.431 +{	.mmi
   9.432 +	.mem.offset	8,0
   9.433 +	st8.spill	[r30]=r4,SW_B1-SW_R6	// r6
   9.434 +	.mem.offset	16,0
   9.435 +	st8.spill	[r31]=r5,SW_B2-SW_R7	// r7
   9.436 +	mov		r17=b2
   9.437 +	;;
   9.438 +}
   9.439 +	st8	[r30]=r16,SW_UNATA-SW_B1	// b1
   9.440 +	st8	[r31]=r17,SW_B3-SW_B2		// b2
   9.441 +	mov	r18=ar.unat
   9.442 +	mov	r19=b3
   9.443 +	mov	r20=b4
   9.444 +	mov	r21=b5
   9.445 +	;;
   9.446 +	st8	[r30]=r18,SW_B4-SW_UNATA	// unat (after)
   9.447 +	st8	[r31]=r19,SW_B5-SW_B3		// b3
   9.448 +	;;
   9.449 +	st8	[r30]=r20,SW_LC-SW_B4		// b4
   9.450 +	st8	[r31]=r21,SW_F2-SW_B5		// b5
   9.451 +	mov	r17=ar.lc
   9.452 +	;;
   9.453 +	st8		[r30]=r17,SW_F3-SW_LC	// ar.lc
   9.454 +	stf.spill	[r31]=f2,SW_F4-SW_F2
   9.455 +	;;
   9.456 +	stf.spill	[r30]=f3,SW_F5-SW_F3
   9.457 +	stf.spill	[r31]=f4,SW_F4-SW_F2
   9.458 +	;;
   9.459 +	stf.spill	[r30]=f5,SW_F5-SW_F3
   9.460 +	stf.spill	[r31]=f16,SW_F4-SW_F2
   9.461 +	;;
   9.462 +	stf.spill	[r30]=f17,SW_F5-SW_F3
   9.463 +	stf.spill	[r31]=f18,SW_F4-SW_F2
   9.464 +	;;
   9.465 +	stf.spill	[r30]=f19,SW_F5-SW_F3
   9.466 +	stf.spill	[r31]=f20,SW_F4-SW_F2
   9.467 +	;;
   9.468 +	stf.spill	[r30]=f21,SW_F5-SW_F3
   9.469 +	stf.spill	[r31]=f22,SW_F4-SW_F2
   9.470 +	;;
   9.471 +	stf.spill	[r30]=f23,SW_F5-SW_F3
   9.472 +	stf.spill	[r31]=f24,SW_F4-SW_F2
   9.473 +	;;
   9.474 +	stf.spill	[r30]=f25,SW_F5-SW_F3
   9.475 +	stf.spill	[r31]=f26,SW_F4-SW_F2
   9.476 +	;;
   9.477 +	stf.spill	[r30]=f27,SW_F5-SW_F3
   9.478 +	stf.spill	[r31]=f28,SW_F4-SW_F2
   9.479 +	;;
   9.480 +	stf.spill	[r30]=f29,SW_F4-SW_F2
   9.481 +	stf.spill	[r31]=f30
   9.482 +	;;
   9.483 +	stf.spill	[r30]=f31
   9.484 +	add		r8=0,r0
   9.485 +	mf
   9.486 +//	br.ret.sptk	rp
   9.487 +
   9.488 +{	.mfb
   9.489 +	mov		r32=r33
   9.490 +	nop		0
   9.491 +	br.sptk		restore_context
   9.492 +	;;
   9.493 +}
   9.494 +
   9.495 +END(switch_context)
   9.496 +
   9.497 +/*
   9.498 + * The function is used to start a new thread.
   9.499 + */
   9.500 +ENTRY(thread_starter)
   9.501 +
   9.502 +	.prologue
   9.503 +	.save	ar.pfs,loc0
   9.504 +	alloc	loc0=ar.pfs,0,1,1,0
   9.505 +	;;
   9.506 +	.body
   9.507 +	;;
   9.508 +	mov	b7=r4			// the function pointer
   9.509 +	mov	out0=r6			// the argument
   9.510 +	;;
   9.511 +	br.call.sptk.many rp=b7		// Call the thread function
   9.512 +	;;
   9.513 +	br.call.sptk.many rp=exit_thread	// call exit_thread
   9.514 +	;;
   9.515 +END(thread_starter)
   9.516 +
   9.517 +ENTRY(__hypercall)
   9.518 +	mov r2=r37
   9.519 +	break 0x1000
   9.520 +	br.ret.sptk.many b0
   9.521 +	;;
   9.522 +END(__hypercall)
    10.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    10.2 +++ b/extras/mini-os/arch/ia64/gen_off.c	Thu Feb 15 13:13:36 2007 -0700
    10.3 @@ -0,0 +1,177 @@
    10.4 +/*
    10.5 + * Copyright (c) 2007 Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    10.6 + *
    10.7 + ******************************************************************************
    10.8 + *
    10.9 + * Redistribution and use in source and binary forms, with or without
   10.10 + * modification, are permitted provided that the following conditions
   10.11 + * are met:
   10.12 + * 1. Redistributions of source code must retain the above copyright
   10.13 + *    notice, this list of conditions and the following disclaimer.
   10.14 + * 2. Redistributions in binary form must reproduce the above copyright
   10.15 + *    notice, this list of conditions and the following disclaimer in the
   10.16 + *    documentation and/or other materials provided with the distribution.
   10.17 + *
   10.18 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   10.19 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   10.20 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   10.21 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   10.22 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   10.23 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   10.24 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   10.25 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   10.26 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   10.27 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   10.28 + * SUCH DAMAGE.
   10.29 + *
   10.30 + */
   10.31 +
   10.32 +#include <stdio.h>
   10.33 +#include <stddef.h>
   10.34 +#include <string.h>
   10.35 +#include "types.h"
   10.36 +#include "sched.h"
   10.37 +#include "xen/xen.h"
   10.38 +#include "xen/arch-ia64.h"
   10.39 +
   10.40 +#define SZ(st,e) sizeof(((st *)0)->e)
   10.41 +#define OFF(st,e,d,o) print_define(fp, #d, offsetof(st, e) + o, SZ(st, e))
   10.42 +#define TFOFF(e,d) OFF(trap_frame_t, e, d, 0)
   10.43 +#define SIZE(st,d) fprintf(fp, "#define %-30s\t0x%016lx\n", #d, sizeof(st))
   10.44 +
   10.45 +#define SWOFF(e,d) OFF(struct thread, e, d, 0)
   10.46 +
   10.47 +/* shared_info_t from xen/xen.h */
   10.48 +#define SI_OFF(e, d) OFF(shared_info_t, e, d,0)
   10.49 +/* mapped_regs_t from xen/arch-ia64.h */
   10.50 +#define MR_OFF(e, d) OFF(mapped_regs_t, e, d, XMAPPEDREGS_OFS)
   10.51 +
   10.52 +void
   10.53 +print_define(FILE *fp, char *name, uint64_t val, int size)
   10.54 +{
   10.55 +	char	ld_name[64];
   10.56 +	char	st_name[64];
   10.57 +	char	sz_name[64];
   10.58 +
   10.59 +	strcpy(ld_name, name);
   10.60 +	strcat(ld_name, "_ld");
   10.61 +	strcpy(st_name, name);
   10.62 +	strcat(st_name, "_st");
   10.63 +	strcpy(sz_name, name);
   10.64 +	strcat(sz_name, "_sz");
   10.65 +	fprintf(fp, "#define %-30s\t0x%016lx\n", name, val);
   10.66 +	fprintf(fp, "#define %-30s\t%u\n", sz_name, size);
   10.67 +	switch (size) {
   10.68 +		case 1:
   10.69 +			fprintf(fp, "#define %-30s\tld1\n", ld_name);
   10.70 +			fprintf(fp, "#define %-30s\tst1\n", st_name);
   10.71 +			break;
   10.72 +		case 2:
   10.73 +			fprintf(fp, "#define %-30s\tld2\n", ld_name);
   10.74 +			fprintf(fp, "#define %-30s\tst2\n", st_name);
   10.75 +			break;
   10.76 +		case 4:
   10.77 +			fprintf(fp, "#define %-30s\tld4\n", ld_name);
   10.78 +			fprintf(fp, "#define %-30s\tst4\n", st_name);
   10.79 +			break;
   10.80 +		case 8:
   10.81 +			fprintf(fp, "#define %-30s\tld8\n", ld_name);
   10.82 +			fprintf(fp, "#define %-30s\tst8\n", st_name);
   10.83 +			break;
   10.84 +		default: ;
   10.85 +	}
   10.86 +	return;
   10.87 +}
   10.88 +
   10.89 +
   10.90 +int
   10.91 +main(int argc, char ** argv)
   10.92 +{
   10.93 +	FILE		*fp;
   10.94 +
   10.95 +	fp = stdout;
   10.96 +
   10.97 +	TFOFF(cfm, TF_CFM);
   10.98 +	TFOFF(pfs, TF_PFS);
   10.99 +	TFOFF(bsp, TF_BSP);
  10.100 +	TFOFF(rnat, TF_RNAT);
  10.101 +	TFOFF(csd, TF_CSD);
  10.102 +	TFOFF(ccv, TF_CCV);
  10.103 +	TFOFF(unat, TF_UNAT);
  10.104 +	TFOFF(fpsr, TF_FPSR);
  10.105 +	TFOFF(pr, TF_PR);	
  10.106 +
  10.107 +	TFOFF(sp, TF_SP);
  10.108 +	TFOFF(gp, TF_GP);
  10.109 +	TFOFF(tp, TF_TP);
  10.110 +
  10.111 +	TFOFF(r2, TF_GREG2);
  10.112 +	TFOFF(r3, TF_GREG3);
  10.113 +	TFOFF(r16, TF_GREG16);
  10.114 +	TFOFF(r17, TF_GREG17);
  10.115 +
  10.116 +	TFOFF(b0, TF_BREG0);
  10.117 +	TFOFF(b6, TF_BREG6);
  10.118 +	TFOFF(b7, TF_BREG7);
  10.119 +
  10.120 +	TFOFF(f6, TF_FREG6);
  10.121 +	TFOFF(f7, TF_FREG7);
  10.122 +
  10.123 +	TFOFF(rsc, TF_RSC);
  10.124 +	TFOFF(ndirty, TF_NDIRTY);
  10.125 +	TFOFF(ssd, TF_SSD);
  10.126 +	TFOFF(iip, TF_IIP);
  10.127 +	TFOFF(ipsr, TF_IPSR);
  10.128 +	TFOFF(ifs, TF_IFS);
  10.129 +	TFOFF(trap_num, TF_TRAP_NUM);
  10.130 +
  10.131 +	TFOFF(ifa, TF_IFA);
  10.132 +	TFOFF(isr, TF_ISR);
  10.133 +	TFOFF(iim, TF_IIM);
  10.134 +
  10.135 +	SIZE(trap_frame_t, TF_SIZE);
  10.136 +
  10.137 +	SIZE(struct thread, SW_SIZE);
  10.138 +	SWOFF(regs.unat_b, SW_UNATB);
  10.139 +	SWOFF(regs.sp, SW_SP);
  10.140 +	SWOFF(regs.rp, SW_RP);
  10.141 +	SWOFF(regs.pr, SW_PR);
  10.142 +	SWOFF(regs.pfs, SW_PFS);
  10.143 +	SWOFF(regs.bsp, SW_BSP);
  10.144 +	SWOFF(regs.rnat, SW_RNAT);
  10.145 +	SWOFF(regs.lc, SW_LC);
  10.146 +	//SWOFF(regs.fpsr, SW_FPSR);
  10.147 +	//SWOFF(regs.psr, SW_PSR);
  10.148 +	//SWOFF(regs.gp, SW_GP);
  10.149 +	SWOFF(regs.unat_a, SW_UNATA);
  10.150 +        SWOFF(regs.r4, SW_R4);
  10.151 +        SWOFF(regs.r5, SW_R5);
  10.152 +        SWOFF(regs.r6, SW_R6);
  10.153 +        SWOFF(regs.r7, SW_R7);
  10.154 +        SWOFF(regs.b1, SW_B1);
  10.155 +        SWOFF(regs.b2, SW_B2);
  10.156 +        SWOFF(regs.b3, SW_B3);
  10.157 +        SWOFF(regs.b4, SW_B4);
  10.158 +        SWOFF(regs.b5, SW_B5);
  10.159 +        SWOFF(regs.f2, SW_F2);
  10.160 +        SWOFF(regs.f3, SW_F3);
  10.161 +        SWOFF(regs.f4, SW_F4);
  10.162 +        SWOFF(regs.f5, SW_F5);
  10.163 +
  10.164 +	SI_OFF(arch.start_info_pfn, START_INFO_PFN);
  10.165 +	MR_OFF(interrupt_mask_addr, XSI_PSR_I_ADDR_OFS);
  10.166 +	MR_OFF(interrupt_collection_enabled, XSI_PSR_IC_OFS);
  10.167 +	MR_OFF(ipsr, XSI_IPSR_OFS);
  10.168 +	MR_OFF(iip, XSI_IIP_OFS);
  10.169 +	MR_OFF(ifs, XSI_IFS_OFS);
  10.170 +	MR_OFF(ifa, XSI_IFA_OFS);
  10.171 +	MR_OFF(iim, XSI_IIM_OFS);
  10.172 +	MR_OFF(iim, XSI_IIM_OFS);
  10.173 +	MR_OFF(iipa, XSI_IIPA_OFS);
  10.174 +	MR_OFF(isr, XSI_ISR_OFS);
  10.175 +	MR_OFF(banknum, XSI_BANKNUM_OFS);
  10.176 +	MR_OFF(bank1_regs[0], XSI_BANK1_R16_OFS);
  10.177 +	MR_OFF(precover_ifs, XSI_PRECOVER_IFS_OFS);
  10.178 +
  10.179 +	return(0);
  10.180 +}
    11.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    11.2 +++ b/extras/mini-os/arch/ia64/ia64.S	Thu Feb 15 13:13:36 2007 -0700
    11.3 @@ -0,0 +1,224 @@
    11.4 +/*
    11.5 + * Copyright (c) 2007 Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    11.6 + *
    11.7 + *****************************************************************************
    11.8 + * Permission is hereby granted, free of charge, to any person obtaining a copy
    11.9 + * of this software and associated documentation files (the "Software"), to
   11.10 + * deal in the Software without restriction, including without limitation the
   11.11 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   11.12 + * sell copies of the Software, and to permit persons to whom the Software is
   11.13 + * furnished to do so, subject to the following conditions:
   11.14 + * 
   11.15 + * The above copyright notice and this permission notice shall be included in
   11.16 + * all copies or substantial portions of the Software.
   11.17 + * 
   11.18 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   11.19 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   11.20 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   11.21 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   11.22 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   11.23 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   11.24 + * DEALINGS IN THE SOFTWARE.
   11.25 + */
   11.26 +
   11.27 +
   11.28 +
   11.29 +#include "asm.h"
   11.30 +#include "page.h"
   11.31 +#include "ia64_cpu.h"
   11.32 +#include "ia64_fpu.h"
   11.33 +#include "privop.h"
   11.34 +#include "offsets.h"
   11.35 +
   11.36 +
   11.37 +
   11.38 +	/*
   11.39 +	 * Allocate kernel stack area.
   11.40 +	 * This is used for stack pointer (goes down from kstack+PAGE_SIZE) and
   11.41 +	 * RSE (goes up from kstack).
   11.42 +	 */
   11.43 +	.section .data.start,"aw"
   11.44 +	.global	kstack
   11.45 +	.align	PAGE_SIZE
   11.46 +kstack:	.space KSTACK_PAGES * PAGE_SIZE
   11.47 +
   11.48 +	.text
   11.49 +
   11.50 +	/*
   11.51 +	 * Start the kernel.
   11.52 +	 * r28 points to the address of the boot parameter area, given
   11.53 +	 * from the bootloader.
   11.54 +	 * Execution reaches here in physical mode.
   11.55 +	 */
   11.56 +ENTRY(_start)
   11.57 +	.prologue
   11.58 +	.save rp, r0		// terminate unwind chain with a NULL rp
   11.59 +	.body
   11.60 +
   11.61 +	alloc	loc0=ar.pfs,0,1,1,0
   11.62 +
   11.63 +	rsm psr.i | psr.ic
   11.64 +	;;
   11.65 +	srlz.i
   11.66 +	;;
   11.67 +
   11.68 +	/*
   11.69 +	 * Initialize mini-os region registers:
   11.70 +	 * Currently only region registers 5 and 7 are used for addressing.
   11.71 +	 * rr[5] : virtual kernel address space
   11.72 +	 * rr[7] : directly mapped physically addresses.
   11.73 +	 */
   11.74 +	movl	r2=0<<IA64_RR_IDX_POS
   11.75 +	movl	r3=1<<IA64_RR_IDX_POS
   11.76 +	;;
   11.77 +	mov	rr[r2]=r0
   11.78 +	mov	rr[r3]=r0
   11.79 +	;;
   11.80 +	movl	r2=2<<IA64_RR_IDX_POS
   11.81 +	movl	r3=3<<IA64_RR_IDX_POS
   11.82 +	;;
   11.83 +	mov	rr[r2]=r0
   11.84 +	mov	rr[r3]=r0
   11.85 +	;;
   11.86 +	movl	r2=4<<IA64_RR_IDX_POS
   11.87 +	movl	r3=6<<IA64_RR_IDX_POS
   11.88 +	;;
   11.89 +	mov	rr[r2]=r0
   11.90 +	mov	rr[r3]=r0
   11.91 +	;;
   11.92 +	// Wired memory for kernel data and text.
   11.93 +	movl	r2=IA64_RR_VAL(KERNEL_TR_PAGE_SIZE,0)
   11.94 +	movl	r3=5<<IA64_RR_IDX_POS		// region 5
   11.95 +	;;
   11.96 +	mov	rr[r3]=r2
   11.97 +	;;
   11.98 +	/*
   11.99 +	 * Region 7 addresses are only for directly mapped physically
  11.100 +	 * addresses.
  11.101 +	 */
  11.102 +	movl	r2=IA64_RR_VAL(PTE_PS_16K,0)
  11.103 +	movl	r3=7<<IA64_RR_IDX_POS		// region 7
  11.104 +	;;
  11.105 +	mov	rr[r3]=r2
  11.106 +	;;
  11.107 +
  11.108 +	/*
  11.109 +	 * Now pin mappings into the TLB for kernel text and data
  11.110 +	 */
  11.111 +	mov	r18=KERNEL_TR_PAGE_SIZE<<2
  11.112 +	movl	r17=KERNEL_START
  11.113 +	;;
  11.114 +	mov	cr.itir=r18
  11.115 +	mov	cr.ifa=r17
  11.116 +	mov	r16=IA64_TR_KERNEL
  11.117 +	mov	r3=ip
  11.118 +	movl	r18=PTE_KERNEL_ATTR
  11.119 +	;;
  11.120 +	dep	r2=0,r3,0,KERNEL_TR_PAGE_SIZE
  11.121 +	;;
  11.122 +	or	r18=r2,r18
  11.123 +	;;
  11.124 +	srlz.i
  11.125 +	;;
  11.126 +	itr.i	itr[r16]=r18
  11.127 +	;;
  11.128 +	itr.d	dtr[r16]=r18
  11.129 +	;;
  11.130 +	srlz.i
  11.131 +
  11.132 +	/*  Switch into virtual mode */
  11.133 +	movl	r16=STARTUP_PSR
  11.134 +	;;
  11.135 +	mov	cr.ipsr=r16
  11.136 +	movl	r17=1f
  11.137 +	;;
  11.138 +	mov	cr.iip=r17
  11.139 +	mov	cr.ifs=r0
  11.140 +	;;
  11.141 +	rfi
  11.142 +	;;
  11.143 +1:	/* now we are in virtual mode */
  11.144 +
  11.145 +	movl	r3=ia64_trap_table
  11.146 +	;;
  11.147 +	mov	cr.iva=r3
  11.148 +	;;
  11.149 +
  11.150 +	movl	r2=IA64_FPSR_DEFAULT
  11.151 +	movl	r3=IA64_DCR_DEFAULT
  11.152 +	;;
  11.153 +	srlz.i
  11.154 +	movl	gp=__gp
  11.155 +
  11.156 +	mov	ar.fpsr=r2
  11.157 +	mov	cr.dcr=r3
  11.158 +	;;
  11.159 +	movl	r2=kstack
  11.160 +	movl	r5=KSTACK_PAGES * PAGE_SIZE - 16
  11.161 +	mov	ar.rsc=0	// place RSE in enforced lazy mode
  11.162 +	;;
  11.163 +	loadrs			// clear the dirty partition
  11.164 +	;;
  11.165 +	mov	ar.bspstore=r2	// establish the new RSE stack
  11.166 +	add	sp=r2,r5
  11.167 +	;;
  11.168 +	mov	ar.rsc=IA64_RSE_EAGER	// place RSE in eager mode
  11.169 +
  11.170 +	;;
  11.171 +	movl	r2=ia64_boot_paramP
  11.172 +	mov	r3=7		// make address virtual region 7.
  11.173 +	;;
  11.174 +	dep	r28=r3,r28,61,3
  11.175 +	;;
  11.176 +				// save the address of the boot param area
  11.177 +				// passed by the bootloader
  11.178 +	st8	[r2]=r28
  11.179 +	;;
  11.180 +
  11.181 +	/* Set xsi base. I use here XSI_BASE. */
  11.182 +#define FW_HYPERCALL_SET_SHARED_INFO_VA                 0x600
  11.183 +	mov r2=FW_HYPERCALL_SET_SHARED_INFO_VA
  11.184 +	movl r28=XSI_BASE
  11.185 +	;;
  11.186 +	break 0x1000
  11.187 +	;;
  11.188 +	/*
  11.189 +	 * I set up here the pointer to the global start_info structure.
  11.190 +	 * This structure will be initialized in arch_init().
  11.191 +	 */
  11.192 +	movl	out0=start_info_union
  11.193 +		// Prepare out0 - the pointer to start_info_t.
  11.194 +	movl	r14=XSI_BASE
  11.195 +	;;
  11.196 +	add	r15=START_INFO_PFN,r14	// add offset to XSI_BASE
  11.197 +	;;
  11.198 +	START_INFO_PFN_ld	r14=[r15]	// load the start_info_pfn
  11.199 +	add	r16=7, r0
  11.200 +	;;
  11.201 +#if defined(BIG_ENDIAN)
  11.202 +	mux1	r14=r14,@rev		// swap because mini-os is in BE
  11.203 +#endif
  11.204 +	;;
  11.205 +	shl	r15=r14,PAGE_SHIFT_XEN_16K	// pfn << PAGE_SHIFT_XEN_16K
  11.206 +	shl	r16=r16,IA64_RR_IDX_POS		// (7<<IA64_RR_IDX_POS)
  11.207 +	;;
  11.208 +	or	out0=r16, r15			// make a region 7 address
  11.209 +	;;
  11.210 +
  11.211 +	br.call.sptk.many rp=start_kernel
  11.212 +	;;
  11.213 +	add	r2=3,r0
  11.214 +	;;
  11.215 +	ld8	r3=[r2]
  11.216 +	;;
  11.217 +
  11.218 +self:	hint @pause
  11.219 +	br.sptk.many self		// endless loop
  11.220 +END(_start)
  11.221 +
  11.222 +
  11.223 +ENTRY(do_nop)
  11.224 +	nop	0x01
  11.225 +	add	r15=1,r15
  11.226 +	br.ret.sptk.many rp
  11.227 +END(do_nop)
    12.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    12.2 +++ b/extras/mini-os/arch/ia64/ivt.S	Thu Feb 15 13:13:36 2007 -0700
    12.3 @@ -0,0 +1,865 @@
    12.4 +/*
    12.5 + * Copyright (c) 2007 Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    12.6 + * Description: ia64 specific trap handling.
    12.7 + *
    12.8 + ****************************************************************************
    12.9 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   12.10 + * of this software and associated documentation files (the "Software"), to
   12.11 + * deal in the Software without restriction, including without limitation the
   12.12 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   12.13 + * sell copies of the Software, and to permit persons to whom the Software is
   12.14 + * furnished to do so, subject to the following conditions:
   12.15 + * 
   12.16 + * The above copyright notice and this permission notice shall be included in
   12.17 + * all copies or substantial portions of the Software.
   12.18 + * 
   12.19 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   12.20 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   12.21 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   12.22 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   12.23 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   12.24 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   12.25 + * DEALINGS IN THE SOFTWARE.
   12.26 + *
   12.27 + */
   12.28 +
   12.29 +
   12.30 +#include "asm.h"
   12.31 +#include "page.h"
   12.32 +#include "ia64_cpu.h"
   12.33 +#include "privop.h"
   12.34 +#include "offsets.h"
   12.35 +
   12.36 +
   12.37 +/* General register usage in interrupt handling:
   12.38 + *	r16, r17, ... are used for input parameters of sub-routines
   12.39 + *	r29:	used to access memory which may raise nested TLB fault
   12.40 + *	r30:	b0 save register
   12.41 + *	r31:	predicates save register
   12.42 + *	p30,p31:	used for TLB stuff: (0,1)=data, (1,0)=instruction
   12.43 + */
   12.44 +
   12.45 +
   12.46 +#define FILL_FP_PAIR(f1, f2, b1, b2)	\
   12.47 +	ldf.fill	f1=[b1],32	;\
   12.48 +	ldf.fill	f2=[b2],32	;\
   12.49 +	;;
   12.50 +
   12.51 +#define SPILL_FP_PAIR(f1, f2, b1, b2)	\
   12.52 +	stf.spill	[b1]=f1,32	;\
   12.53 +	stf.spill	[b2]=f2,32	;\
   12.54 +	;;
   12.55 +
   12.56 +#define FILL_REG_PAIR(r1, r2, b1, b2)	\
   12.57 +	ld8.fill	r1=[b1],16	;\
   12.58 +	ld8.fill	r2=[b2],16	;\
   12.59 +	;;
   12.60 +
   12.61 +#define SPILL_REG_PAIR(r1, r2, b1, b2)	\
   12.62 +	.mem.offset 0,0			;\
   12.63 +	st8.spill	[b1]=r1,16	;\
   12.64 +	.mem.offset 8,0			;\
   12.65 +	st8.spill	[b2]=r2,16	;\
   12.66 +	;;
   12.67 +
   12.68 +
   12.69 +/**
   12.70 + *	The function does a store of the current processor context
   12.71 + *	to the given exception frame address.
   12.72 + *	These are some special and the scratch registers for calling
   12.73 + *	C-functions later.
   12.74 + *	The bspstore will be the same. A clean RSE is made with the
   12.75 + *	cover instruction.
   12.76 + *	
   12.77 + *	The return is done through a jump to the next bundle after ip (r16).
   12.78 + *
   12.79 + *	Used register: r16, r18, r19, r20, r21, r22 of bank 0
   12.80 + *
   12.81 + * 	@param: r16 ip of the bundle with the jump.
   12.82 + *	@param: r18 pointer to the trap frame.
   12.83 + *	@param: r23 trap number/err val
   12.84 + *
   12.85 + */
   12.86 +
   12.87 +ENTRY(save_tf_rse_switch)
   12.88 +	movl	r21=XSI_IPSR		// XEN !!
   12.89 +	movl	r22=XSI_IIP		// XEN !!
   12.90 +	;;
   12.91 +	ld8	r21=[r21]		// XEN.ipsr
   12.92 +	ld8	r22=[r22];;		// XEN.iip
   12.93 +#if defined(BIG_ENDIAN)
   12.94 +	mux1	r21=r21,@rev		// swap because mini-os is in BE
   12.95 +	mux1	r22=r22,@rev		// swap because mini-os is in BE
   12.96 +	;;
   12.97 +#endif
   12.98 +	add	r19=TF_IPSR,r18
   12.99 +	add	r20=TF_IIP,r18
  12.100 +	;;
  12.101 +	st8	[r19]=r21		// store cr.ipsr
  12.102 +	st8	[r20]=r22		// store cr.iip
  12.103 +	;;
  12.104 +	//// r16 return jump pointer, r18 - trap frame base, 
  12.105 +	add	r19=TF_UNAT,r18
  12.106 +	mov	r20=ar.unat
  12.107 +	;;
  12.108 +	st8	[r19]=r20		// store scratch unat
  12.109 +	;;
  12.110 +
  12.111 +	add	r19=TF_GP,r18
  12.112 +	add	r20=TF_SP,r18
  12.113 +	;;
  12.114 +	st8	[r19]=gp,TF_TP-TF_GP	// store gp
  12.115 +	st8	[r20]=sp,TF_PR-TF_SP	// store sp
  12.116 +	mov	r21=pr
  12.117 +	;;
  12.118 +	st8	[r19]=r13		// store tp
  12.119 +	st8	[r20]=r21		// store pr
  12.120 +	;;
  12.121 +	add	r19=TF_GREG2,r18	// Now first general regs.
  12.122 +	add	r20=TF_GREG3,r18
  12.123 +	;;
  12.124 +	SPILL_REG_PAIR( r2, r3,r19,r20)
  12.125 +	SPILL_REG_PAIR( r8, r9,r19,r20)
  12.126 +	SPILL_REG_PAIR(r10,r11,r19,r20)
  12.127 +	SPILL_REG_PAIR(r14,r15,r19,r20)
  12.128 +	;;
  12.129 +	mov	r14=r18		// move trap frame base for bsw
  12.130 +	mov	r15=r16		// save return address
  12.131 +	;;
  12.132 +	//bsw.1		// switch to bank 1 for saving these registers.
  12.133 +	movl r30=XSI_BANKNUM		// Switch to bank 1.
  12.134 +	mov r31=1;;
  12.135 +#if defined(BIG_ENDIAN)
  12.136 +	mux1	r31=r31,@rev		// swap because mini-os is in BE
  12.137 +	;;
  12.138 +#endif
  12.139 +	st4 [r30]=r31
  12.140 +	;;
  12.141 +	/*
  12.142 +	 * On XEN the hypervisor has stored the bank 1 registers
  12.143 +	 * r16-r31. I must reload these registers here to get
  12.144 +	 * access.
  12.145 +	 */
  12.146 +	movl r30=XSI_BANK1_R16;
  12.147 +	movl r31=XSI_BANK1_R16+8;; 
  12.148 +	ld8 r16=[r30],16; ld8 r17=[r31],16;;
  12.149 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.150 +	mux1	r16=r16,@rev; mux1 r17=r17,@rev;;
  12.151 +#endif
  12.152 +	ld8 r18=[r30],16; ld8 r19=[r31],16;;
  12.153 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.154 +	mux1	r18=r18,@rev; mux1 r19=r19,@rev;;
  12.155 +#endif
  12.156 +	ld8 r20=[r30],16; ld8 r21=[r31],16;;
  12.157 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.158 +	mux1	r20=r20,@rev; mux1 r21=r21,@rev;;
  12.159 +#endif
  12.160 +	ld8 r22=[r30],16; ld8 r23=[r31],16;;
  12.161 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.162 +	mux1	r22=r22,@rev; mux1 r23=r23,@rev;;
  12.163 +#endif
  12.164 +	ld8 r24=[r30],16; ld8 r25=[r31],16;;
  12.165 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.166 +	mux1	r24=r24,@rev; mux1 r25=r25,@rev;;
  12.167 +#endif
  12.168 +	ld8 r26=[r30],16; ld8 r27=[r31],16;;
  12.169 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.170 +	mux1	r26=r26,@rev; mux1 r27=r27,@rev;;
  12.171 +#endif
  12.172 +	ld8 r28=[r30],16; ld8 r29=[r31],16;;
  12.173 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.174 +	mux1	r28=r28,@rev; mux1 r29=r29,@rev;;
  12.175 +#endif
  12.176 +	ld8 r30=[r30]; ld8 r31=[r31];;
  12.177 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.178 +	mux1	r30=r30,@rev; mux1 r31=r31,@rev;;
  12.179 +#endif
  12.180 +
  12.181 +	add	r2=TF_GREG16,r14
  12.182 +	add	r3=TF_GREG17,r14
  12.183 +	;;
  12.184 +	SPILL_REG_PAIR(r16,r17,r2,r3)
  12.185 +	SPILL_REG_PAIR(r18,r19,r2,r3)
  12.186 +	SPILL_REG_PAIR(r20,r21,r2,r3)
  12.187 +	SPILL_REG_PAIR(r22,r23,r2,r3)
  12.188 +	SPILL_REG_PAIR(r24,r25,r2,r3)
  12.189 +	SPILL_REG_PAIR(r26,r27,r2,r3)
  12.190 +	SPILL_REG_PAIR(r28,r29,r2,r3)
  12.191 +	SPILL_REG_PAIR(r30,r31,r2,r3)
  12.192 +	;;
  12.193 +	//bsw.0				// back to interrupt bank 0
  12.194 +	movl r2=XSI_BANKNUM;;
  12.195 +	st4 [r2]=r0
  12.196 +	;;
  12.197 +	mov	r18=r14			// restore context pointer
  12.198 +	mov	r16=r15			// restore return address
  12.199 +	;;
  12.200 +	//// r16 return jump pointer, r18 - trap frame base, 
  12.201 +	add	r19=TF_CCV,r18
  12.202 +	add	r20=TF_CSD,r18
  12.203 +	mov	r21=ar.ccv
  12.204 +	mov	r22=ar.csd
  12.205 +	;;
  12.206 +	st8	[r19]=r21		// ar.ccv
  12.207 +	st8	[r20]=r22		// ar.csd
  12.208 +	;;
  12.209 +	add	r19=TF_SSD,r18
  12.210 +	mov	r21=ar.ssd
  12.211 +	;;
  12.212 +	st8	[r19]=r21		// ar.ssd
  12.213 +	;;
  12.214 +	add	r19=TF_FREG6,r18
  12.215 +	add	r20=TF_FREG7,r18
  12.216 +	;;
  12.217 +	SPILL_FP_PAIR(f6, f7, r19, r20)
  12.218 +	SPILL_FP_PAIR(f8, f9, r19, r20)
  12.219 +	SPILL_FP_PAIR(f10, f11, r19, r20)
  12.220 +
  12.221 +	add	r19=TF_BREG0,r18	// b0, b6, b7
  12.222 +	add	r20=TF_BREG6,r18
  12.223 +	mov	r21=b0
  12.224 +	mov	r22=b6
  12.225 +	;;
  12.226 +	st8	[r19]=r21,TF_BREG7-TF_BREG0	// store b0
  12.227 +	st8	[r20]=r22,16		// store b6
  12.228 +	;;
  12.229 +	mov	r21=b7
  12.230 +	;;
  12.231 +	st8	[r19]=r21		// store b7
  12.232 +
  12.233 +	//// r16 return jump pointer, r18 - trap frame base, 
  12.234 +
  12.235 +		// Read and save RSC, PFS
  12.236 +	add	r19=TF_PFS,r18
  12.237 +	add	r20=TF_RSC,r18
  12.238 +	mov	r21=ar.pfs
  12.239 +	mov	r22=ar.rsc
  12.240 +	;;
  12.241 +{	.mmb
  12.242 +	st8	[r19]=r21		// store ar.pfs
  12.243 +	st8	[r20]=r22		// store ar.rsc
  12.244 +		// Issue cover instruction
  12.245 +	cover		// must be the last instruction in bundle
  12.246 +	//XEN_HYPER_COVER
  12.247 +	;;
  12.248 +}
  12.249 +		// Read and save IFS
  12.250 +	add	r19=TF_IFS,r18
  12.251 +	add	r20=TF_CFM,r18
  12.252 +		/* xen special handling for possibly lazy cover */
  12.253 +	movl	r8=XSI_PRECOVER_IFS;
  12.254 +	;;
  12.255 +	ld8	r21=[r8];
  12.256 +	;;
  12.257 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.258 +	mux1	r21=r21,@rev
  12.259 +	;;
  12.260 +#endif
  12.261 +	st8	[r19]=r21		// store cr.ifs
  12.262 +	dep.z	r22=r21,0,38		// copy ifm part from ifs.ifm
  12.263 +	;;
  12.264 +	st8	[r20]=r22		// store cfm
  12.265 +		// RSE in enforced lazy mode
  12.266 +	mov	ar.rsc=IA64_RSE_LAZY
  12.267 +	;;
  12.268 +		// Read and save BSPSTORE and RNAT
  12.269 +	add	r19=TF_BSP,r18
  12.270 +	add	r20=TF_RNAT,r18
  12.271 +	mov	r21=ar.bspstore
  12.272 +	mov	r22=ar.rnat
  12.273 +	;;
  12.274 +	st8	[r19]=r21	                // store ar.bspstore
  12.275 +	st8	[r20]=r22			// store ar.rnat
  12.276 +	;;
  12.277 +		// Write new BSPSTORE
  12.278 +	//mov	r21=ar.bsp
  12.279 +	//;;
  12.280 +	mov	r22=r21			// new bspstore equal to old
  12.281 +	;;
  12.282 +	mov	ar.bspstore=r22		// the new bspstore
  12.283 +	;;
  12.284 +		// Read and save the new BSP for calculating number of dirty regs.
  12.285 +	mov	r21=ar.bsp
  12.286 +	;;
  12.287 +	sub	r21=r21,r22		// r21 -> ndirty
  12.288 +	add     r19=TF_NDIRTY-TF_BSP,r19        // TF_NDIRTY pos in r19
  12.289 +	;;
  12.290 +	st8	[r19]=r21		// store ndirty
  12.291 +	;;
  12.292 +	mov	ar.rsc=IA64_RSE_EAGER	// RSE on again
  12.293 +	;;
  12.294 +	add	r19=TF_FPSR,r18
  12.295 +	;;
  12.296 +	mov	r21=ar.fpsr
  12.297 +	;;
  12.298 +	st8	[r19]=r21		// ar.fpsr
  12.299 +	;;
  12.300 +	//// r16 return jump pointer, r18 - trap frame base, 
  12.301 +		// Load the gp with our module __gp
  12.302 +	movl	gp=__gp
  12.303 +	;;
  12.304 +	add	r16=16,r16	// for jump to next bundle
  12.305 +	;;
  12.306 +	mov	b7=r16
  12.307 +	;;
  12.308 +
  12.309 +{	.mfb
  12.310 +	srlz.d
  12.311 +	nop	0
  12.312 +	br.sptk	b7
  12.313 +	;;
  12.314 +}
  12.315 +
  12.316 +END(save_tf_rse_switch)
  12.317 +
  12.318 +
  12.319 +/**
  12.320 + *	The function reloads the processor context stored in
  12.321 + *	save_tf_rse_switch().
  12.322 + *	
  12.323 + *	On calling the function the bank 0 must be activ.
  12.324 + *	The return is done through a rfi.
  12.325 + *	Used register: b7, r16, r18, r19, r20, r21, r22 of bank 0
  12.326 + *
  12.327 + *	@param: r18 pointer to the exception frame
  12.328 + *
  12.329 + */
  12.330 +ENTRY(restore_tf_rse_switch) 
  12.331 +	add	r19=TF_IPSR,r18
  12.332 +	add	r20=TF_IIP,r18
  12.333 +	;;
  12.334 +	ld8	r21=[r19]		// load cr.ipsr
  12.335 +	ld8	r22=[r20]		// load cr.iip
  12.336 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.337 +	;;
  12.338 +	mux1	r21=r21,@rev
  12.339 +	mux1	r22=r22,@rev
  12.340 +	;;
  12.341 +#endif
  12.342 +	movl	r16=XSI_IPSR		// XEN !!
  12.343 +	;;
  12.344 +	st8	[r16]=r21,XSI_IIP_OFS-XSI_IPSR_OFS	// XEN.ipsr
  12.345 +	mov	r2=r21			// save for fp stuff below
  12.346 +	;;
  12.347 +	st8	[r16]=r22		// XEN.iip
  12.348 +	;;
  12.349 +	//// r18 - trap frame base 
  12.350 +		// Allocate a zero sized frame
  12.351 +	alloc	r30=ar.pfs,0,0,0,0	// discard current frame
  12.352 +	;;
  12.353 +		// calc number of dirty regs and put this into rsc.loardrs
  12.354 +	add	r19=TF_NDIRTY,r18
  12.355 +	;;
  12.356 +	ld8	r22=[r19]		// ndirty
  12.357 +	;;
  12.358 +	shl	r21=r22,16		// value for ar.rsc
  12.359 +	//mov	r19=(MOS_IA64_RSC_BE << IA64_RSC_BE)
  12.360 +	;;
  12.361 +	or	r21=(MOS_IA64_RSC_BE << IA64_RSC_BE),r21
  12.362 +	;;
  12.363 +	mov	ar.rsc=r21		// setup for loadrs
  12.364 +	;;
  12.365 +		// Issue a loadrs instruction
  12.366 +{	.mmi
  12.367 +	loadrs		// must be the first instruction
  12.368 +	;;
  12.369 +	nop 0x0
  12.370 +	nop 0x0
  12.371 +}
  12.372 +		// Restore BSPSTORE from interrupted context
  12.373 +	add	r19=TF_BSP,r18
  12.374 +	add	r20=TF_RNAT,r18
  12.375 +	;;	
  12.376 +	ld8	r21=[r19]		// load ar.bspstore
  12.377 +	ld8	r22=[r20]		// load ar.rnat
  12.378 +	;;
  12.379 +	mov	ar.bspstore=r21		// set ar.bspstore
  12.380 +	;;
  12.381 +		// Restore RNAT
  12.382 +	mov	ar.rnat=r22		// set ar.rnat
  12.383 +	;;
  12.384 +		// Restore PFS and IFS
  12.385 +	add	r19=TF_PFS,r18
  12.386 +	add	r20=TF_IFS,r18
  12.387 +	movl	r16=XSI_IFS		// XEN !!
  12.388 +	;;
  12.389 +	ld8	r21=[r19]		// load ar.pfs
  12.390 +	ld8	r22=[r20]		// load cr.ifs
  12.391 +	;;
  12.392 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.393 +	mux1	r22=r22,@rev
  12.394 +	;;
  12.395 +#endif
  12.396 +	add	r19=TF_RSC,r18
  12.397 +	mov	ar.pfs=r21
  12.398 +	st8	[r16]=r22		// XEN.ifs
  12.399 +	;;
  12.400 +		// Restore RSC
  12.401 +	ld8	r21=[r19]		// load ar.rsc
  12.402 +	;;
  12.403 +	mov	ar.rsc=r21		// set ar.rsc
  12.404 +	//// r18 - trap frame base
  12.405 +	add	r19=TF_GP,r18
  12.406 +	add	r20=TF_SP,r18
  12.407 +	;;
  12.408 +	ld8	gp=[r19],TF_TP-TF_GP	// load gp
  12.409 +	ld8	sp=[r20],TF_PR-TF_SP	// load sp
  12.410 +	;;
  12.411 +	ld8	r13=[r19]		// load tp
  12.412 +	ld8	r21=[r20]		// load pr
  12.413 +	;;
  12.414 +	mov	pr=r21,-1		// set pr
  12.415 +	;;
  12.416 +	add	r19=TF_BREG0,r18
  12.417 +	add	r20=TF_BREG6,r18
  12.418 +	;;
  12.419 +	ld8	r21=[r19],TF_BREG7-TF_BREG0	// load b0
  12.420 +	ld8	r22=[r20],16		// load b6
  12.421 +	;;
  12.422 +	mov	b0=r21
  12.423 +	mov	b6=r22
  12.424 +	;;
  12.425 +	ld8	r21=[r19]		// load b7
  12.426 +	ld8	r22=[r20],16		// load b3
  12.427 +	;;
  12.428 +	mov	b7=r21
  12.429 +	//// r18 - trap frame base
  12.430 +	mov	r14=r18			// Save the context pointer
  12.431 +	;;
  12.432 +	// bsw.1
  12.433 +	movl r30=XSI_BANKNUM		// Switch to bank 1.
  12.434 +	mov r31=1;;
  12.435 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.436 +	mux1	r31=r31,@rev
  12.437 +	;;
  12.438 +#endif
  12.439 +	st4 [r30]=r31
  12.440 +	;;
  12.441 +	add	r2=TF_GREG16,r14
  12.442 +	add	r3=TF_GREG17,r14
  12.443 +	;;
  12.444 +	FILL_REG_PAIR(r16,r17,r2,r3)
  12.445 +	FILL_REG_PAIR(r18,r19,r2,r3)
  12.446 +	FILL_REG_PAIR(r20,r21,r2,r3)
  12.447 +	FILL_REG_PAIR(r22,r23,r2,r3)
  12.448 +	FILL_REG_PAIR(r24,r25,r2,r3)
  12.449 +	FILL_REG_PAIR(r26,r27,r2,r3)
  12.450 +	FILL_REG_PAIR(r28,r29,r2,r3)
  12.451 +	FILL_REG_PAIR(r30,r31,r2,r3)
  12.452 +
  12.453 +	/*
  12.454 +	 * On XEN I have to store the bank 1 register into the
  12.455 +	 * global XSI_... area.
  12.456 +	 */
  12.457 +		// r16-r31 all now hold bank1 values
  12.458 +	movl r2=XSI_BANK1_R16
  12.459 +	movl r3=XSI_BANK1_R16+8
  12.460 +	;;
  12.461 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.462 +	mux1	r16=r16,@rev; mux1 r17=r17,@rev;;
  12.463 +#endif
  12.464 +	.mem.offset 0,0; st8.spill [r2]=r16,16
  12.465 +	.mem.offset 8,0; st8.spill [r3]=r17,16
  12.466 +	;;
  12.467 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.468 +	mux1	r18=r18,@rev; mux1 r19=r19,@rev;;
  12.469 +#endif
  12.470 +	.mem.offset 0,0; st8.spill [r2]=r18,16
  12.471 +	.mem.offset 8,0; st8.spill [r3]=r19,16
  12.472 +	;;
  12.473 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.474 +	mux1	r20=r20,@rev; mux1 r21=r21,@rev;;
  12.475 +#endif
  12.476 +	.mem.offset 0,0; st8.spill [r2]=r20,16
  12.477 +	.mem.offset 8,0; st8.spill [r3]=r21,16
  12.478 +	;;
  12.479 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.480 +	mux1	r22=r22,@rev; mux1 r23=r23,@rev;;
  12.481 +#endif
  12.482 +	.mem.offset 0,0; st8.spill [r2]=r22,16
  12.483 +	.mem.offset 8,0; st8.spill [r3]=r23,16
  12.484 +	;;
  12.485 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.486 +	mux1	r24=r24,@rev; mux1 r25=r25,@rev;;
  12.487 +#endif
  12.488 +	.mem.offset 0,0; st8.spill [r2]=r24,16
  12.489 +	.mem.offset 8,0; st8.spill [r3]=r25,16
  12.490 +	;;
  12.491 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.492 +	mux1	r26=r26,@rev; mux1 r27=r27,@rev;;
  12.493 +#endif
  12.494 +	.mem.offset 0,0; st8.spill [r2]=r26,16
  12.495 +	.mem.offset 8,0; st8.spill [r3]=r27,16
  12.496 +	;;
  12.497 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.498 +	mux1	r28=r28,@rev; mux1 r29=r29,@rev;;
  12.499 +#endif
  12.500 +	.mem.offset 0,0; st8.spill [r2]=r28,16
  12.501 +	.mem.offset 8,0; st8.spill [r3]=r29,16
  12.502 +	;;
  12.503 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.504 +	mux1	r30=r30,@rev; mux1 r31=r31,@rev;;
  12.505 +#endif
  12.506 +	.mem.offset 0,0; st8.spill [r2]=r30,16
  12.507 +	.mem.offset 8,0; st8.spill [r3]=r31,16
  12.508 +	;;
  12.509 +	// bsw.0
  12.510 +	movl r2=XSI_BANKNUM;;
  12.511 +	st4 [r2]=r0;
  12.512 +
  12.513 +	mov	r18=r14			// Move back the context pointer
  12.514 +	;;
  12.515 +	add	r19=TF_GREG2,r18
  12.516 +	add	r20=TF_GREG3,r18
  12.517 +	;;
  12.518 +	FILL_REG_PAIR( r2, r3,r19,r20)
  12.519 +	FILL_REG_PAIR( r8, r9,r19,r20)
  12.520 +	FILL_REG_PAIR(r10,r11,r19,r20)
  12.521 +	FILL_REG_PAIR(r14,r15,r19,r20)
  12.522 +
  12.523 +	//// r18 - trap frame base, 
  12.524 +
  12.525 +	add	r19=TF_CCV,r18
  12.526 +	add	r20=TF_CSD,r18
  12.527 +	;;
  12.528 +	ld8	r21=[r19]		// ar.ccv
  12.529 +	ld8	r22=[r20]		// ar.csd
  12.530 +	;;
  12.531 +	mov	ar.ccv=r21
  12.532 +	mov	ar.csd=r22
  12.533 +	add	r19=TF_SSD,r18
  12.534 +	;;
  12.535 +	ld8	r21=[r19]		// ar.ssd
  12.536 +	;;
  12.537 +	mov	ar.ssd=r21
  12.538 +	add	r19=TF_FREG6,r18
  12.539 +	add	r20=TF_FREG7,r18
  12.540 +	;;
  12.541 +	FILL_FP_PAIR(f6, f7, r19, r20)
  12.542 +	FILL_FP_PAIR(f8, f9, r19, r20)
  12.543 +	FILL_FP_PAIR(f10, f11, r19, r20)
  12.544 +	add	r19=TF_FPSR,r18
  12.545 +	;;
  12.546 +	ld8	r21=[r19]		// ar.fpsr
  12.547 +	;;
  12.548 +	mov	ar.fpsr=r21
  12.549 +	add	r19=TF_UNAT,r18
  12.550 +	;;
  12.551 +	ld8	r21=[r19]
  12.552 +	;;
  12.553 +	mov	ar.unat=r21
  12.554 +	;;
  12.555 +	srlz.i
  12.556 +	;;
  12.557 +	//rfi
  12.558 +	XEN_HYPER_RFI;
  12.559 +	;;
  12.560 +END(restore_tf_rse_switch)
  12.561 +
  12.562 +
  12.563 +ENTRY(save_special_regs)
  12.564 +	alloc	loc0=ar.pfs,1,7,0,0
  12.565 +	movl	loc1=XSI_IFA		// XEN !!
  12.566 +	movl	loc2=XSI_ISR		// XEN !!
  12.567 +	;;
  12.568 +	ld8	loc3=[loc1],XSI_IIM_OFS-XSI_IFA_OFS	// load XEN.ifa
  12.569 +	ld8	loc4=[loc2],XSI_IIPA_OFS-XSI_ISR_OFS	// load XEN.isr
  12.570 +	add	loc5=TF_IFA,in0
  12.571 +	add	loc6=TF_ISR,in0
  12.572 +	;;
  12.573 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.574 +	mux1	loc3=loc3,@rev; mux1 loc4=loc4,@rev;;
  12.575 +#endif
  12.576 +	st8	[loc5]=loc3,TF_IIM-TF_IFA	// store cr.ifa
  12.577 +	st8	[loc6]=loc4			// store cr.isr
  12.578 +	;;
  12.579 +	ld8	loc3=[loc1]			// load XEN.iim
  12.580 +	;;
  12.581 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.582 +	mux1	loc3=loc3,@rev;;
  12.583 +#endif
  12.584 +	st8	[loc5]=loc3			// store cr.iim
  12.585 +	;;
  12.586 +	mov	ar.pfs=loc0
  12.587 +	;;
  12.588 +	br.ret.sptk.few rp
  12.589 +END(save_special_regs)
  12.590 +
  12.591 +
  12.592 +ENTRY(hypervisor_callback)
  12.593 +		// Calculate the stack address for storing.
  12.594 +		// Use the kernel stack here because it's mapped wired!
  12.595 +		// -> no nested tlb faults!
  12.596 +	movl	r18=kstack+KSTACK_PAGES * PAGE_SIZE - 16 - TF_SIZE
  12.597 +
  12.598 +	//add	r18=-TF_SIZE,sp
  12.599 +	add	r30=0xabab,r0
  12.600 +	;;
  12.601 +{	.mib
  12.602 +	nop	0x02
  12.603 +	mov	r16=ip		// for jump back from save_tf_rse_switch
  12.604 +	br.sptk	save_tf_rse_switch
  12.605 +	;;
  12.606 +}
  12.607 +	add	sp=-16,r18		// the new stack
  12.608 +	alloc	r15=ar.pfs,0,0,1,0	// 1 out for do_trap_error
  12.609 +	;;
  12.610 +	mov	out0=r18		// the trap frame
  12.611 +	movl	r22=XSI_PSR_IC
  12.612 +	mov	r23=1;;
  12.613 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.614 +	mux1	r23=r23,@rev;;
  12.615 +#endif
  12.616 +	st8	[r22]=r23		// ssm psr.ic
  12.617 +	;;
  12.618 +	br.call.sptk.few rp = do_hypervisor_callback
  12.619 +
  12.620 +	movl	r22=XSI_PSR_IC
  12.621 +	;;
  12.622 +	st4	[r22]=r0		// rsm psr.ic
  12.623 +
  12.624 +	add	r16=16,sp		// load EF-pointer again
  12.625 +	;;
  12.626 +	//mov	r18=sp
  12.627 +	movl	r18=kstack+KSTACK_PAGES * PAGE_SIZE - 16 - TF_SIZE
  12.628 +	;;
  12.629 +
  12.630 +			// must have r18-efp, calls rfi at the end.
  12.631 +	br.sptk	restore_tf_rse_switch
  12.632 +	;;
  12.633 +END(hypervisor_callback)
  12.634 +
  12.635 +	/*
  12.636 +	 * In: r30 - trap number
  12.637 +	 */
  12.638 +ENTRY(trap_error)
  12.639 +		// Calculate the stack address for storing.
  12.640 +	add	r18=-TF_SIZE,sp
  12.641 +	;;
  12.642 +	add	r20=TF_TRAP_NUM,r18
  12.643 +	;;
  12.644 +	st2	[r20]=r30	// save trap number
  12.645 +	;;
  12.646 +
  12.647 +{	.mib
  12.648 +	nop	0x02
  12.649 +	mov	r16=ip		// for jumping back from save_tf_rse_switch
  12.650 +		// Used register: r16, r18, r19, r20, r21, r22 of bank 0
  12.651 +	br.sptk	save_tf_rse_switch
  12.652 +	;;
  12.653 +}
  12.654 +
  12.655 +	alloc	r15=ar.pfs,0,0,1,0	// 1 out for do_trap_error
  12.656 +	;;
  12.657 +	mov	out0=r18		// the trap frame
  12.658 +	add	sp=-16,r18		// C-call abi
  12.659 +	;;
  12.660 +
  12.661 +	//bsw.1
  12.662 +	movl r30=XSI_BANKNUM
  12.663 +	mov r31=1;;
  12.664 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.665 +	mux1	r31=r31,@rev;;
  12.666 +#endif
  12.667 +	st4 [r30]=r31;;
  12.668 +
  12.669 +		/* Save extra interrupt registers to the trap frame. */
  12.670 +	br.call.sptk.few rp = save_special_regs
  12.671 +	;;
  12.672 +
  12.673 +	movl	r22=XSI_PSR_IC
  12.674 +	movl	r23=XSI_PSR_I_ADDR
  12.675 +	;;
  12.676 +	ld8	r23=[r23]
  12.677 +	mov	r25=1
  12.678 +	;;
  12.679 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.680 +	mux1	r25=r25,@rev; mux1 r23=r23,@rev;;
  12.681 +#endif
  12.682 +	st4	[r22]=r25		// ssm psr.ic
  12.683 +	st1	[r23]=r0		// ssm psr.i
  12.684 +	;;
  12.685 +
  12.686 +	br.call.sptk.few rp = do_trap_error
  12.687 +	;;
  12.688 +		// --> currently not reached!!!
  12.689 +	movl r23=XSI_PSR_I_ADDR
  12.690 +	movl r22=XSI_PSR_IC
  12.691 +	;;
  12.692 +	ld8 r23=[r23]
  12.693 +	mov r25=1
  12.694 +	;;
  12.695 +#if defined(BIG_ENDIAN)			// swap because mini-os is in BE
  12.696 +	mux1	r25=r25,@rev;;
  12.697 +	mux1	r25=r25,@rev; mux1 r23=r23,@rev;;
  12.698 +#endif
  12.699 +	st1 [r23]=r25
  12.700 +	st4 [r22]=r0            // note: clears both vpsr.i and vpsr.ic!
  12.701 +	;;
  12.702 +	bsw.0
  12.703 +	;;
  12.704 +	add	r18=16,sp		// load EF-pointer again
  12.705 +	;;
  12.706 +	mov	sp=r18
  12.707 +			// must have r18-efp, calls rfi at the end.
  12.708 +	br.sptk	restore_tf_rse_switch
  12.709 +	;;
  12.710 +END(trap_error)
  12.711 +
  12.712 +
  12.713 +/*
  12.714 + * The trap handler stuff.
  12.715 + */
  12.716 +
  12.717 +#define TRAP_ERR(num)			\
  12.718 +	mov	r30 = num;		\
  12.719 +	;;		;		\
  12.720 +	br.sptk	trap_error		\
  12.721 +	;;
  12.722 +
  12.723 +#define	IVT_ENTRY(name, offset)			\
  12.724 +	.org	ia64_trap_table + offset;	\
  12.725 +	.global	hivt_##name;			\
  12.726 +	.proc	hivt_##name;			\
  12.727 +	.prologue;				\
  12.728 +	.body;					\
  12.729 +hivt_##name:
  12.730 +
  12.731 +#define	IVT_END(name)				\
  12.732 +	.endp	hivt_##name;			\
  12.733 +	.align	0x100
  12.734 +
  12.735 +#define IVT_ERR(name, num, offset)		\
  12.736 +	IVT_ENTRY(name, offset);		\
  12.737 +	TRAP_ERR(num);				\
  12.738 +	IVT_END(name)
  12.739 +/*
  12.740 + * The IA64 Interrupt Vector Table (IVT) contains 20 slots with 64
  12.741 + * bundles per vector and 48 slots with 16 bundles per vector.
  12.742 + */
  12.743 +
  12.744 +	.section .text.hivt,"ax"
  12.745 +	.align	32768
  12.746 +	.global ia64_trap_table
  12.747 +	.size	ia64_trap_table, 32768
  12.748 +ia64_trap_table:
  12.749 +
  12.750 +IVT_ERR(VHPT_Translation, 0, 0x0)
  12.751 +IVT_ERR(Instruction_TLB, 1, 0x0400)
  12.752 +IVT_ERR(Data_TLB, 2, 0x0800)
  12.753 +IVT_ERR(Alternate_Instruction_TLB, 3, 0x0c00)
  12.754 +
  12.755 +
  12.756 +IVT_ENTRY(Alternate_Data_TLB, 0x1000)
  12.757 +	mov	r30=4			// trap number
  12.758 +	mov	r16=cr.ifa		// where did it happen
  12.759 +	mov	r31=pr			// save predicates
  12.760 +	;;
  12.761 +	extr.u	r17=r16,IA64_RR_IDX_POS,3	// get region number
  12.762 +	;;
  12.763 +	cmp.eq	p14,p15=7,r17
  12.764 +	;;
  12.765 +//(p14)	br.sptk adt_regf_addr		// Check for region 7 - phys addresses
  12.766 +//	;;
  12.767 +//	br.sptk	trap_error
  12.768 +//		// No return
  12.769 +//
  12.770 +//adt_regf_addr:
  12.771 +//	extr.u	r17=r16,60,4	// get region number
  12.772 +//	;;
  12.773 +//	cmp.eq	p14,p15=0xf,r17
  12.774 +//	;;
  12.775 +(p14)	br.sptk adt_reg7_addr		// Check for region 7 - phys addresses
  12.776 +	;;
  12.777 +	br.sptk	trap_error
  12.778 +
  12.779 +adt_reg7_addr:
  12.780 +	/*
  12.781 +	 * region 7 addresses are only directly mapped physically
  12.782 +	 * addresses. Currently I don't do a check.
  12.783 +	 */
  12.784 +	movl	r20=~((7 << IA64_RR_IDX_POS) | 0xfff)
  12.785 +	movl	r18=((PTE_PS_16K<<IA64_ITIR_PS)|(0<<IA64_ITIR_KEY))
  12.786 +	;;
  12.787 +	movl	r19=	((1<<PTE_OFF_P) | (PTE_MA_WB<<PTE_OFF_MA) | \
  12.788 +			 (1<<PTE_OFF_A) | (1<<PTE_OFF_D) | \
  12.789 +			 (PTE_PL_KERN<<PTE_OFF_PL) | (PTE_AR_RW<<PTE_OFF_AR))
  12.790 +			// clear the region bits and 0-11
  12.791 +			// extract the pfn from the ifa
  12.792 +	mov	cr.itir=r18
  12.793 +	and	r20=r20, r16
  12.794 +	;;
  12.795 +	or	r20=r20,r19		// put pfn into pte
  12.796 +	;;
  12.797 +	mov	pr=r31,-1		// restore predicates
  12.798 +	itc.d	r20
  12.799 +	;;
  12.800 +	XEN_HYPER_RFI;
  12.801 +	;;
  12.802 +
  12.803 +IVT_END(Alternate_Data_TLB)
  12.804 +
  12.805 +
  12.806 +IVT_ERR(Data_Nested_TLB, 5, 0x1400)
  12.807 +IVT_ERR(Instruction_Key_Miss, 6, 0x1800)
  12.808 +IVT_ERR(Data_Key_Miss, 7, 0x1c00)
  12.809 +IVT_ERR(Dirty_Bit, 8, 0x2000)
  12.810 +IVT_ERR(Instruction_Access_Bit, 9, 0x2400)
  12.811 +IVT_ERR(Data_Access_Bit, 10, 0x2800)
  12.812 +IVT_ERR(Break_Instruction, 11, 0x2c00)
  12.813 +IVT_ERR(External_Interrupt, 12, 0x3000)
  12.814 +IVT_ERR(Reserved_3400, 13, 0x3400)
  12.815 +IVT_ERR(Reserved_3800, 14, 0x3800)
  12.816 +IVT_ERR(Reserved_3c00, 15, 0x3c00)
  12.817 +IVT_ERR(Reserved_4000, 16, 0x4000)
  12.818 +IVT_ERR(Reserved_4400, 17, 0x4400)
  12.819 +IVT_ERR(Reserved_4800, 18, 0x4800)
  12.820 +IVT_ERR(Reserved_4c00, 19, 0x4c00)
  12.821 +IVT_ERR(Page_Not_Present, 20, 0x5000)
  12.822 +IVT_ERR(Key_Permission, 21, 0x5100)
  12.823 +IVT_ERR(Instruction_Access_Rights, 22, 0x5200)
  12.824 +IVT_ERR(Data_Access_Rights, 23, 0x5300)
  12.825 +IVT_ERR(General_Exception, 24, 0x5400)
  12.826 +IVT_ERR(Disabled_FP_Register, 25, 0x5500)
  12.827 +IVT_ERR(NaT_Consumption, 26, 0x5600)
  12.828 +IVT_ERR(Speculation, 27, 0x5700)
  12.829 +IVT_ERR(Reserved_5800, 28, 0x5800)
  12.830 +IVT_ERR(Debug, 29, 0x5900)
  12.831 +IVT_ERR(Unaligned_Reference, 30, 0x5a00)
  12.832 +IVT_ERR(Unsupported_Data_Reference, 31, 0x5b00)
  12.833 +IVT_ERR(Floating_Point_Fault, 32, 0x5c00)
  12.834 +IVT_ERR(Floating_Point_Trap, 33, 0x5d00)
  12.835 +IVT_ERR(Lower_Privilege_Transfer_Trap, 34, 0x5e00)
  12.836 +IVT_ERR(Taken_Branch_Trap, 35, 0x5f00)
  12.837 +IVT_ERR(Single_Step_Trap, 36, 0x6000)
  12.838 +IVT_ERR(Reserved_6100, 37, 0x6100)
  12.839 +IVT_ERR(Reserved_6200, 38, 0x6200)
  12.840 +IVT_ERR(Reserved_6300, 39, 0x6300)
  12.841 +IVT_ERR(Reserved_6400, 40, 0x6400)
  12.842 +IVT_ERR(Reserved_6500, 41, 0x6500)
  12.843 +IVT_ERR(Reserved_6600, 42, 0x6600)
  12.844 +IVT_ERR(Reserved_6700, 43, 0x6700)
  12.845 +IVT_ERR(Reserved_6800, 44, 0x6800)
  12.846 +IVT_ERR(IA_32_Exception, 45, 0x6900)
  12.847 +IVT_ERR(IA_32_Intercept, 46, 0x6a00)
  12.848 +IVT_ERR(IA_32_Interrupt, 47, 0x6b00)
  12.849 +IVT_ERR(Reserved_6c00, 48, 0x6c00)
  12.850 +IVT_ERR(Reserved_6d00, 49, 0x6d00)
  12.851 +IVT_ERR(Reserved_6e00, 50, 0x6e00)
  12.852 +IVT_ERR(Reserved_6f00, 51, 0x6f00)
  12.853 +IVT_ERR(Reserved_7000, 52, 0x7000)
  12.854 +IVT_ERR(Reserved_7100, 53, 0x7100)
  12.855 +IVT_ERR(Reserved_7200, 54, 0x7200)
  12.856 +IVT_ERR(Reserved_7300, 55, 0x7300)
  12.857 +IVT_ERR(Reserved_7400, 56, 0x7400)
  12.858 +IVT_ERR(Reserved_7500, 57, 0x7500)
  12.859 +IVT_ERR(Reserved_7600, 58, 0x7600)
  12.860 +IVT_ERR(Reserved_7700, 59, 0x7700)
  12.861 +IVT_ERR(Reserved_7800, 60, 0x7800)
  12.862 +IVT_ERR(Reserved_7900, 61, 0x7900)
  12.863 +IVT_ERR(Reserved_7a00, 62, 0x7a00)
  12.864 +IVT_ERR(Reserved_7b00, 63, 0x7b00)
  12.865 +IVT_ERR(Reserved_7c00, 64, 0x7c00)
  12.866 +IVT_ERR(Reserved_7d00, 65, 0x7d00)
  12.867 +IVT_ERR(Reserved_7e00, 66, 0x7e00)
  12.868 +IVT_ERR(Reserved_7f00, 67, 0x7f00)
    13.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    13.2 +++ b/extras/mini-os/arch/ia64/minios-ia64.lds	Thu Feb 15 13:13:36 2007 -0700
    13.3 @@ -0,0 +1,54 @@
    13.4 +OUTPUT_FORMAT("elf64-ia64-little")
    13.5 +OUTPUT_ARCH(ia64)
    13.6 +
    13.7 +ENTRY(phys_start)
    13.8 +
    13.9 +PHDRS
   13.10 +{
   13.11 +  code PT_LOAD;
   13.12 +  data PT_LOAD;
   13.13 +}
   13.14 +
   13.15 +SECTIONS
   13.16 +{
   13.17 +
   13.18 +  phys_start = _start - (((5<<(61))+0x100000000) - (1 << 20));
   13.19 +
   13.20 +  code : { } :code
   13.21 +  . = ((5<<(61))+0x100000000);
   13.22 +
   13.23 +  _text = .;
   13.24 +
   13.25 +  .text : AT(ADDR(.text) - (((5<<(61))+0x100000000) - (1 << 20)))
   13.26 +  {
   13.27 +    *(.text)
   13.28 +  }
   13.29 +
   13.30 +  _etext = .;
   13.31 +
   13.32 +  data : { } :data
   13.33 +  .data : AT(ADDR(.data) - (((5<<(61))+0x100000000) - (1 << 20)))
   13.34 +  { *(.data) 
   13.35 +  }
   13.36 +
   13.37 +  .sdata : AT(ADDR(.sdata) - (((5<<(61))+0x100000000) - (1 << 20)))
   13.38 +        { *(.sdata) *(.sdata1) *(.srdata) }
   13.39 +
   13.40 +  .rodata : AT(ADDR(.rodata) - (((5<<(61))+0x100000000) - (1 << 20)))
   13.41 +  { *(.rodata) }
   13.42 +
   13.43 +  .rodata.str1.8 : AT(ADDR(.rodata.str1.8) - (((5<<(61))+0x100000000) - (1 << 20)))
   13.44 +  { *(.rodata.str1.8) }
   13.45 +
   13.46 +  .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - (((5<<(61))+0x100000000) - (1 << 20)))
   13.47 +  { *(.IA_64.unwind_info) }
   13.48 +
   13.49 +  .IA_64.unwind : AT(ADDR(.IA_64.unwind) - (((5<<(61))+0x100000000) - (1 << 20)))
   13.50 +  { *(.IA_64.unwind) }
   13.51 +
   13.52 +  .bss : AT(ADDR(.bss) - (((5<<(61))+0x100000000) - (1 << 20)))
   13.53 +  { *(.bss) }
   13.54 +
   13.55 +  _end = .;
   13.56 +
   13.57 +}
    14.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    14.2 +++ b/extras/mini-os/arch/ia64/mm.c	Thu Feb 15 13:13:36 2007 -0700
    14.3 @@ -0,0 +1,132 @@
    14.4 +/*
    14.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    14.6 + *
    14.7 + * Description: Special ia64 memory management.
    14.8 + * Parts are taken from FreeBSD.
    14.9 + *
   14.10 + ****************************************************************************
   14.11 + *
   14.12 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   14.13 + * of this software and associated documentation files (the "Software"), to
   14.14 + * deal in the Software without restriction, including without limitation the
   14.15 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   14.16 + * sell copies of the Software, and to permit persons to whom the Software is
   14.17 + * furnished to do so, subject to the following conditions:
   14.18 + * 
   14.19 + * The above copyright notice and this permission notice shall be included in
   14.20 + * all copies or substantial portions of the Software.
   14.21 + * 
   14.22 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   14.23 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   14.24 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   14.25 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   14.26 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   14.27 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   14.28 + * DEALINGS IN THE SOFTWARE.
   14.29 + */
   14.30 +
   14.31 +
   14.32 +#include "os.h"
   14.33 +#include "mm.h"
   14.34 +
   14.35 +
   14.36 +#define MAX_MEM_AREA	5
   14.37 +paddr_t phys_avail[MAX_MEM_AREA * 2];
   14.38 +int	phys_avail_cnt;
   14.39 +uint64_t physmem;
   14.40 +
   14.41 +/*
   14.42 + * These variables are defined in the linker script minios_ia64.lds
   14.43 + * to get the size of the kernel.
   14.44 + */
   14.45 +extern uint64_t _text[], _etext[], _end[], kstack[], phys_start[];
   14.46 +
   14.47 +uint64_t kernstart, kernend, kernsize, kernpstart, kernpend;
   14.48 +
   14.49 +/* Print the available memory chunks. */
   14.50 +static void
   14.51 +print_phys_avail(void)
   14.52 +{
   14.53 +	int i;
   14.54 +
   14.55 +	printk("Physical memory chunk(s):\n");
   14.56 +	for (i = 0; phys_avail[i + 1] != 0; i += 2) {
   14.57 +		int size = phys_avail[i + 1] - phys_avail[i];
   14.58 +		printk("0x%08lx - 0x%08lx, %d bytes (%d pages)\n",
   14.59 +			phys_avail[i], phys_avail[i + 1] - 1,
   14.60 +			size, size / PAGE_SIZE);
   14.61 +	}
   14.62 +}
   14.63 +
   14.64 +void
   14.65 +arch_init_mm(unsigned long* start_pfn_p, unsigned long* max_pfn_p)
   14.66 +{
   14.67 +	uint64_t ms, me;
   14.68 +	int i, j;
   14.69 +	uint64_t m, n;
   14.70 +
   14.71 +	kernstart = trunc_page(_text);
   14.72 +	kernend  = roundup_page(_end);
   14.73 +
   14.74 +	kernpstart = trunc_page(ia64_tpa(kernstart));
   14.75 +	kernpend = roundup_page(kernpstart + (kernend - kernstart));
   14.76 +	kernsize = kernpend - kernpstart;
   14.77 +
   14.78 +	ms = roundup_page(machineFwG.mach_mem_start);
   14.79 +	me = trunc_page(machineFwG.mach_mem_start+machineFwG.mach_mem_size);
   14.80 +	memset((void*)phys_avail, 0, sizeof(phys_avail));
   14.81 +	/* 1. Check where the kernel lies in physical memory. */
   14.82 +	physmem = me - ms;
   14.83 +	if ((ms <= kernpend) && (kernpstart <= me)) {
   14.84 +		if (ms < kernpstart) {	/* There is a part before the kernel. */
   14.85 +			PRINT_BV("  Found chunk before kernel: 0x%lx - 0x%lx\n",
   14.86 +				 ms, kernpstart);
   14.87 +			phys_avail[phys_avail_cnt] = ms;
   14.88 +			phys_avail[phys_avail_cnt+1] = kernpstart;
   14.89 +			phys_avail_cnt += 2;
   14.90 +		}
   14.91 +		if (kernpend < me) {	/* There is a part behind the kernel. */
   14.92 +			PRINT_BV("  Found chunk behind kernel: 0x%lx - 0x%lx\n",
   14.93 +				 kernpend, me);
   14.94 +			phys_avail[phys_avail_cnt] = kernpend;
   14.95 +			phys_avail[phys_avail_cnt+1] = me;
   14.96 +			phys_avail_cnt += 2;
   14.97 +		}
   14.98 +	} else {	/* One big chunk */
   14.99 +		PRINT_BV("  Found big chunk: 0x%lx - 0x%lx\n", ms, me);
  14.100 +		phys_avail[phys_avail_cnt] = ms;
  14.101 +		phys_avail[phys_avail_cnt + 1] = me;
  14.102 +		phys_avail_cnt += 2;
  14.103 +	}
  14.104 +	phys_avail[phys_avail_cnt] = 0;
  14.105 +
  14.106 +	print_phys_avail();
  14.107 +	/*
  14.108 +	 * In this first version I only look for the biggest mem area.
  14.109 +	 */
  14.110 +	for (i = j = m = n = 0; i < phys_avail_cnt; i += 2) {
  14.111 +		n = page_to_pfn(phys_avail[i + 1]) - page_to_pfn(phys_avail[i]);
  14.112 +		if (n > m) {
  14.113 +			m = n;
  14.114 +			j = i;
  14.115 +		}
  14.116 +	}
  14.117 +	*start_pfn_p = page_to_pfn(phys_avail[j]);
  14.118 +	*max_pfn_p   = page_to_pfn(phys_avail[j +1 ]);
  14.119 +}
  14.120 +
  14.121 +/* Currently only a dummy function. */
  14.122 +void
  14.123 +arch_init_demand_mapping_area(unsigned long max_pfn)
  14.124 +{
  14.125 +	max_pfn = max_pfn;
  14.126 +}
  14.127 +
  14.128 +/* Helper function used in gnttab.c. */
  14.129 +void*
  14.130 +map_frames(unsigned long* frames, unsigned long n)
  14.131 +{
  14.132 +	n = n;
  14.133 +	return (void*) __va(frames[0] << PAGE_SHIFT);
  14.134 +}
  14.135 +
    15.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    15.2 +++ b/extras/mini-os/arch/ia64/sal.c	Thu Feb 15 13:13:36 2007 -0700
    15.3 @@ -0,0 +1,103 @@
    15.4 +/*
    15.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    15.6 + * Mostly taken from FreeBSD.
    15.7 + *
    15.8 + ****************************************************************************
    15.9 + *
   15.10 + * Redistribution and use in source and binary forms, with or without
   15.11 + * modification, are permitted provided that the following conditions
   15.12 + * are met:
   15.13 + * 1. Redistributions of source code must retain the above copyright
   15.14 + *    notice, this list of conditions and the following disclaimer.
   15.15 + * 2. Redistributions in binary form must reproduce the above copyright
   15.16 + *    notice, this list of conditions and the following disclaimer in the
   15.17 + *    documentation and/or other materials provided with the distribution.
   15.18 + *
   15.19 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   15.20 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   15.21 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   15.22 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   15.23 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   15.24 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   15.25 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   15.26 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   15.27 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   15.28 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   15.29 + * SUCH DAMAGE.
   15.30 + *
   15.31 + */
   15.32 +
   15.33 +#include "os.h"
   15.34 +#include "lib.h"
   15.35 +#include "console.h"
   15.36 +#include "page.h"
   15.37 +
   15.38 +
   15.39 +static struct ia64_fdesc sal_fdesc;
   15.40 +uint64_t ia64_pal_entry;	/* PAL_PROC entrypoint */
   15.41 +
   15.42 +
   15.43 +struct ia64_sal_result
   15.44 +ia64_sal_call(uint64_t a1, uint64_t a2, uint64_t a3, uint64_t a4,
   15.45 +	      uint64_t a5, uint64_t a6, uint64_t a7, uint64_t a8)
   15.46 +{
   15.47 +	return ia64_sal_entry(a1, a2, a3, a4, a5, a6, a7, a8);
   15.48 +}
   15.49 +
   15.50 +static struct ia64_sal_result
   15.51 +fake_sal(uint64_t a1, uint64_t a2, uint64_t a3, uint64_t a4,
   15.52 +	 uint64_t a5, uint64_t a6, uint64_t a7, uint64_t a8)
   15.53 +{
   15.54 +	struct ia64_sal_result res;
   15.55 +	res.sal_status = -3;
   15.56 +	res.sal_result[0] = 0;
   15.57 +	res.sal_result[1] = 0;
   15.58 +	res.sal_result[2] = 0;
   15.59 +	return res;
   15.60 +}
   15.61 +
   15.62 +/*
   15.63 + * Currently only the SAL_DESC_ENTRYPOINT is checked to get
   15.64 + * the entry points the pal and sal functions.
   15.65 + */
   15.66 +void
   15.67 +ia64_sal_init(struct sal_system_table *saltab)
   15.68 +{
   15.69 +	static int sizes[6] = { 48, 32, 16, 32, 16, 16 };
   15.70 +	uint8_t *p;
   15.71 +	int i;
   15.72 +
   15.73 +	PRINT_BV("Reading SALtable:\n");
   15.74 +	ia64_sal_entry = fake_sal;
   15.75 +
   15.76 +	if (memcmp((void*)(uint64_t)(saltab->sal_signature), SAL_SIGNATURE, 4))
   15.77 +	{
   15.78 +		printk("Bad signature for SAL System Table\n");
   15.79 +		return;
   15.80 +	}
   15.81 +	p = (uint8_t *) (saltab + 1);
   15.82 +	for (i = 0; i < SWAP(saltab->sal_entry_count); i++) {
   15.83 +		switch (SWAP(*p)) {
   15.84 +		case SAL_DESC_ENTRYPOINT:		// 0
   15.85 +		{
   15.86 +			struct sal_entrypoint_descriptor *dp;
   15.87 +
   15.88 +			dp = (struct sal_entrypoint_descriptor*)p;
   15.89 +			ia64_pal_entry =
   15.90 +				IA64_PHYS_TO_RR7(SWAP(dp->sale_pal_proc));
   15.91 +			PRINT_BV("  PAL Proc at 0x%lx\n", ia64_pal_entry);
   15.92 +			sal_fdesc.func =
   15.93 +				IA64_PHYS_TO_RR7(SWAP(dp->sale_sal_proc));
   15.94 +			sal_fdesc.gp = IA64_PHYS_TO_RR7(SWAP(dp->sale_sal_gp));
   15.95 +			PRINT_BV("  SAL Proc at 0x%lx, GP at 0x%lx\n",
   15.96 +				 sal_fdesc.func, sal_fdesc.gp);
   15.97 +			ia64_sal_entry = (sal_entry_t *) &sal_fdesc;
   15.98 +			break;
   15.99 +		}
  15.100 +		default:
  15.101 +			break;
  15.102 +		}
  15.103 +		p += sizes[*p];
  15.104 +	}
  15.105 +}
  15.106 +
    16.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    16.2 +++ b/extras/mini-os/arch/ia64/sched.c	Thu Feb 15 13:13:36 2007 -0700
    16.3 @@ -0,0 +1,74 @@
    16.4 +/* 
    16.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com
    16.6 + *
    16.7 + * Description: ia64 specific part of the scheduler for mini-os
    16.8 + *
    16.9 + ****************************************************************************
   16.10 + *
   16.11 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   16.12 + * of this software and associated documentation files (the "Software"), to
   16.13 + * deal in the Software without restriction, including without limitation the
   16.14 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   16.15 + * sell copies of the Software, and to permit persons to whom the Software is
   16.16 + * furnished to do so, subject to the following conditions:
   16.17 + * 
   16.18 + * The above copyright notice and this permission notice shall be included in
   16.19 + * all copies or substantial portions of the Software.
   16.20 + * 
   16.21 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   16.22 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   16.23 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   16.24 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   16.25 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   16.26 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   16.27 + * DEALINGS IN THE SOFTWARE.
   16.28 + */
   16.29 +
   16.30 +
   16.31 +#include "types.h"
   16.32 +#include "sched.h"
   16.33 +#include "lib.h"
   16.34 +#include "xmalloc.h"
   16.35 +#include "mm.h"
   16.36 +
   16.37 +/* The function is implemented in fw.S */
   16.38 +extern void thread_starter(void);
   16.39 +
   16.40 +struct thread*
   16.41 +arch_create_thread(char *name, void (*function)(void *), void *data)
   16.42 +{
   16.43 +	struct thread* _thread;
   16.44 +
   16.45 +	_thread = (struct thread*)_xmalloc(sizeof(struct thread), 16);
   16.46 +	/* Allocate 2 pages for stack, stack will be 2pages aligned */
   16.47 +	_thread->stack = (char *)alloc_pages(1);
   16.48 +	_thread->name = name;
   16.49 +	memset((void*)&(_thread->regs), 0, sizeof(_thread->regs));
   16.50 +	_thread->regs.sp = ((uint64_t)_thread->stack) + 2 * PAGE_SIZE - 16;
   16.51 +	_thread->regs.bsp = ((uint64_t)_thread->stack) + 0x10;
   16.52 +	_thread->regs.rp = FDESC_FUNC(thread_starter);
   16.53 +	_thread->regs.pfs = 0x82;
   16.54 +	_thread->regs.r4 = FDESC_FUNC(function);
   16.55 +	_thread->regs.r6 = (uint64_t)data;
   16.56 +	return _thread;
   16.57 +}
   16.58 +
   16.59 +extern void restore_context(struct thread*);
   16.60 +extern int switch_context(struct thread*, struct thread*);
   16.61 +
   16.62 +void
   16.63 +arch_switch_threads(struct thread* prev, struct thread* next)
   16.64 +{
   16.65 +	ia64_set_r13((uint64_t)next);
   16.66 +	switch_context(prev, next);
   16.67 +}
   16.68 +
   16.69 +/* Everything initialised, start idle thread */
   16.70 +void
   16.71 +run_idle_thread(void)
   16.72 +{
   16.73 +	//do_busy_loop();
   16.74 +	ia64_set_r13((uint64_t)idle_thread);
   16.75 +	restore_context(idle_thread);
   16.76 +	printk("%s: restore_context() returned - bad!\n", __func__);
   16.77 +}
    17.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    17.2 +++ b/extras/mini-os/arch/ia64/time.c	Thu Feb 15 13:13:36 2007 -0700
    17.3 @@ -0,0 +1,280 @@
    17.4 +/* 
    17.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    17.6 + * Description: simple ia64 specific time handling
    17.7 + * mktime() is taken from Linux (see copyright below)
    17.8 + * Parts are taken from FreeBSD.
    17.9 + *
   17.10 + ****************************************************************************
   17.11 + * For the copy of the mktime() from linux.
   17.12 + * This program is free software; you can redistribute it and/or modify
   17.13 + * it under the terms of the GNU General Public License as published by
   17.14 + * the Free Software Foundation; either version 2 of the License, or
   17.15 + * (at your option) any later version.
   17.16 + *
   17.17 + * This program is distributed in the hope that it will be useful,
   17.18 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
   17.19 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   17.20 + * GNU General Public License for more details.
   17.21 + *
   17.22 + * You should have received a copy of the GNU General Public License
   17.23 + * along with this program; if not, write to the Free Software
   17.24 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
   17.25 + *
   17.26 + ****************************************************************************
   17.27 + *
   17.28 + * Redistribution and use in source and binary forms, with or without
   17.29 + * modification, are permitted provided that the following conditions
   17.30 + * are met:
   17.31 + * 1. Redistributions of source code must retain the above copyright
   17.32 + *    notice, this list of conditions and the following disclaimer.
   17.33 + * 2. Redistributions in binary form must reproduce the above copyright
   17.34 + *    notice, this list of conditions and the following disclaimer in the
   17.35 + *    documentation and/or other materials provided with the distribution.
   17.36 + *
   17.37 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   17.38 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   17.39 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   17.40 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   17.41 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   17.42 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   17.43 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   17.44 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   17.45 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   17.46 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   17.47 + * SUCH DAMAGE.
   17.48 + */
   17.49 +
   17.50 +#include "os.h"
   17.51 +#include "console.h"
   17.52 +#include "time.h"
   17.53 +#include "efi.h"
   17.54 +#include "events.h"
   17.55 +
   17.56 +struct timespec os_time;
   17.57 +static uint64_t itc_alt;		/* itc on last update. */
   17.58 +static uint64_t itc_at_boot;		/* itc on boot */
   17.59 +static uint64_t itc_frequency;
   17.60 +static uint64_t processor_frequency;
   17.61 +static uint64_t itm_val;
   17.62 +
   17.63 +
   17.64 +/*
   17.65 + * mktime() is take from Linux. See copyright above.
   17.66 + * Converts Gregorian date to seconds since 1970-01-01 00:00:00.
   17.67 + * Assumes input in normal date format, i.e. 1980-12-31 23:59:59
   17.68 + * => year=1980, mon=12, day=31, hour=23, min=59, sec=59.
   17.69 + *
   17.70 + * [For the Julian calendar (which was used in Russia before 1917,
   17.71 + * Britain & colonies before 1752, anywhere else before 1582,
   17.72 + * and is still in use by some communities) leave out the
   17.73 + * -year/100+year/400 terms, and add 10.]
   17.74 + *
   17.75 + * This algorithm was first published by Gauss (I think).
   17.76 + *
   17.77 + * WARNING: this function will overflow on 2106-02-07 06:28:16 on
   17.78 + * machines were long is 32-bit! (However, as time_t is signed, we
   17.79 + * will already get problems at other places on 2038-01-19 03:14:08)
   17.80 + */
   17.81 +static unsigned long
   17.82 +mktime(const unsigned int year0, const unsigned int mon0,
   17.83 +       const unsigned int day, const unsigned int hour,
   17.84 +       const unsigned int min, const unsigned int sec)
   17.85 +{
   17.86 +	unsigned int mon = mon0, year = year0;
   17.87 +
   17.88 +	/* 1..12 -> 11,12,1..10 */
   17.89 +	if (0 >= (int) (mon -= 2)) {
   17.90 +		mon += 12;	/* Puts Feb last since it has leap day */
   17.91 +		year -= 1;
   17.92 +	}
   17.93 +
   17.94 +	return (
   17.95 +		(
   17.96 +		 ((unsigned long)
   17.97 +		  (year/4 - year/100 + year/400 + 367*mon/12 + day) +
   17.98 +		   year*365 - 719499
   17.99 +		 ) * 24 + hour /* now have hours */
  17.100 +		) * 60 + min /* now have minutes */
  17.101 +	       ) * 60 + sec; /* finally seconds */
  17.102 +}
  17.103 +
  17.104 +static inline uint64_t
  17.105 +ns_from_cycles(uint64_t cycles)
  17.106 +{
  17.107 +	return (cycles * (1000000000 / itc_frequency));
  17.108 +}
  17.109 +
  17.110 +static inline uint64_t
  17.111 +ns_to_cycles(uint64_t ns)
  17.112 +{
  17.113 +	return (ns * (itc_frequency / 1000000000));
  17.114 +}
  17.115 +
  17.116 +/*
  17.117 + * Block the domain until until(nanoseconds) is over.
  17.118 + * If block is called no timerinterrupts are delivered from xen!
  17.119 + */
  17.120 +void
  17.121 +block_domain(s_time_t until)
  17.122 +{
  17.123 +	struct ia64_pal_result pal_res;
  17.124 +	uint64_t c, new;
  17.125 +
  17.126 +	c = ns_to_cycles(until);
  17.127 +	new = ia64_get_itc() + c - NOW();
  17.128 +	ia64_set_itm(new);		/* Reload cr.itm */
  17.129 +	/*
  17.130 +	 * PAL_HALT_LIGHT returns on every external interrupt,
  17.131 +	 * including timer interrupts.
  17.132 +	 */
  17.133 +	pal_res = ia64_call_pal_static(PAL_HALT_LIGHT, 0, 0, 0);
  17.134 +	if (pal_res.pal_status != 0)
  17.135 +		printk("%s: PAL_HALT_LIGHT returns an error\n");
  17.136 +	/* Reload the normal timer interrupt match. */
  17.137 +	new = ia64_get_itc() + itm_val;
  17.138 +	ia64_set_itm(new);
  17.139 +}
  17.140 +
  17.141 +static void
  17.142 +calculate_time(void)
  17.143 +{
  17.144 +	uint64_t itc_new, new;
  17.145 +
  17.146 +	itc_new = ia64_get_itc();
  17.147 +	if (itc_new < itc_alt)
  17.148 +		new = ~0 - itc_alt + itc_new;
  17.149 +	else
  17.150 +		new = itc_new - itc_alt;
  17.151 +	itc_alt = itc_new;
  17.152 +	new = ns_from_cycles(new);
  17.153 +	os_time.ts_nsec += new;
  17.154 +	if (os_time.ts_nsec > 1000000000) {	/* On overflow. */
  17.155 +		os_time.ts_sec++;
  17.156 +		os_time.ts_nsec -= 1000000000;
  17.157 +	}
  17.158 +}
  17.159 +
  17.160 +void
  17.161 +timer_interrupt(evtchn_port_t port, struct pt_regs* regsP, void *data)
  17.162 +{
  17.163 +	uint64_t new;
  17.164 +
  17.165 +	calculate_time();
  17.166 +	new = ia64_get_itc() + itm_val;
  17.167 +	ia64_set_itm(new);
  17.168 +}
  17.169 +
  17.170 +/*
  17.171 + * monotonic_clock(): returns # of nanoseconds passed since time_init()
  17.172 + */
  17.173 +u64
  17.174 +monotonic_clock(void)
  17.175 +{
  17.176 +	uint64_t delta;
  17.177 +
  17.178 +	delta = ia64_get_itc() - itc_at_boot;
  17.179 +	delta = ns_from_cycles(delta);
  17.180 +	return delta;
  17.181 +}
  17.182 +
  17.183 +void
  17.184 +gettimeofday(struct timeval *tv)
  17.185 +{
  17.186 +	calculate_time();
  17.187 +	tv->tv_sec = os_time.ts_sec;			/* seconds */
  17.188 +	tv->tv_usec = NSEC_TO_USEC(os_time.ts_nsec);	/* microseconds */
  17.189 +};
  17.190 +
  17.191 +/*
  17.192 + * Read the clock frequencies from pal and sal for calculating
  17.193 + * the clock interrupt.
  17.194 + */
  17.195 +static void
  17.196 +calculate_frequencies(void)
  17.197 +{
  17.198 +	struct ia64_sal_result sal_res;
  17.199 +	struct ia64_pal_result pal_res;
  17.200 +
  17.201 +	pal_res = ia64_call_pal_static(PAL_FREQ_RATIOS, 0, 0, 0);
  17.202 +	//sal_res = ia64_sal_call(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0);
  17.203 +#if defined(BIG_ENDIAN)
  17.204 +//#warning calculate_frequencies TODO
  17.205 +	/*
  17.206 +	 * I have to do an own function with switching psr.be!
  17.207 +	 * Currently it's running because it's a break into the hypervisor
  17.208 +	 * behind the call.!
  17.209 +	 */
  17.210 +#endif
  17.211 +	sal_res = ia64_sal_entry(SAL_FREQ_BASE, 0, 0, 0, 0, 0, 0, 0);
  17.212 +
  17.213 +	if (sal_res.sal_status == 0 && pal_res.pal_status == 0) {
  17.214 +		processor_frequency =
  17.215 +			sal_res.sal_result[0] * (pal_res.pal_result[0] >> 32)
  17.216 +				/ (pal_res.pal_result[0] & ((1L << 32) - 1));
  17.217 +		itc_frequency =
  17.218 +			sal_res.sal_result[0] * (pal_res.pal_result[2] >> 32)
  17.219 +				/ (pal_res.pal_result[2] & ((1L << 32) - 1));
  17.220 +		PRINT_BV("Reading clock frequencies:\n");
  17.221 +		PRINT_BV("  Platform clock frequency %ld Hz\n",
  17.222 +			       sal_res.sal_result[0]);
  17.223 +		PRINT_BV("  Processor ratio %ld/%ld, Bus ratio %ld/%ld, "
  17.224 +			       "  ITC ratio %ld/%ld\n",
  17.225 +			       pal_res.pal_result[0] >> 32,
  17.226 +			       pal_res.pal_result[0] & ((1L << 32) - 1),
  17.227 +			       pal_res.pal_result[1] >> 32,
  17.228 +			       pal_res.pal_result[1] & ((1L << 32) - 1),
  17.229 +			       pal_res.pal_result[2] >> 32,
  17.230 +			       pal_res.pal_result[2] & ((1L << 32) - 1));
  17.231 +
  17.232 +		printk("  ITC frequency %ld\n", itc_frequency);
  17.233 +	} else {
  17.234 +		itc_frequency = 1000000000;
  17.235 +		processor_frequency = 0;
  17.236 +		printk("Reading clock frequencies failed!!! Using: %ld\n",
  17.237 +		       itc_frequency);
  17.238 +	}
  17.239 +}
  17.240 +
  17.241 +
  17.242 +//#define HZ 1
  17.243 +#define HZ 1000		// 1000 clock ticks per sec
  17.244 +#define IA64_TIMER_VECTOR 0xef
  17.245 +
  17.246 +void
  17.247 +init_time(void)
  17.248 +{
  17.249 +	uint64_t new;
  17.250 +	efi_time_t tm;
  17.251 +	int err = 0;
  17.252 +
  17.253 +	printk("Initialising time\n");
  17.254 +	calculate_frequencies();
  17.255 +
  17.256 +	itm_val = (itc_frequency + HZ/2) / HZ;
  17.257 +	printk("  itm_val: %ld\n", itm_val);
  17.258 +
  17.259 +	os_time.ts_sec = 0;
  17.260 +	os_time.ts_nsec = 0;
  17.261 +
  17.262 +	if (efi_get_time(&tm)) {
  17.263 +		printk("  EFI-Time: %d.%d.%d   %d:%d:%d\n", tm.Day,
  17.264 +		       tm.Month, tm.Year, tm.Hour, tm.Minute, tm.Second);
  17.265 +		os_time.ts_sec = mktime(SWAP(tm.Year), SWAP(tm.Month),
  17.266 +					SWAP(tm.Day), SWAP(tm.Hour),
  17.267 +					SWAP(tm.Minute), SWAP(tm.Second));
  17.268 +		os_time.ts_nsec = tm.Nanosecond;
  17.269 +	} else
  17.270 +		printk("efi_get_time() failed\n");
  17.271 +
  17.272 +	err = bind_virq(VIRQ_ITC, timer_interrupt, NULL);
  17.273 +	if (err != 0) {
  17.274 +		printk("XEN timer request chn bind failed %i\n", err);
  17.275 +		return;
  17.276 +	}
  17.277 +	itc_alt = ia64_get_itc();
  17.278 +	itc_at_boot = itc_alt;
  17.279 +	new = ia64_get_itc() + itm_val;
  17.280 +	ia64_set_itv(IA64_TIMER_VECTOR);
  17.281 +	ia64_set_itm(new);
  17.282 +	ia64_srlz_d();
  17.283 +}
    18.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    18.2 +++ b/extras/mini-os/arch/ia64/xencomm.c	Thu Feb 15 13:13:36 2007 -0700
    18.3 @@ -0,0 +1,256 @@
    18.4 +/*
    18.5 + * Copyright (C) 2006 Hollis Blanchard <hollisb@us.ibm.com>, IBM Corporation
    18.6 + * Tristan Gingold <tristan.gingold@bull.net>
    18.7 + *
    18.8 + * This program is free software; you can redistribute it and/or modify
    18.9 + * it under the terms of the GNU General Public License as published by
   18.10 + * the Free Software Foundation; either version 2 of the License, or
   18.11 + * (at your option) any later version.
   18.12 + * 
   18.13 + * This program is distributed in the hope that it will be useful,
   18.14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
   18.15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   18.16 + * GNU General Public License for more details.
   18.17 + * 
   18.18 + * You should have received a copy of the GNU General Public License
   18.19 + * along with this program; if not, write to the Free Software
   18.20 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
   18.21 + */
   18.22 +
   18.23 +/*
   18.24 + * This code is mostly taken from ia64-xen files xcom_mini.c and xencomm.c.
   18.25 + * Changes: Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com
   18.26 + */
   18.27 +
   18.28 +
   18.29 +#include <os.h>
   18.30 +#include <hypervisor.h>
   18.31 +#include <xen/xencomm.h>
   18.32 +#include <xen/grant_table.h>
   18.33 +
   18.34 +
   18.35 +#define XENCOMM_MINI_ADDRS 3
   18.36 +struct xencomm_mini
   18.37 +{
   18.38 +	struct xencomm_desc _desc;
   18.39 +	uint64_t address[XENCOMM_MINI_ADDRS];
   18.40 +};
   18.41 +
   18.42 +#define xen_guest_handle(hnd)  ((hnd).p)
   18.43 +
   18.44 +
   18.45 +/* Translate virtual address to physical address.  */
   18.46 +uint64_t
   18.47 +xencomm_vaddr_to_paddr(uint64_t vaddr)
   18.48 +{
   18.49 +	if (IA64_RR_EXTR(vaddr) == 5)
   18.50 +		return KERN_VIRT_2_PHYS(vaddr);
   18.51 +
   18.52 +	if (IA64_RR_EXTR(vaddr) == 7)
   18.53 +		return __pa(vaddr);
   18.54 +
   18.55 +	return 0;
   18.56 +}
   18.57 +
   18.58 +#define min(a,b) (((a) < (b)) ? (a) : (b))
   18.59 +static int
   18.60 +xencomm_init_desc(struct xencomm_desc *desc, void *buffer, unsigned long bytes)
   18.61 +{
   18.62 +	unsigned long recorded = 0;
   18.63 +	int i = 0;
   18.64 +
   18.65 +	if ((buffer == NULL) && (bytes > 0))
   18.66 +		BUG();
   18.67 +
   18.68 +	/* record the physical pages used */
   18.69 +	if (buffer == NULL)
   18.70 +		desc->nr_addrs = 0;
   18.71 +
   18.72 +	while ((recorded < bytes) && (i < desc->nr_addrs)) {
   18.73 +		unsigned long vaddr = (unsigned long)buffer + recorded;
   18.74 +		unsigned long paddr;
   18.75 +		int offset;
   18.76 +		int chunksz;
   18.77 +
   18.78 +		offset = vaddr % PAGE_SIZE; /* handle partial pages */
   18.79 +		chunksz = min(PAGE_SIZE - offset, bytes - recorded);
   18.80 +
   18.81 +		paddr = xencomm_vaddr_to_paddr(vaddr);
   18.82 +		if (paddr == ~0UL) {
   18.83 +			printk("%s: couldn't translate vaddr %lx\n",
   18.84 +			       __func__, vaddr);
   18.85 +			return -EINVAL;
   18.86 +		}
   18.87 +
   18.88 +		desc->address[i++] = SWAP(paddr);
   18.89 +		recorded += chunksz;
   18.90 +	}
   18.91 +	if (recorded < bytes) {
   18.92 +		printk("%s: could only translate %ld of %ld bytes\n",
   18.93 +		       __func__, recorded, bytes);
   18.94 +		return -ENOSPC;
   18.95 +	}
   18.96 +
   18.97 +	/* mark remaining addresses invalid (just for safety) */
   18.98 +	while (i < desc->nr_addrs)
   18.99 +		desc->address[i++] = SWAP(XENCOMM_INVALID);
  18.100 +	desc->magic = SWAP(XENCOMM_MAGIC);
  18.101 +	return 0;
  18.102 +}
  18.103 +
  18.104 +static void *
  18.105 +xencomm_alloc_mini(struct xencomm_mini *area, int *nbr_area)
  18.106 +{
  18.107 +	unsigned long base;
  18.108 +	unsigned int pageoffset;
  18.109 +
  18.110 +	while (*nbr_area >= 0) {
  18.111 +		/* Allocate an area.  */
  18.112 +		(*nbr_area)--;
  18.113 +
  18.114 +		base = (unsigned long)(area + *nbr_area);
  18.115 +		pageoffset = base % PAGE_SIZE; 
  18.116 +
  18.117 +		/* If the area does not cross a page, use it.  */
  18.118 +		if ((PAGE_SIZE - pageoffset) >= sizeof(struct xencomm_mini))
  18.119 +			return &area[*nbr_area];
  18.120 +	}
  18.121 +	/* No more area.  */
  18.122 +	return NULL;
  18.123 +}
  18.124 +
  18.125 +int
  18.126 +xencomm_create_mini(struct xencomm_mini *area, int *nbr_area,
  18.127 +                    void *buffer, unsigned long bytes,
  18.128 +                    struct xencomm_handle **ret)
  18.129 +{
  18.130 +	struct xencomm_desc *desc;
  18.131 +	int rc;
  18.132 +	unsigned long res;
  18.133 +
  18.134 +	desc = xencomm_alloc_mini(area, nbr_area);
  18.135 +	if (!desc)
  18.136 +		return -ENOMEM;
  18.137 +	desc->nr_addrs = XENCOMM_MINI_ADDRS;
  18.138 +
  18.139 +	rc = xencomm_init_desc(desc, buffer, bytes);
  18.140 +	if (rc)
  18.141 +		return rc;
  18.142 +
  18.143 +	res = xencomm_vaddr_to_paddr((unsigned long)desc);
  18.144 +	if (res == ~0UL)
  18.145 +		return -EINVAL;
  18.146 +
  18.147 +	*ret = (struct xencomm_handle*)res;
  18.148 +	return 0;
  18.149 +}
  18.150 +
  18.151 +static int
  18.152 +xencommize_mini_grant_table_op(struct xencomm_mini *xc_area, int *nbr_area,
  18.153 +                               unsigned int cmd, void *op, unsigned int count,
  18.154 +                               struct xencomm_handle **desc)
  18.155 +{
  18.156 +	struct xencomm_handle *desc1;
  18.157 +	unsigned int argsize=0;
  18.158 +	int rc;
  18.159 +
  18.160 +	switch (cmd) {
  18.161 +	case GNTTABOP_map_grant_ref:
  18.162 +		argsize = sizeof(struct gnttab_map_grant_ref);
  18.163 +		break;
  18.164 +	case GNTTABOP_unmap_grant_ref:
  18.165 +		argsize = sizeof(struct gnttab_unmap_grant_ref);
  18.166 +		break;
  18.167 +	case GNTTABOP_setup_table:
  18.168 +	{
  18.169 +		struct gnttab_setup_table *setup = op;
  18.170 +
  18.171 +		argsize = sizeof(*setup);
  18.172 +
  18.173 +		if (count != 1)
  18.174 +			return -EINVAL;
  18.175 +		rc = xencomm_create_mini
  18.176 +		        (xc_area, nbr_area,
  18.177 +		         xen_guest_handle(setup->frame_list),
  18.178 +		         setup->nr_frames
  18.179 +		         * sizeof(*xen_guest_handle(setup->frame_list)),
  18.180 +		         &desc1);
  18.181 +		if (rc)
  18.182 +			return rc;
  18.183 +		set_xen_guest_handle(setup->frame_list, (void *)desc1);
  18.184 +		break;
  18.185 +	}
  18.186 +	case GNTTABOP_dump_table:
  18.187 +		argsize = sizeof(struct gnttab_dump_table);
  18.188 +		break;
  18.189 +	case GNTTABOP_transfer:
  18.190 +		argsize = sizeof(struct gnttab_transfer);
  18.191 +		break;
  18.192 +	case GNTTABOP_copy:
  18.193 +		argsize = sizeof(struct gnttab_copy);
  18.194 +		break;
  18.195 +	default:
  18.196 +		printk("%s: unknown mini grant table op %d\n", __func__, cmd);
  18.197 +		BUG();
  18.198 +	}
  18.199 +
  18.200 +	rc = xencomm_create_mini(xc_area, nbr_area, op, count * argsize, desc);
  18.201 +
  18.202 +	return rc;
  18.203 +}
  18.204 +
  18.205 +int
  18.206 +xencomm_mini_hypercall_grant_table_op(unsigned int cmd, void *op,
  18.207 +                                      unsigned int count)
  18.208 +{
  18.209 +	int rc;
  18.210 +	struct xencomm_handle *desc;
  18.211 +	int nbr_area = 2;
  18.212 +	struct xencomm_mini xc_area[2];
  18.213 +
  18.214 +	rc = xencommize_mini_grant_table_op(xc_area, &nbr_area,
  18.215 +					    cmd, op, count, &desc);
  18.216 +	if (rc)
  18.217 +		return rc;
  18.218 +	return xencomm_arch_hypercall_grant_table_op(cmd, desc, count);
  18.219 +}
  18.220 +
  18.221 +static void
  18.222 +gnttab_map_grant_ref_pre(struct gnttab_map_grant_ref *uop)
  18.223 +{
  18.224 +	uint32_t flags;
  18.225 +
  18.226 +	flags = uop->flags;
  18.227 +
  18.228 +	if (flags & GNTMAP_host_map) {
  18.229 +		if (flags & GNTMAP_application_map) {
  18.230 +			printk("GNTMAP_application_map is not supported yet: "
  18.231 +			       "flags 0x%x\n", flags);
  18.232 +			BUG();
  18.233 +		}
  18.234 +		if (flags & GNTMAP_contains_pte) {
  18.235 +			printk("GNTMAP_contains_pte is not supported yet flags "
  18.236 +			       "0x%x\n", flags);
  18.237 +			BUG();
  18.238 +		}
  18.239 +	} else if (flags & GNTMAP_device_map) {
  18.240 +		printk("GNTMAP_device_map is not supported yet 0x%x\n", flags);
  18.241 +		BUG();//XXX not yet. actually this flag is not used.
  18.242 +	} else {
  18.243 +		BUG();
  18.244 +	}
  18.245 +}
  18.246 +
  18.247 +int
  18.248 +HYPERVISOR_grant_table_op(unsigned int cmd, void *uop, unsigned int count)
  18.249 +{
  18.250 +	if (cmd == GNTTABOP_map_grant_ref) {
  18.251 +		unsigned int i;
  18.252 +		for (i = 0; i < count; i++) {
  18.253 +			gnttab_map_grant_ref_pre(
  18.254 +			        (struct gnttab_map_grant_ref*)uop + i);
  18.255 +		}
  18.256 +	}
  18.257 +	return xencomm_mini_hypercall_grant_table_op(cmd, uop, count);
  18.258 +}
  18.259 +
    19.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    19.2 +++ b/extras/mini-os/include/ia64/arch_mm.h	Thu Feb 15 13:13:36 2007 -0700
    19.3 @@ -0,0 +1,36 @@
    19.4 +/*
    19.5 + * Copyright (C) 2007 - Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    19.6 + *
    19.7 + ****************************************************************************
    19.8 + * Permission is hereby granted, free of charge, to any person obtaining a copy
    19.9 + * of this software and associated documentation files (the "Software"), to
   19.10 + * deal in the Software without restriction, including without limitation the
   19.11 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   19.12 + * sell copies of the Software, and to permit persons to whom the Software is
   19.13 + * furnished to do so, subject to the following conditions:
   19.14 + * 
   19.15 + * The above copyright notice and this permission notice shall be included in
   19.16 + * all copies or substantial portions of the Software.
   19.17 + * 
   19.18 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   19.19 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   19.20 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   19.21 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   19.22 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   19.23 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   19.24 + * DEALINGS IN THE SOFTWARE.
   19.25 + */
   19.26 +
   19.27 +#ifndef __ARCH_MM_H__
   19.28 +#define __ARCH_MM_H__
   19.29 +
   19.30 +#include "page.h"
   19.31 +
   19.32 +#define PFN_PHYS(x)	(pfn_to_page(x))
   19.33 +#define PHYS_PFN(x)	(page_to_pfn(x))
   19.34 +#define to_virt(x)	__va(x)
   19.35 +#define to_phys(x)	__pa(x)
   19.36 +
   19.37 +#define virt_to_mfn(x)	virt_to_pfn(x)
   19.38 +
   19.39 +#endif /* __ARCH_MM_H__ */
    20.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    20.2 +++ b/extras/mini-os/include/ia64/arch_sched.h	Thu Feb 15 13:13:36 2007 -0700
    20.3 @@ -0,0 +1,91 @@
    20.4 +/*
    20.5 + * Copyright (c) 2006 Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    20.6 + * All rights reserved.
    20.7 + *
    20.8 + * The file contains ia64 specific scheduler declarations.
    20.9 + *
   20.10 + ****************************************************************************
   20.11 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   20.12 + * of this software and associated documentation files (the "Software"), to
   20.13 + * deal in the Software without restriction, including without limitation the
   20.14 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   20.15 + * sell copies of the Software, and to permit persons to whom the Software is
   20.16 + * furnished to do so, subject to the following conditions:
   20.17 + * 
   20.18 + * The above copyright notice and this permission notice shall be included in
   20.19 + * all copies or substantial portions of the Software.
   20.20 + * 
   20.21 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   20.22 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   20.23 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   20.24 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   20.25 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   20.26 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   20.27 + * DEALINGS IN THE SOFTWARE.
   20.28 + */
   20.29 +
   20.30 +#ifndef __ARCH_SCHED_H__
   20.31 +#define __ARCH_SCHED_H__
   20.32 +
   20.33 +#include "os.h"
   20.34 +
   20.35 +struct thread;				/* Only declaration */
   20.36 +
   20.37 +struct thread_regs
   20.38 +{
   20.39 +	unsigned long	unat_b;		/* NaT before spilling */
   20.40 +	unsigned long	sp;
   20.41 +	unsigned long	rp;
   20.42 +	unsigned long	pr;
   20.43 +	unsigned long	bsp;
   20.44 +	unsigned long	pfs;
   20.45 +	unsigned long	rnat;
   20.46 +	unsigned long	lc;
   20.47 +
   20.48 +	unsigned long	unat_a;		/* NaT after spilling. */
   20.49 +	unsigned long	r4;
   20.50 +	unsigned long	r5;
   20.51 +	unsigned long	r6;
   20.52 +	unsigned long	r7;
   20.53 +
   20.54 +	unsigned long	b1;
   20.55 +	unsigned long	b2;
   20.56 +	unsigned long	b3;
   20.57 +	unsigned long	b4;
   20.58 +	unsigned long	b5;
   20.59 +
   20.60 +	ia64_fpreg_t	f2;
   20.61 +	ia64_fpreg_t	f3;
   20.62 +	ia64_fpreg_t	f4;
   20.63 +	ia64_fpreg_t	f5;
   20.64 +	ia64_fpreg_t	f16;
   20.65 +	ia64_fpreg_t	f17;
   20.66 +	ia64_fpreg_t	f18;
   20.67 +	ia64_fpreg_t	f19;
   20.68 +	ia64_fpreg_t	f20;
   20.69 +	ia64_fpreg_t	f21;
   20.70 +	ia64_fpreg_t	f22;
   20.71 +	ia64_fpreg_t	f23;
   20.72 +	ia64_fpreg_t	f24;
   20.73 +	ia64_fpreg_t	f25;
   20.74 +	ia64_fpreg_t	f26;
   20.75 +	ia64_fpreg_t	f27;
   20.76 +	ia64_fpreg_t	f28;
   20.77 +	ia64_fpreg_t	f29;
   20.78 +	ia64_fpreg_t	f30;
   20.79 +	ia64_fpreg_t	f31;
   20.80 +};
   20.81 +
   20.82 +typedef struct thread_regs thread_regs_t;
   20.83 +
   20.84 +void arch_switch_threads(struct thread* prev, struct thread* next);
   20.85 +
   20.86 +static inline struct thread* get_current(void)
   20.87 +{
   20.88 +	struct thread *current;
   20.89 +	__asm ("mov %0=r13" : "=r" (current));
   20.90 +	return current;
   20.91 +}
   20.92 +
   20.93 +
   20.94 +#endif /* __ARCH_SCHED_H__ */
    21.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    21.2 +++ b/extras/mini-os/include/ia64/arch_spinlock.h	Thu Feb 15 13:13:36 2007 -0700
    21.3 @@ -0,0 +1,61 @@
    21.4 +/*
    21.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com
    21.6 + * The file contains ia64 special spinlock stuff.
    21.7 + *
    21.8 + ****************************************************************************
    21.9 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   21.10 + * of this software and associated documentation files (the "Software"), to
   21.11 + * deal in the Software without restriction, including without limitation the
   21.12 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   21.13 + * sell copies of the Software, and to permit persons to whom the Software is
   21.14 + * furnished to do so, subject to the following conditions:
   21.15 + * 
   21.16 + * The above copyright notice and this permission notice shall be included in
   21.17 + * all copies or substantial portions of the Software.
   21.18 + * 
   21.19 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   21.20 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   21.21 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   21.22 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   21.23 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   21.24 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   21.25 + * DEALINGS IN THE SOFTWARE.
   21.26 + */
   21.27 +
   21.28 +#ifndef _ARCH_SPINLOCK_H_
   21.29 +#define _ARCH_SPINLOCK_H_
   21.30 +
   21.31 +#include "atomic.h"
   21.32 +
   21.33 +#define ARCH_SPIN_LOCK_UNLOCKED (spinlock_t) { 0 }
   21.34 +
   21.35 +#define SPIN_LOCK_UNUSED	0
   21.36 +#define SPIN_LOCK_USED		1
   21.37 +
   21.38 +
   21.39 +static inline void
   21.40 +_raw_spin_lock(spinlock_t* lck)
   21.41 +{
   21.42 +	uint32_t ret;
   21.43 +	do {
   21.44 +		ret = ia64_cmpxchg_acq_32(&(lck->slock),
   21.45 +					  SPIN_LOCK_UNUSED, SPIN_LOCK_USED);
   21.46 +	} while (ret == SPIN_LOCK_USED);
   21.47 +}
   21.48 +
   21.49 +static inline void
   21.50 +_raw_spin_unlock(spinlock_t *lck)
   21.51 +{
   21.52 +	asm volatile ("st4.rel.nta [%0] = r0\n\t" :: "r"(&(lck->slock))
   21.53 +							: "memory" );
   21.54 +}
   21.55 +
   21.56 +static inline uint32_t
   21.57 +_raw_spin_trylock(spinlock_t* lck)
   21.58 +{
   21.59 +	uint32_t ret;
   21.60 +	ret = ia64_cmpxchg_acq_32(&(lck->slock), SPIN_LOCK_USED, SPIN_LOCK_USED);
   21.61 +	return (ret == SPIN_LOCK_USED);
   21.62 +}
   21.63 +
   21.64 +#endif /* _ARCH_SPINLOCK_H_ */
    22.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    22.2 +++ b/extras/mini-os/include/ia64/asm.h	Thu Feb 15 13:13:36 2007 -0700
    22.3 @@ -0,0 +1,18 @@
    22.4 +/*
    22.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com
    22.6 + */
    22.7 +
    22.8 +#if !defined(_ASM_H_)
    22.9 +#define _ASM_H_
   22.10 +
   22.11 +#define	ENTRY(_name_)				\
   22.12 +	.global	_name_;				\
   22.13 +	.align	16;				\
   22.14 +	.proc	_name_;				\
   22.15 +_name_:;					\
   22.16 +
   22.17 +
   22.18 +#define	END(_name_)						\
   22.19 +	.endp	_name_
   22.20 +
   22.21 +#endif /* !defined(_ASM_H_) */
    23.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    23.2 +++ b/extras/mini-os/include/ia64/atomic.h	Thu Feb 15 13:13:36 2007 -0700
    23.3 @@ -0,0 +1,508 @@
    23.4 +/*
    23.5 + * This code is mostly taken from FreeBSD machine/atomic.h
    23.6 + * Changes: Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    23.7 + *
    23.8 + ****************************************************************************
    23.9 + * Copyright (c) 1998 Doug Rabson
   23.10 + * All rights reserved.
   23.11 + *
   23.12 + * Redistribution and use in source and binary forms, with or without
   23.13 + * modification, are permitted provided that the following conditions
   23.14 + * are met:
   23.15 + * 1. Redistributions of source code must retain the above copyright
   23.16 + *    notice, this list of conditions and the following disclaimer.
   23.17 + * 2. Redistributions in binary form must reproduce the above copyright
   23.18 + *    notice, this list of conditions and the following disclaimer in the
   23.19 + *    documentation and/or other materials provided with the distribution.
   23.20 + *
   23.21 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   23.22 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   23.23 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   23.24 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   23.25 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23.26 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   23.27 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23.28 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   23.29 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   23.30 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   23.31 + * SUCH DAMAGE.
   23.32 + */
   23.33 +
   23.34 +#ifndef _MACHINE_ATOMIC_H_
   23.35 +#define _MACHINE_ATOMIC_H_
   23.36 +
   23.37 +/*
   23.38 + * Various simple arithmetic on memory which is atomic in the presence
   23.39 + * of interrupts and SMP safe.
   23.40 + */
   23.41 +
   23.42 +#if !defined(__ASSEMBLY__)
   23.43 +
   23.44 +#include <types.h>
   23.45 +
   23.46 +
   23.47 +/*
   23.48 + * Everything is built out of cmpxchg.
   23.49 + */
   23.50 +#define IA64_CMPXCHG(sz, sem, p, cmpval, newval, ret)		\
   23.51 +	__asm __volatile (					\
   23.52 +		"mov ar.ccv=%2;;\n\t"				\
   23.53 +		"cmpxchg" #sz "." #sem " %0=%4,%3,ar.ccv\n\t"	\
   23.54 +		: "=r" (ret), "=m" (*p)				\
   23.55 +		: "r" (cmpval), "r" (newval), "m" (*p)		\
   23.56 +		: "memory")
   23.57 +
   23.58 +
   23.59 +/*
   23.60 + * Some common forms of cmpxch.
   23.61 + */
   23.62 +
   23.63 +static __inline uint8_t
   23.64 +ia64_cmpxchg_acq_8(volatile uint8_t* p, uint8_t cmpval, uint8_t newval)
   23.65 +{
   23.66 +	uint8_t ret;
   23.67 +
   23.68 +	IA64_CMPXCHG(1, acq, p, cmpval, newval, ret);
   23.69 +	return (ret);
   23.70 +}
   23.71 +
   23.72 +static __inline uint16_t
   23.73 +ia64_cmpxchg_acq_16(volatile uint16_t* p, uint16_t cmpval, uint16_t newval)
   23.74 +{
   23.75 +	uint16_t ret;
   23.76 +
   23.77 +	IA64_CMPXCHG(2, acq, p, cmpval, newval, ret);
   23.78 +	return (ret);
   23.79 +}
   23.80 +
   23.81 +static __inline uint32_t
   23.82 +ia64_cmpxchg_acq_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
   23.83 +{
   23.84 +	uint32_t ret;
   23.85 +
   23.86 +	IA64_CMPXCHG(4, acq, p, cmpval, newval, ret);
   23.87 +	return (ret);
   23.88 +}
   23.89 +
   23.90 +static __inline uint32_t
   23.91 +ia64_cmpxchg_rel_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
   23.92 +{
   23.93 +	uint32_t ret;
   23.94 +
   23.95 +	IA64_CMPXCHG(4, rel, p, cmpval, newval, ret);
   23.96 +	return (ret);
   23.97 +}
   23.98 +
   23.99 +static __inline uint64_t
  23.100 +ia64_cmpxchg_acq_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
  23.101 +{
  23.102 +	uint64_t ret;
  23.103 +
  23.104 +	IA64_CMPXCHG(8, acq, p, cmpval, newval, ret);
  23.105 +	return (ret);
  23.106 +}
  23.107 +
  23.108 +static __inline uint64_t
  23.109 +ia64_cmpxchg_rel_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
  23.110 +{
  23.111 +	uint64_t ret;
  23.112 +
  23.113 +	IA64_CMPXCHG(8, rel, p, cmpval, newval, ret);
  23.114 +	return (ret);
  23.115 +}
  23.116 +
  23.117 +#define ATOMIC_STORE_LOAD(type, width, size)			\
  23.118 +static __inline uint##width##_t				\
  23.119 +ia64_ld_acq_##width(volatile uint##width##_t* p)		\
  23.120 +{								\
  23.121 +	uint##width##_t v;					\
  23.122 +								\
  23.123 +	__asm __volatile ("ld" size ".acq %0=%1"		\
  23.124 +			  : "=r" (v)				\
  23.125 +			  : "m" (*p)				\
  23.126 +			  : "memory");				\
  23.127 +	return (v);						\
  23.128 +}								\
  23.129 +								\
  23.130 +static __inline uint##width##_t				\
  23.131 +atomic_load_acq_##width(volatile uint##width##_t* p)		\
  23.132 +{								\
  23.133 +	uint##width##_t v;					\
  23.134 +								\
  23.135 +	__asm __volatile ("ld" size ".acq %0=%1"		\
  23.136 +			  : "=r" (v)				\
  23.137 +			  : "m" (*p)				\
  23.138 +			  : "memory");				\
  23.139 +	return (v);						\
  23.140 +}								\
  23.141 +								\
  23.142 +static __inline uint##width##_t				\
  23.143 +atomic_load_acq_##type(volatile uint##width##_t* p)		\
  23.144 +{								\
  23.145 +	uint##width##_t v;					\
  23.146 +								\
  23.147 +	__asm __volatile ("ld" size ".acq %0=%1"		\
  23.148 +			  : "=r" (v)				\
  23.149 +			  : "m" (*p)				\
  23.150 +			  : "memory");				\
  23.151 +	return (v);						\
  23.152 +}								\
  23.153 +							       	\
  23.154 +static __inline void						\
  23.155 +ia64_st_rel_##width(volatile uint##width##_t* p, uint##width##_t v)\
  23.156 +{								\
  23.157 +	__asm __volatile ("st" size ".rel %0=%1"		\
  23.158 +			  : "=m" (*p)				\
  23.159 +			  : "r" (v)				\
  23.160 +			  : "memory");				\
  23.161 +}								\
  23.162 +							       	\
  23.163 +static __inline void						\
  23.164 +atomic_store_rel_##width(volatile uint##width##_t* p, uint##width##_t v)\
  23.165 +{								\
  23.166 +	__asm __volatile ("st" size ".rel %0=%1"		\
  23.167 +			  : "=m" (*p)				\
  23.168 +			  : "r" (v)				\
  23.169 +			  : "memory");				\
  23.170 +}								\
  23.171 +							       	\
  23.172 +static __inline void						\
  23.173 +atomic_store_rel_##type(volatile uint##width##_t* p, uint##width##_t v)\
  23.174 +{								\
  23.175 +	__asm __volatile ("st" size ".rel %0=%1"		\
  23.176 +			  : "=m" (*p)				\
  23.177 +			  : "r" (v)				\
  23.178 +			  : "memory");				\
  23.179 +}
  23.180 +
  23.181 +ATOMIC_STORE_LOAD(char, 8, "1")
  23.182 +ATOMIC_STORE_LOAD(short, 16, "2")
  23.183 +ATOMIC_STORE_LOAD(int, 32, "4")
  23.184 +ATOMIC_STORE_LOAD(long, 64, "8")
  23.185 +
  23.186 +#undef ATOMIC_STORE_LOAD
  23.187 +
  23.188 +#define IA64_ATOMIC(sz, type, name, width, op)			\
  23.189 +									\
  23.190 +static __inline type							\
  23.191 +atomic_##name##_acq_##width(volatile type *p, type v)		\
  23.192 +{									\
  23.193 +	type old, ret;							\
  23.194 +	do {								\
  23.195 +		old = *p;						\
  23.196 +		IA64_CMPXCHG(sz, acq, p, old, old op v, ret);	\
  23.197 +	} while (ret != old);						\
  23.198 +	return(ret);							\
  23.199 +}									\
  23.200 +									\
  23.201 +static __inline type							\
  23.202 +atomic_##name##_rel_##width(volatile type *p, type v)		\
  23.203 +{									\
  23.204 +	type old, ret;							\
  23.205 +	do {								\
  23.206 +		old = *p;						\
  23.207 +		IA64_CMPXCHG(sz, rel, p, old, old op v, ret);	\
  23.208 +	} while (ret != old);						\
  23.209 +	return(ret);							\
  23.210 +}
  23.211 +
  23.212 +IA64_ATOMIC(1, uint8_t,  set,	8,	|)
  23.213 +IA64_ATOMIC(2, uint16_t, set,	16,	|)
  23.214 +IA64_ATOMIC(4, uint32_t, set,	32,	|)
  23.215 +IA64_ATOMIC(8, uint64_t, set,	64,	|)
  23.216 +
  23.217 +IA64_ATOMIC(1, uint8_t,  clear,	8,	&~)
  23.218 +IA64_ATOMIC(2, uint16_t, clear,	16,	&~)
  23.219 +IA64_ATOMIC(4, uint32_t, clear,	32,	&~)
  23.220 +IA64_ATOMIC(8, uint64_t, clear,	64,	&~)
  23.221 +
  23.222 +IA64_ATOMIC(1, uint8_t,  add,	8,	+)
  23.223 +IA64_ATOMIC(2, uint16_t, add,	16,	+)
  23.224 +IA64_ATOMIC(4, uint32_t, add,	32,	+)
  23.225 +IA64_ATOMIC(8, uint64_t, add,	64,	+)
  23.226 +
  23.227 +IA64_ATOMIC(1, uint8_t,  subtract,	8,	-)
  23.228 +IA64_ATOMIC(2, uint16_t, subtract,	16,	-)
  23.229 +IA64_ATOMIC(4, uint32_t, subtract,	32,	-)
  23.230 +IA64_ATOMIC(8, uint64_t, subtract,	64,	-)
  23.231 +
  23.232 +#undef IA64_ATOMIC
  23.233 +#undef IA64_CMPXCHG
  23.234 +
  23.235 +#define atomic_set_8			atomic_set_acq_8
  23.236 +#define	atomic_clear_8			atomic_clear_acq_8
  23.237 +#define atomic_add_8			atomic_add_acq_8
  23.238 +#define	atomic_subtract_8		atomic_subtract_acq_8
  23.239 +
  23.240 +#define atomic_set_16			atomic_set_acq_16
  23.241 +#define	atomic_clear_16			atomic_clear_acq_16
  23.242 +#define atomic_add_16			atomic_add_acq_16
  23.243 +#define	atomic_subtract_16		atomic_subtract_acq_16
  23.244 +
  23.245 +#define atomic_set_32			atomic_set_acq_32
  23.246 +#define	atomic_clear_32			atomic_clear_acq_32
  23.247 +#define atomic_add_32			atomic_add_acq_32
  23.248 +#define	atomic_subtract_32		atomic_subtract_acq_32
  23.249 +
  23.250 +#define atomic_set_64			atomic_set_acq_64
  23.251 +#define	atomic_clear_64			atomic_clear_acq_64
  23.252 +#define atomic_add_64			atomic_add_acq_64
  23.253 +#define	atomic_subtract_64		atomic_subtract_acq_64
  23.254 +
  23.255 +#define atomic_set_char			atomic_set_8
  23.256 +#define atomic_clear_char		atomic_clear_8
  23.257 +#define atomic_add_char			atomic_add_8
  23.258 +#define atomic_subtract_char		atomic_subtract_8
  23.259 +#define atomic_set_acq_char		atomic_set_acq_8
  23.260 +#define atomic_clear_acq_char		atomic_clear_acq_8
  23.261 +#define atomic_add_acq_char		atomic_add_acq_8
  23.262 +#define atomic_subtract_acq_char	atomic_subtract_acq_8
  23.263 +#define atomic_set_rel_char		atomic_set_rel_8
  23.264 +#define atomic_clear_rel_char		atomic_clear_rel_8
  23.265 +#define atomic_add_rel_char		atomic_add_rel_8
  23.266 +#define atomic_subtract_rel_char	atomic_subtract_rel_8
  23.267 +
  23.268 +#define atomic_set_short		atomic_set_16
  23.269 +#define atomic_clear_short		atomic_clear_16
  23.270 +#define atomic_add_short		atomic_add_16
  23.271 +#define atomic_subtract_short		atomic_subtract_16
  23.272 +#define atomic_set_acq_short		atomic_set_acq_16
  23.273 +#define atomic_clear_acq_short		atomic_clear_acq_16
  23.274 +#define atomic_add_acq_short		atomic_add_acq_16
  23.275 +#define atomic_subtract_acq_short	atomic_subtract_acq_16
  23.276 +#define atomic_set_rel_short		atomic_set_rel_16
  23.277 +#define atomic_clear_rel_short		atomic_clear_rel_16
  23.278 +#define atomic_add_rel_short		atomic_add_rel_16
  23.279 +#define atomic_subtract_rel_short	atomic_subtract_rel_16
  23.280 +
  23.281 +#define atomic_set_int			atomic_set_32
  23.282 +#define atomic_clear_int		atomic_clear_32
  23.283 +#define atomic_add_int			atomic_add_32
  23.284 +#define atomic_subtract_int		atomic_subtract_32
  23.285 +#define atomic_set_acq_int		atomic_set_acq_32
  23.286 +#define atomic_clear_acq_int		atomic_clear_acq_32
  23.287 +#define atomic_add_acq_int		atomic_add_acq_32
  23.288 +#define atomic_subtract_acq_int		atomic_subtract_acq_32
  23.289 +#define atomic_set_rel_int		atomic_set_rel_32
  23.290 +#define atomic_clear_rel_int		atomic_clear_rel_32
  23.291 +#define atomic_add_rel_int		atomic_add_rel_32
  23.292 +#define atomic_subtract_rel_int		atomic_subtract_rel_32
  23.293 +
  23.294 +#define atomic_set_long			atomic_set_64
  23.295 +#define atomic_clear_long		atomic_clear_64
  23.296 +#define atomic_add_long			atomic_add_64
  23.297 +#define atomic_subtract_long		atomic_subtract_64
  23.298 +#define atomic_set_acq_long		atomic_set_acq_64
  23.299 +#define atomic_clear_acq_long		atomic_clear_acq_64
  23.300 +#define atomic_add_acq_long		atomic_add_acq_64
  23.301 +#define atomic_subtract_acq_long	atomic_subtract_acq_64
  23.302 +#define atomic_set_rel_long		atomic_set_rel_64
  23.303 +#define atomic_clear_rel_long		atomic_clear_rel_64
  23.304 +#define atomic_add_rel_long		atomic_add_rel_64
  23.305 +#define atomic_subtract_rel_long	atomic_subtract_rel_64
  23.306 +
  23.307 +/*
  23.308 + * Atomically compare the value stored at *p with cmpval and if the
  23.309 + * two values are equal, update the value of *p with newval. Returns
  23.310 + * zero if the compare failed, nonzero otherwise.
  23.311 + */
  23.312 +static __inline int
  23.313 +atomic_cmpset_acq_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
  23.314 +{
  23.315 +	return ia64_cmpxchg_acq_32(p, cmpval, newval) == cmpval;
  23.316 +}
  23.317 +
  23.318 +static __inline int
  23.319 +atomic_cmpset_rel_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval)
  23.320 +{
  23.321 +	return ia64_cmpxchg_rel_32(p, cmpval, newval) == cmpval;
  23.322 +}
  23.323 +
  23.324 +/*
  23.325 + * Atomically compare the value stored at *p with cmpval and if the
  23.326 + * two values are equal, update the value of *p with newval. Returns
  23.327 + * zero if the compare failed, nonzero otherwise.
  23.328 + */
  23.329 +static __inline int
  23.330 +atomic_cmpset_acq_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
  23.331 +{
  23.332 +	return ia64_cmpxchg_acq_64(p, cmpval, newval) == cmpval;
  23.333 +}
  23.334 +
  23.335 +static __inline int
  23.336 +atomic_cmpset_rel_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval)
  23.337 +{
  23.338 +	return ia64_cmpxchg_rel_64(p, cmpval, newval) == cmpval;
  23.339 +}
  23.340 +
  23.341 +#define atomic_cmpset_32		atomic_cmpset_acq_32
  23.342 +#define atomic_cmpset_64		atomic_cmpset_acq_64
  23.343 +#define	atomic_cmpset_int		atomic_cmpset_32
  23.344 +#define	atomic_cmpset_long		atomic_cmpset_64
  23.345 +#define atomic_cmpset_acq_int		atomic_cmpset_acq_32
  23.346 +#define atomic_cmpset_rel_int		atomic_cmpset_rel_32
  23.347 +#define atomic_cmpset_acq_long		atomic_cmpset_acq_64
  23.348 +#define atomic_cmpset_rel_long		atomic_cmpset_rel_64
  23.349 +
  23.350 +static __inline int
  23.351 +atomic_cmpset_acq_ptr(volatile void *dst, void *exp, void *src)
  23.352 +{
  23.353 +        return atomic_cmpset_acq_long((volatile u_long *)dst,
  23.354 +				      (u_long)exp, (u_long)src);
  23.355 +}
  23.356 +
  23.357 +static __inline int
  23.358 +atomic_cmpset_rel_ptr(volatile void *dst, void *exp, void *src)
  23.359 +{
  23.360 +        return atomic_cmpset_rel_long((volatile u_long *)dst,
  23.361 +				      (u_long)exp, (u_long)src);
  23.362 +}
  23.363 +
  23.364 +#define	atomic_cmpset_ptr	atomic_cmpset_acq_ptr
  23.365 +
  23.366 +static __inline void *
  23.367 +atomic_load_acq_ptr(volatile void *p)
  23.368 +{
  23.369 +	return (void *)atomic_load_acq_long((volatile u_long *)p);
  23.370 +}
  23.371 +
  23.372 +static __inline void
  23.373 +atomic_store_rel_ptr(volatile void *p, void *v)
  23.374 +{
  23.375 +	atomic_store_rel_long((volatile u_long *)p, (u_long)v);
  23.376 +}
  23.377 +
  23.378 +#define IA64_ATOMIC_PTR(NAME)				\
  23.379 +static __inline void					\
  23.380 +atomic_##NAME##_ptr(volatile void *p, uintptr_t v)	\
  23.381 +{							\
  23.382 +	atomic_##NAME##_long((volatile u_long *)p, v);	\
  23.383 +}							\
  23.384 +							\
  23.385 +static __inline void					\
  23.386 +atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v)	\
  23.387 +{							\
  23.388 +	atomic_##NAME##_acq_long((volatile u_long *)p, v);\
  23.389 +}							\
  23.390 +							\
  23.391 +static __inline void					\
  23.392 +atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v)	\
  23.393 +{							\
  23.394 +	atomic_##NAME##_rel_long((volatile u_long *)p, v);\
  23.395 +}
  23.396 +
  23.397 +IA64_ATOMIC_PTR(set)
  23.398 +IA64_ATOMIC_PTR(clear)
  23.399 +IA64_ATOMIC_PTR(add)
  23.400 +IA64_ATOMIC_PTR(subtract)
  23.401 +
  23.402 +#undef IA64_ATOMIC_PTR
  23.403 +
  23.404 +static __inline uint32_t
  23.405 +atomic_readandclear_32(volatile uint32_t* p)
  23.406 +{
  23.407 +	uint32_t val;
  23.408 +	do {
  23.409 +		val = *p;
  23.410 +	} while (!atomic_cmpset_32(p, val, 0));
  23.411 +	return val;
  23.412 +}
  23.413 +
  23.414 +static __inline uint64_t
  23.415 +atomic_readandclear_64(volatile uint64_t* p)
  23.416 +{
  23.417 +	uint64_t val;
  23.418 +	do {
  23.419 +		val = *p;
  23.420 +	} while (!atomic_cmpset_64(p, val, 0));
  23.421 +	return val;
  23.422 +}
  23.423 +
  23.424 +#define atomic_readandclear_int	atomic_readandclear_32
  23.425 +#define atomic_readandclear_long	atomic_readandclear_64
  23.426 +
  23.427 +
  23.428 +/* Some bit operations */
  23.429 +
  23.430 +static inline void
  23.431 +set_bit(int num, volatile void *addr)
  23.432 +{
  23.433 +	uint32_t bit, b, old, new;
  23.434 +	volatile uint32_t *p;
  23.435 +	p = (volatile uint32_t *) addr + (num >> 5);
  23.436 +	b = 1 << (num & 31);
  23.437 +	bit = SWAP(b);
  23.438 +	do
  23.439 +	{
  23.440 +		old = *p;
  23.441 +		new = old | bit;
  23.442 +	} while(ia64_cmpxchg_acq_32(p, old, new) != old);
  23.443 +}
  23.444 +
  23.445 +static __inline__ void
  23.446 +clear_bit(int num, volatile void *addr)
  23.447 +{
  23.448 +	uint32_t mask, m,  old, new;
  23.449 +	volatile uint32_t *p;
  23.450 +	p = (volatile uint32_t *) addr + (num >> 5);
  23.451 +	m = ~(1 << (num & 31));
  23.452 +	mask = SWAP(m);
  23.453 +	do {
  23.454 +		old = *p;
  23.455 +		new = old & mask;
  23.456 +	} while (ia64_cmpxchg_acq_32(p, old, new) != old);
  23.457 +}
  23.458 +
  23.459 +static __inline__ int
  23.460 +test_bit(int num, const volatile void *addr)
  23.461 +{
  23.462 +	uint32_t val = SWAP(1);
  23.463 +        return val & (((const volatile uint32_t *) addr)[num >> 5] >> (num & 31));
  23.464 +}
  23.465 +
  23.466 +/*
  23.467 + * test_and_set_bit - Set a bit and return its old value
  23.468 + * num: Bit to set
  23.469 + * addr: Address to count from
  23.470 + */
  23.471 +static inline int
  23.472 +test_and_set_bit (int num, volatile void *addr)
  23.473 +{
  23.474 +        uint32_t bit, b, old, new;
  23.475 +        volatile uint32_t *m;
  23.476 +
  23.477 +        m = (volatile uint32_t *) addr + (num >> 5);
  23.478 +        b = 1 << (num & 31);
  23.479 +        bit = SWAP(b);
  23.480 +        do {
  23.481 +                old = *m;
  23.482 +                new = old | bit;
  23.483 +        } while (ia64_cmpxchg_acq_32(m, old, new) != old);
  23.484 +        return (old & bit) != 0;
  23.485 +}
  23.486 +
  23.487 +/*
  23.488 + * test_and_clear_bit - Clear a bit and return its old value
  23.489 + * num: Bit to set
  23.490 + * addr: Address to count from
  23.491 + */
  23.492 +static
  23.493 +inline int test_and_clear_bit(int num, volatile unsigned long * addr)
  23.494 +{
  23.495 +        uint32_t bit, b, old, new;
  23.496 +        volatile uint32_t* a;
  23.497 +
  23.498 +        a = (volatile uint32_t *) addr + (num >> 5);
  23.499 +        b = ~(1 << (num & 31));
  23.500 +        bit = SWAP(b);
  23.501 +        do {
  23.502 +                old = *a;
  23.503 +                new = old & bit;
  23.504 +        } while (ia64_cmpxchg_acq_32(a, old, new) != old);
  23.505 +        return (old & ~bit) != 0;
  23.506 +}
  23.507 +
  23.508 +
  23.509 +#endif /* !defined(__ASSEMBLY__) */
  23.510 +
  23.511 +#endif /* ! _MACHINE_ATOMIC_H_ */
    24.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    24.2 +++ b/extras/mini-os/include/ia64/efi.h	Thu Feb 15 13:13:36 2007 -0700
    24.3 @@ -0,0 +1,396 @@
    24.4 +/*
    24.5 + * This is a short summary of declarations and definitions from different
    24.6 + * efi header files of Intels' EFI_Toolkit_1.10.14.62 
    24.7 + * used for the minimal implementation in mini-os.
    24.8 + * Changes: Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    24.9 + *
   24.10 + ****************************************************************************
   24.11 + * Copyright (C) 2001-2004, Intel Corporation.
   24.12 + * THIS SPECIFICATION IS PROVIDED "AS IS" WITH NO WARRANTIES WHATSOEVER,
   24.13 + * INCLUDING ANY WARRANTY OF MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR
   24.14 + * ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY
   24.15 + * PROPOSAL, SPECIFICATION OR SAMPLE. Except for a limited copyright license
   24.16 + * to copy this specification for internal use only, no license, express or
   24.17 + * implied, by estoppel or otherwise, to any intellectual property rights is
   24.18 + * granted herein.  Intel disclaims all liability, including liability for
   24.19 + * infringement of any proprietary rights, relating to implementation of
   24.20 + * information in this specification. Intel does not warrant or represent
   24.21 + * that such implementation(s) will not infringe such rights.  Designers must
   24.22 + * not rely on the absence or characteristics of any features or instructions
   24.23 + * marked "reserved" or "undefined." Intel reserves these for future
   24.24 + * definition and shall have no responsibility whatsoever for conflicts or
   24.25 + * incompatibilities arising from future changes to them.
   24.26 + * This document is an intermediate draft for comment only and is subject to
   24.27 + * change without notice. Readers should not design products based on this
   24.28 + * document.
   24.29 + * Intel, the Intel logo, and Itanium are trademarks or registered trademarks
   24.30 + * of Intel Corporation or its subsidiaries in the United States and other
   24.31 + * countries.
   24.32 + * Other names and brands may be claimed as the property of others.
   24.33 + */
   24.34 +
   24.35 +#ifndef _EFI_H_
   24.36 +#define _EFI_H_
   24.37 +
   24.38 +#include "types.h"
   24.39 +
   24.40 +
   24.41 +#define EFIWARN(a)                      (a)
   24.42 +#define EFI_ERROR(a)                    (((int64_t) a) < 0)
   24.43 +
   24.44 +
   24.45 +#define EFI_SUCCESS                     0
   24.46 +#define EFI_LOAD_ERROR                  EFIERR(1)
   24.47 +#define EFI_INVALID_PARAMETER           EFIERR(2)
   24.48 +#define EFI_UNSUPPORTED                 EFIERR(3)
   24.49 +#define EFI_BAD_BUFFER_SIZE             EFIERR(4)
   24.50 +#define EFI_BUFFER_TOO_SMALL            EFIERR(5)
   24.51 +#define EFI_NOT_READY                   EFIERR(6)
   24.52 +#define EFI_DEVICE_ERROR                EFIERR(7)
   24.53 +#define EFI_WRITE_PROTECTED             EFIERR(8)
   24.54 +#define EFI_OUT_OF_RESOURCES            EFIERR(9)
   24.55 +#define EFI_VOLUME_CORRUPTED            EFIERR(10)
   24.56 +#define EFI_VOLUME_FULL                 EFIERR(11)
   24.57 +#define EFI_NO_MEDIA                    EFIERR(12)
   24.58 +#define EFI_MEDIA_CHANGED               EFIERR(13)
   24.59 +#define EFI_NOT_FOUND                   EFIERR(14)
   24.60 +#define EFI_ACCESS_DENIED               EFIERR(15)
   24.61 +#define EFI_NO_RESPONSE                 EFIERR(16)
   24.62 +#define EFI_NO_MAPPING                  EFIERR(17)
   24.63 +#define EFI_TIMEOUT                     EFIERR(18)
   24.64 +#define EFI_NOT_STARTED                 EFIERR(19)
   24.65 +#define EFI_ALREADY_STARTED             EFIERR(20)
   24.66 +#define EFI_ABORTED                     EFIERR(21)
   24.67 +#define EFI_ICMP_ERROR                  EFIERR(22)
   24.68 +#define EFI_TFTP_ERROR                  EFIERR(23)
   24.69 +#define EFI_PROTOCOL_ERROR              EFIERR(24)
   24.70 +
   24.71 +#define EFI_WARN_UNKOWN_GLYPH           EFIWARN(1)
   24.72 +#define EFI_WARN_DELETE_FAILURE         EFIWARN(2)
   24.73 +#define EFI_WARN_WRITE_FAILURE          EFIWARN(3)
   24.74 +#define EFI_WARN_BUFFER_TOO_SMALL       EFIWARN(4)
   24.75 +
   24.76 +
   24.77 +typedef uint64_t	efi_status_t;
   24.78 +typedef void*		efi_handle_t;
   24.79 +typedef void*		efi_event_t;
   24.80 +typedef uint16_t	efi_char16_t;
   24.81 +
   24.82 +
   24.83 +/*
   24.84 + * Standard EFI table header
   24.85 + */
   24.86 +
   24.87 +struct efi_table_header
   24.88 +{
   24.89 +	uint64_t	Signature;
   24.90 +	// Revision of EFI table specification,
   24.91 +	// upper 16 bit - major revision number
   24.92 +	// lower 16 bit - minor revision number
   24.93 +	uint32_t	Revision;
   24.94 +	uint32_t	HeaderSize;
   24.95 +	uint32_t	CRC32;
   24.96 +	uint32_t	Reserved;
   24.97 +};
   24.98 +typedef struct efi_table_header efi_table_header_t;
   24.99 +
  24.100 +/*
  24.101 + * EFI Time
  24.102 + */
  24.103 +typedef struct
  24.104 +{          
  24.105 +	uint16_t	Year;       /* 1998 - 20XX */
  24.106 +	uint8_t		Month;      /* 1 - 12 */
  24.107 +	uint8_t		Day;        /* 1 - 31 */
  24.108 +	uint8_t		Hour;       /* 0 - 23 */
  24.109 +	uint8_t		Minute;     /* 0 - 59 */
  24.110 +	uint8_t		Second;     /* 0 - 59 */
  24.111 +	uint8_t		Pad1;
  24.112 +	uint32_t	Nanosecond; /* 0 - 999,999,999 */
  24.113 +	int16_t		TimeZone;   /* -1440 to 1440 or 2047 */
  24.114 +	uint8_t		Daylight;
  24.115 +	uint8_t		Pad2;
  24.116 +} efi_time_t;
  24.117 +
  24.118 +/* Bit definitions for efi_time_t.Daylight */
  24.119 +#define EFI_TIME_ADJUST_DAYLIGHT    0x01
  24.120 +#define EFI_TIME_IN_DAYLIGHT        0x02
  24.121 +
  24.122 +/* Value definition for efi_time_t.TimeZone */
  24.123 +#define EFI_UNSPECIFIED_TIMEZONE    0x07FF
  24.124 +
  24.125 +
  24.126 +
  24.127 +typedef struct
  24.128 +{
  24.129 +	uint32_t	Resolution;     /* 1e-6 parts per million */
  24.130 +	uint32_t	Accuracy;       /* hertz */
  24.131 +	uint8_t		SetsToZero;     /* Set clears sub-second time */
  24.132 +} efi_time_capabilities_t;
  24.133 +
  24.134 +
  24.135 +typedef efi_status_t (*efi_get_time_t) (efi_time_t*, efi_time_capabilities_t*);
  24.136 +typedef efi_status_t (*efi_set_time_t) (efi_time_t*);
  24.137 +typedef efi_status_t (*efi_get_wakeup_time_t) (uint8_t*, uint8_t*, efi_time_t*);
  24.138 +typedef efi_status_t (*efi_set_wakeup_time_t) (uint8_t, efi_time_t*);
  24.139 +
  24.140 +/*
  24.141 + * Memory
  24.142 + * Preseve the attr on any range supplied.
  24.143 + * ConventialMemory must have WB,SR,SW when supplied.
  24.144 + * When allocating from ConventialMemory always make it WB,SR,SW
  24.145 + * When returning to ConventialMemory always make it WB,SR,SW
  24.146 + * When getting the memory map, or on RT for runtime types
  24.147 + */
  24.148 +
  24.149 +typedef enum {
  24.150 +	EfiReservedMemoryType,		/* 0 */
  24.151 +	EfiLoaderCode,
  24.152 +	EfiLoaderData,
  24.153 +	EfiBootServicesCode,
  24.154 +	EfiBootServicesData,
  24.155 +	EfiRuntimeServicesCode,
  24.156 +	EfiRuntimeServicesData,		/* 6 */
  24.157 +	EfiConventionalMemory,		/* 7 */
  24.158 +	EfiUnusableMemory,
  24.159 +	EfiACPIReclaimMemory,		/* 9 */
  24.160 +	EfiACPIMemoryNVS,		/* 10, a */
  24.161 +	EfiMemoryMappedIO,
  24.162 +	EfiMemoryMappedIOPortSpace,	/* 12, c */
  24.163 +	EfiPalCode,			/* 13, d */
  24.164 +	EfiMaxMemoryType		/* 14, e */
  24.165 +} efi_memory_type_t;
  24.166 +
  24.167 +/* possible caching types for the memory range */
  24.168 +#define EFI_MEMORY_UC		0x0000000000000001
  24.169 +#define EFI_MEMORY_WC		0x0000000000000002
  24.170 +#define EFI_MEMORY_WT		0x0000000000000004
  24.171 +#define EFI_MEMORY_WB		0x0000000000000008
  24.172 +#define EFI_MEMORY_UCE		0x0000000000000010  
  24.173 +/* physical memory protection on range */
  24.174 +#define EFI_MEMORY_WP		0x0000000000001000
  24.175 +#define EFI_MEMORY_RP		0x0000000000002000
  24.176 +#define EFI_MEMORY_XP		0x0000000000004000
  24.177 +/* range requires a runtime mapping */
  24.178 +#define EFI_MEMORY_RUNTIME	0x8000000000000000
  24.179 +
  24.180 +#define EFI_MEMORY_DESCRIPTOR_VERSION  1
  24.181 +
  24.182 +typedef uint64_t efi_phys_addr_t;
  24.183 +typedef uint64_t efi_virt_addr_t;
  24.184 +
  24.185 +typedef struct
  24.186 +{
  24.187 +	uint32_t	Type;           /* 32 bit padding */
  24.188 +	efi_phys_addr_t	PhysicalStart;
  24.189 +	efi_virt_addr_t	VirtualStart;
  24.190 +	uint64_t	NumberOfPages;
  24.191 +	uint64_t	Attribute;
  24.192 +} efi_memory_descriptor_t;
  24.193 +
  24.194 +#define NextMemoryDescriptor(Ptr,Size)  ((efi_memory_descriptor_t*) (((uint8_t*) Ptr) + Size))
  24.195 +
  24.196 +
  24.197 +typedef efi_status_t (*efi_set_virtual_address_map_t)
  24.198 +	(
  24.199 +		uint64_t MemoryMapSize,
  24.200 +		uint64_t DescriptorSize,
  24.201 +		uint32_t DescriptorVersion,
  24.202 +		efi_memory_descriptor_t* VirtualMap
  24.203 +	);
  24.204 +
  24.205 +typedef efi_status_t (*efi_convert_pointer_t)
  24.206 +	(
  24.207 +		uint64_t DebugDisposition,
  24.208 +		void** Address
  24.209 +	);
  24.210 +
  24.211 +/*
  24.212 + * A GUID
  24.213 + */
  24.214 +
  24.215 +typedef struct
  24.216 +{          
  24.217 +	uint32_t	Data1;
  24.218 +	uint16_t	Data2;
  24.219 +	uint16_t	Data3;
  24.220 +	uint8_t		Data4[8]; 
  24.221 +} efi_guid_t;
  24.222 +
  24.223 +/*
  24.224 + * EFI Configuration Table and GUID definitions
  24.225 + */
  24.226 +
  24.227 +#define MPS_TABLE_GUID			\
  24.228 +	{ 0xeb9d2d2f, 0x2d88, 0x11d3,	\
  24.229 +		{ 0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } }
  24.230 +
  24.231 +#define ACPI_TABLE_GUID			\
  24.232 +	{ 0xeb9d2d30, 0x2d88, 0x11d3,	\
  24.233 +		{ 0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } }
  24.234 +
  24.235 +#define ACPI_20_TABLE_GUID  \
  24.236 +	{ 0x8868e871, 0xe4f1, 0x11d3,	\
  24.237 +		{ 0xbc, 0x22, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }
  24.238 +
  24.239 +#define SMBIOS_TABLE_GUID    \
  24.240 +	{ 0xeb9d2d31, 0x2d88, 0x11d3,	\
  24.241 +		{ 0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } }
  24.242 +
  24.243 +#define SAL_SYSTEM_TABLE_GUID    \
  24.244 +	{ 0xeb9d2d32, 0x2d88, 0x11d3,	\
  24.245 +		{ 0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } }
  24.246 +
  24.247 +/* DIG64 Headless Console & Debug Port Table. */
  24.248 +#define	HCDP_TABLE_GUID		\
  24.249 +	{0xf951938d, 0x620b, 0x42ef,	\
  24.250 +		{0x82, 0x79, 0xa8, 0x4b, 0x79, 0x61, 0x78, 0x98 } }
  24.251 +
  24.252 +
  24.253 +typedef struct efi_configuration_table
  24.254 +{
  24.255 +	efi_guid_t	VendorGuid;
  24.256 +	void*		VendorTable;
  24.257 +} efi_configuration_table_t;
  24.258 +
  24.259 +
  24.260 +/*
  24.261 + * EFI platform variables
  24.262 + */
  24.263 +
  24.264 +#define EFI_GLOBAL_VARIABLE     \
  24.265 +    {	0x8BE4DF61, 0x93CA, 0x11d2, 0xAA, 0x0D, 0x00,	\
  24.266 +	0xE0, 0x98, 0x03, 0x2B, 0x8C }
  24.267 +
  24.268 +/* Variable attributes */
  24.269 +#define EFI_VARIABLE_NON_VOLATILE           0x00000001
  24.270 +#define EFI_VARIABLE_BOOTSERVICE_ACCESS     0x00000002
  24.271 +#define EFI_VARIABLE_RUNTIME_ACCESS         0x00000004
  24.272 +
  24.273 +/* Variable size limitation */
  24.274 +#define EFI_MAXIMUM_VARIABLE_SIZE           1024
  24.275 +
  24.276 +typedef efi_status_t (*efi_get_variable_t)
  24.277 +	(
  24.278 +		efi_char16_t*	VariableName,
  24.279 +		efi_guid_t	*VendorGuid,
  24.280 +		uint32_t*	Attributes,
  24.281 +		uint64_t*	DataSize,
  24.282 +		void*		Data
  24.283 +	);
  24.284 +
  24.285 +typedef
  24.286 +efi_status_t (*efi_get_next_variable_name_t)
  24.287 +	(
  24.288 +		uint64_t*	VariableNameSize,
  24.289 +		efi_char16_t*	VariableName,
  24.290 +		efi_guid_t*	VendorGuid
  24.291 +	);
  24.292 +
  24.293 +typedef efi_status_t (*efi_set_variable_t)
  24.294 +	(
  24.295 +		efi_char16_t*	VariableName,
  24.296 +		efi_guid_t*	VendorGuid,
  24.297 +		uint32_t	Attributes,
  24.298 +		uint64_t	DataSize,
  24.299 +		void*		Data
  24.300 +	);
  24.301 +
  24.302 +/*
  24.303 + * Misc
  24.304 + */
  24.305 +
  24.306 +typedef enum
  24.307 +{
  24.308 +	EfiResetCold,
  24.309 +	EfiResetWarm,
  24.310 +	EfiResetShutdown
  24.311 +} efi_reset_type_t;
  24.312 +
  24.313 +
  24.314 +typedef efi_status_t (*efi_reset_system_t)
  24.315 +	(
  24.316 +		efi_reset_type_t	ResetType,
  24.317 +		efi_status_t		ResetStatus,
  24.318 +		uint64_t		DataSize,
  24.319 +		efi_char16_t*		ResetData
  24.320 +	);
  24.321 +
  24.322 +typedef efi_status_t (*efi_get_next_high_mono_count_t) (uint32_t* HighCount);
  24.323 +
  24.324 +
  24.325 +/*
  24.326 + * EFI Runtime Serivces Table
  24.327 + */
  24.328 +
  24.329 +#define EFI_RUNTIME_SERVICES_SIGNATURE  0x56524553544e5552
  24.330 +#define EFI_RUNTIME_SERVICES_REVISION ((EFI_SPECIFICATION_MAJOR_REVISION<<16) \
  24.331 +					| (EFI_SPECIFICATION_MINOR_REVISION))
  24.332 +
  24.333 +typedef struct
  24.334 +{
  24.335 +	efi_table_header_t		Hdr;
  24.336 +	/* Time services */
  24.337 +	efi_get_time_t			GetTime;
  24.338 +	efi_set_time_t			SetTime;
  24.339 +	efi_get_wakeup_time_t		GetWakeupTime;
  24.340 +	efi_set_wakeup_time_t		SetWakeupTime;
  24.341 +	/* Virtual memory services */
  24.342 +	efi_set_virtual_address_map_t	SetVirtualAddressMap;
  24.343 +	efi_convert_pointer_t		ConvertPointer;
  24.344 +	/* Variable serviers */
  24.345 +	efi_get_variable_t		GetVariable;
  24.346 +	efi_get_next_variable_name_t	GetNextVariableName;
  24.347 +	efi_set_variable_t		SetVariable;
  24.348 +	/* Misc */
  24.349 +	efi_get_next_high_mono_count_t	GetNextHighMonotonicCount;
  24.350 +	efi_reset_system_t		ResetSystem;
  24.351 +
  24.352 +} efi_runtime_services_t;
  24.353 +
  24.354 +
  24.355 +#define EFI_SPECIFICATION_MAJOR_REVISION 1
  24.356 +#define EFI_SYSTEM_TABLE_SIGNATURE      0x5453595320494249
  24.357 +#define EFI_SYSTEM_TABLE_REVISION  ((EFI_SPECIFICATION_MAJOR_REVISION<<16) \
  24.358 +					| (EFI_SPECIFICATION_MINOR_REVISION))
  24.359 +
  24.360 +struct efi_system_table
  24.361 +{
  24.362 +	efi_table_header_t	Hdr;
  24.363 +
  24.364 +	uint64_t	FirmwareVendor;		// phys addr of CHAR16
  24.365 +	uint32_t	FirmwareRevision;	// Firmware vendor specific
  24.366 +
  24.367 +	efi_handle_t	ConsoleInHandle;
  24.368 +	uint64_t	ConIn;
  24.369 +
  24.370 +	efi_handle_t	ConsoleOutHandle;
  24.371 +	uint64_t	ConOut;
  24.372 +
  24.373 +	efi_handle_t	StandardErrorHandle;
  24.374 +	uint64_t	StdErr;
  24.375 +
  24.376 +	uint64_t	RuntimeServices;	// phys addr
  24.377 +	uint64_t	BootServices;		// phys addr
  24.378 +
  24.379 +	uint64_t	NumberOfTableEntries;	// Number of entries in Config
  24.380 +	uint64_t	ConfigurationTable;	// phys addr of ConfigTable
  24.381 +};
  24.382 +
  24.383 +typedef struct efi_system_table efi_system_table_t;
  24.384 +
  24.385 +
  24.386 +#define EFI_PAGE_SIZE   4096
  24.387 +#define EFI_PAGE_MASK   0xFFF
  24.388 +#define EFI_PAGE_SHIFT  12
  24.389 +
  24.390 +#define EFI_SIZE_TO_PAGES(a)  \
  24.391 +    ( ((a) >> EFI_PAGE_SHIFT) + ((a) & EFI_PAGE_MASK ? 1 : 0) )
  24.392 +
  24.393 +
  24.394 +void init_efi(void);
  24.395 +int efi_get_time(efi_time_t* tmP);
  24.396 +efi_status_t ia64_call_efi_physical(void *, ...);
  24.397 +
  24.398 +
  24.399 +#endif /* _EFI_H_ */
    25.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    25.2 +++ b/extras/mini-os/include/ia64/endian.h	Thu Feb 15 13:13:36 2007 -0700
    25.3 @@ -0,0 +1,75 @@
    25.4 +/*
    25.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    25.6 + * Parts are taken from FreeBSD.
    25.7 + *
    25.8 + ****************************************************************************
    25.9 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   25.10 + * of this software and associated documentation files (the "Software"), to
   25.11 + * deal in the Software without restriction, including without limitation the
   25.12 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   25.13 + * sell copies of the Software, and to permit persons to whom the Software is
   25.14 + * furnished to do so, subject to the following conditions:
   25.15 + * 
   25.16 + * The above copyright notice and this permission notice shall be included in
   25.17 + * all copies or substantial portions of the Software.
   25.18 + * 
   25.19 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   25.20 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   25.21 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   25.22 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   25.23 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   25.24 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   25.25 + * DEALINGS IN THE SOFTWARE.
   25.26 + */
   25.27 +
   25.28 +
   25.29 +#if !defined(_ENDIAN_H_)
   25.30 +#define _ENDIAN_H_
   25.31 +
   25.32 +#include "types.h"
   25.33 +
   25.34 +
   25.35 +#if !defined(__ASSEMBLY__)
   25.36 +
   25.37 +#if defined(BIG_ENDIAN)
   25.38 +
   25.39 +static __inline uint64_t
   25.40 +__bswap64(uint64_t __x)
   25.41 +{
   25.42 +	uint64_t __r;
   25.43 +	asm __volatile("mux1 %0=%1,@rev" : "=r" (__r) : "r"(__x));
   25.44 +	return __r;
   25.45 +}
   25.46 +
   25.47 +static __inline uint32_t
   25.48 +__bswap32(uint32_t __x)
   25.49 +{
   25.50 +	return (__bswap64(__x) >> 32);
   25.51 +}
   25.52 +
   25.53 +static __inline uint16_t
   25.54 +__bswap16(uint16_t __x)
   25.55 +{
   25.56 +	return (__bswap64(__x) >> 48);
   25.57 +}
   25.58 +
   25.59 +#define doswap(x,sz)  ( \
   25.60 +	((sz)==1)? (uint8_t)(x): \
   25.61 +	((sz)==2)? __bswap16(x): \
   25.62 +	((sz)==4)? __bswap32(x): \
   25.63 +	((sz)==8)? __bswap64(x): \
   25.64 +	~0l )
   25.65 +
   25.66 +#define SWAP(x)	doswap((x), sizeof((x)))
   25.67 +
   25.68 +
   25.69 +#else /* defined(BIG_ENDIAN) */
   25.70 +
   25.71 +#define SWAP(x) (x)
   25.72 +
   25.73 +#endif /* defined(BIG_ENDIAN) */
   25.74 +
   25.75 +#endif /* !defined(__ASSEMBLY__) */
   25.76 +
   25.77 +
   25.78 +#endif /* !defined(_ENDIAN_H_) */
    26.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    26.2 +++ b/extras/mini-os/include/ia64/hypercall-ia64.h	Thu Feb 15 13:13:36 2007 -0700
    26.3 @@ -0,0 +1,226 @@
    26.4 +/******************************************************************************
    26.5 + * hypercall.h
    26.6 + * 
    26.7 + * Mini-OS-specific hypervisor handling for ia64.
    26.8 + * 
    26.9 + * Copyright (c) 2002-2004, K A Fraser
   26.10 + * Changes: Dietmar Hahn <dietmar.hahn@fujiti-siemens.com>
   26.11 + * 
   26.12 + * This program is free software; you can redistribute it and/or
   26.13 + * modify it under the terms of the GNU General Public License version 2
   26.14 + * as published by the Free Software Foundation; or, when distributed
   26.15 + * separately from the Linux kernel or incorporated into other
   26.16 + * software packages, subject to the following license:
   26.17 + * 
   26.18 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   26.19 + * of this source file (the "Software"), to deal in the Software without
   26.20 + * restriction, including without limitation the rights to use, copy, modify,
   26.21 + * merge, publish, distribute, sublicense, and/or sell copies of the Software,
   26.22 + * and to permit persons to whom the Software is furnished to do so, subject to
   26.23 + * the following conditions:
   26.24 + * 
   26.25 + * The above copyright notice and this permission notice shall be included in
   26.26 + * all copies or substantial portions of the Software.
   26.27 + * 
   26.28 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
   26.29 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
   26.30 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
   26.31 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
   26.32 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
   26.33 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
   26.34 + * IN THE SOFTWARE.
   26.35 + */
   26.36 +
   26.37 +#ifndef __HYPERCALL_H__
   26.38 +#define __HYPERCALL_H__
   26.39 +
   26.40 +#include "lib.h"	/* memcpy() */
   26.41 +#include "errno.h"	/* ENOSYS() */
   26.42 +#include <xen/event_channel.h>
   26.43 +#include <xen/sched.h>
   26.44 +#include <xen/version.h>
   26.45 +
   26.46 +#ifndef _HYPERVISOR_H_
   26.47 +# error "please don't include this file directly"
   26.48 +#endif
   26.49 +
   26.50 +// See linux/compiler.h
   26.51 +#define likely(x)       __builtin_expect(!!(x), 1)
   26.52 +#define unlikely(x)     __builtin_expect(!!(x), 0)
   26.53 +
   26.54 +extern unsigned long __hypercall(unsigned long a1, unsigned long a2,
   26.55 +                                 unsigned long a3, unsigned long a4,
   26.56 +                                 unsigned long a5, unsigned long cmd);
   26.57 +/*
   26.58 + * Assembler stubs for hyper-calls.
   26.59 + */
   26.60 +
   26.61 +#define _hypercall0(type, name)					\
   26.62 +({								\
   26.63 +	long __res;						\
   26.64 +	__res = __hypercall(0, 0, 0, 0, 0,			\
   26.65 +			    __HYPERVISOR_##name);		\
   26.66 +	(type)__res;						\
   26.67 +})
   26.68 +
   26.69 +#define _hypercall1(type, name, a1)				\
   26.70 +({								\
   26.71 +	long __res;						\
   26.72 +	__res = __hypercall((unsigned long)a1,			\
   26.73 +			    0, 0, 0, 0, __HYPERVISOR_##name);	\
   26.74 +	(type)__res;						\
   26.75 +})
   26.76 +
   26.77 +#define _hypercall2(type, name, a1, a2)				\
   26.78 +({								\
   26.79 +	long __res;						\
   26.80 +	__res = __hypercall((unsigned long)a1,			\
   26.81 +			    (unsigned long)a2,			\
   26.82 +			    0, 0, 0, __HYPERVISOR_##name);	\
   26.83 +	(type)__res;						\
   26.84 +})
   26.85 +
   26.86 +#define _hypercall3(type, name, a1, a2, a3)			\
   26.87 +({								\
   26.88 +	long __res;						\
   26.89 +	__res = __hypercall((unsigned long)a1,			\
   26.90 +			    (unsigned long)a2,			\
   26.91 +			    (unsigned long)a3,			\
   26.92 +			    0, 0, __HYPERVISOR_##name);		\
   26.93 +	(type)__res;						\
   26.94 +})
   26.95 +
   26.96 +#define _hypercall4(type, name, a1, a2, a3, a4)			\
   26.97 +({								\
   26.98 +	long __res;						\
   26.99 +	__res = __hypercall((unsigned long)a1,			\
  26.100 +			    (unsigned long)a2,			\
  26.101 +			    (unsigned long)a3,			\
  26.102 +			    (unsigned long)a4,			\
  26.103 +			    0, __HYPERVISOR_##name);		\
  26.104 +	(type)__res;						\
  26.105 +})
  26.106 +
  26.107 +#define _hypercall5(type, name, a1, a2, a3, a4, a5)		\
  26.108 +({								\
  26.109 +	long __res;						\
  26.110 +	__res = __hypercall((unsigned long)a1,			\
  26.111 +			    (unsigned long)a2,			\
  26.112 +			    (unsigned long)a3,			\
  26.113 +			    (unsigned long)a4,			\
  26.114 +			    (unsigned long)a5,			\
  26.115 +			    __HYPERVISOR_##name);		\
  26.116 +	(type)__res;						\
  26.117 +})
  26.118 +
  26.119 +
  26.120 +extern unsigned long xencomm_vaddr_to_paddr(unsigned long vaddr);
  26.121 +struct xencomm_handle;
  26.122 +
  26.123 +/* Inline version.  To be used only on linear space (kernel space).  */
  26.124 +static inline struct xencomm_handle *
  26.125 +xencomm_create_inline(void *buffer)
  26.126 +{
  26.127 +	unsigned long paddr;
  26.128 +
  26.129 +	paddr = xencomm_vaddr_to_paddr((unsigned long)buffer);
  26.130 +	return (struct xencomm_handle *)(paddr | XENCOMM_INLINE_FLAG);
  26.131 +}
  26.132 +
  26.133 +static inline int
  26.134 +xencomm_arch_event_channel_op(int cmd, void *arg)
  26.135 +{
  26.136 +	int rc;
  26.137 +	struct xencomm_handle *newArg;
  26.138 +
  26.139 +	newArg = xencomm_create_inline(arg);
  26.140 +	rc = _hypercall2(int, event_channel_op, cmd, newArg);
  26.141 +	if (unlikely(rc == -ENOSYS)) {
  26.142 +		struct evtchn_op op;
  26.143 +
  26.144 +		op.cmd = cmd;
  26.145 +		memcpy(&op.u, arg, sizeof(op.u));
  26.146 +		rc = _hypercall1(int, event_channel_op_compat, &op);
  26.147 +	}
  26.148 +	return rc;
  26.149 +}
  26.150 +#define HYPERVISOR_event_channel_op xencomm_arch_event_channel_op
  26.151 +
  26.152 +static inline int
  26.153 +xencomm_arch_xen_version(int cmd, struct xencomm_handle *arg)
  26.154 +{
  26.155 +	return _hypercall2(int, xen_version, cmd, arg);
  26.156 +}
  26.157 +
  26.158 +static inline int
  26.159 +xencomm_arch_xen_feature(int cmd, struct xencomm_handle *arg)
  26.160 +{
  26.161 +	struct xencomm_handle *newArg;
  26.162 +
  26.163 +	newArg = xencomm_create_inline(arg);
  26.164 +	return _hypercall2(int, xen_version, cmd, newArg);
  26.165 +}
  26.166 +
  26.167 +static inline int
  26.168 +HYPERVISOR_xen_version(int cmd, void *arg)
  26.169 +{
  26.170 +	switch(cmd) {
  26.171 +		case XENVER_version:
  26.172 +			return xencomm_arch_xen_version(cmd, 0);
  26.173 +		case XENVER_get_features:
  26.174 +			return xencomm_arch_xen_feature(cmd, arg);
  26.175 +		default:
  26.176 +			return -1;
  26.177 +	}
  26.178 +}
  26.179 +
  26.180 +static inline int
  26.181 +xencomm_arch_console_io(int cmd, int count, char *str)
  26.182 +{
  26.183 +	struct xencomm_handle *newStr;
  26.184 +
  26.185 +	newStr = xencomm_create_inline(str);
  26.186 +	return _hypercall3(int, console_io, cmd, count, newStr);
  26.187 +}
  26.188 +
  26.189 +
  26.190 +#define HYPERVISOR_console_io xencomm_arch_console_io
  26.191 +
  26.192 +static inline int
  26.193 +HYPERVISOR_sched_op_compat(int cmd, unsigned long arg)
  26.194 +{
  26.195 +	return _hypercall2(int, sched_op_compat, cmd, arg);
  26.196 +}
  26.197 +
  26.198 +static inline int
  26.199 +xencomm_arch_sched_op(int cmd, void *arg)
  26.200 +{
  26.201 +	struct xencomm_handle *newArg;
  26.202 +
  26.203 +	newArg = xencomm_create_inline(arg);
  26.204 +	return _hypercall2(int, sched_op, cmd, newArg);
  26.205 +}
  26.206 +
  26.207 +#define HYPERVISOR_sched_op xencomm_arch_sched_op
  26.208 +
  26.209 +static inline int
  26.210 +xencomm_arch_callback_op(int cmd, void *arg)
  26.211 +{
  26.212 +	struct xencomm_handle *newArg;
  26.213 +
  26.214 +	newArg = xencomm_create_inline(arg);
  26.215 +	return _hypercall2(int, callback_op, cmd, newArg);
  26.216 +}
  26.217 +#define HYPERVISOR_callback_op xencomm_arch_callback_op
  26.218 +
  26.219 +static inline int
  26.220 +xencomm_arch_hypercall_grant_table_op(unsigned int cmd,
  26.221 +                                      struct xencomm_handle *uop,
  26.222 +                                      unsigned int count)
  26.223 +{
  26.224 +	return _hypercall3(int, grant_table_op, cmd, uop, count);
  26.225 +}
  26.226 +
  26.227 +int HYPERVISOR_grant_table_op(unsigned int cmd, void *uop, unsigned int count);
  26.228 +
  26.229 +#endif /* __HYPERCALL_H__ */
    27.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    27.2 +++ b/extras/mini-os/include/ia64/ia64_cpu.h	Thu Feb 15 13:13:36 2007 -0700
    27.3 @@ -0,0 +1,776 @@
    27.4 +/*
    27.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    27.6 + * This code is mostly taken from FreeBSD.
    27.7 + *
    27.8 + *
    27.9 + ****************************************************************************
   27.10 + * Copyright (c) 2000 Doug Rabson
   27.11 + * All rights reserved.
   27.12 + *
   27.13 + * Redistribution and use in source and binary forms, with or without
   27.14 + * modification, are permitted provided that the following conditions
   27.15 + * are met:
   27.16 + * 1. Redistributions of source code must retain the above copyright
   27.17 + *    notice, this list of conditions and the following disclaimer.
   27.18 + * 2. Redistributions in binary form must reproduce the above copyright
   27.19 + *    notice, this list of conditions and the following disclaimer in the
   27.20 + *    documentation and/or other materials provided with the distribution.
   27.21 + *
   27.22 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   27.23 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   27.24 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   27.25 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   27.26 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   27.27 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   27.28 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   27.29 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   27.30 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27.31 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   27.32 + * SUCH DAMAGE.
   27.33 + *
   27.34 + */
   27.35 +
   27.36 +#ifndef _IA64_CPU_H_
   27.37 +#define _IA64_CPU_H_
   27.38 +
   27.39 +#include "ia64_fpu.h"
   27.40 +
   27.41 +/*
   27.42 + * Definition of Region Register bits (RR)
   27.43 + *
   27.44 + * RR bit field positions
   27.45 + */
   27.46 +#define IA64_RR_VE		0
   27.47 +#define IA64_RR_MBZ0		1
   27.48 +#define IA64_RR_PS		2
   27.49 +#define IA64_RR_PS_LEN		6
   27.50 +#define IA64_RR_RID		8
   27.51 +#define IA64_RR_RID_LEN		24
   27.52 +#define IA64_RR_MBZ1		32
   27.53 +
   27.54 +#define IA64_RR_IDX_POS		61
   27.55 +
   27.56 +#define IA64_RR_VAL(size,rid) (((size) << IA64_RR_PS) | ((rid) << IA64_RR_RID))
   27.57 +
   27.58 +/*
   27.59 + * Define Protection Key Register (PKR)
   27.60 + *
   27.61 + * PKR bit field positions
   27.62 + */
   27.63 +#define IA64_PKR_V		0
   27.64 +#define IA64_PKR_WD		1
   27.65 +#define IA64_PKR_RD		2
   27.66 +#define IA64_PKR_XD		3
   27.67 +#define IA64_PKR_MBZ0		4
   27.68 +#define IA64_PKR_KEY		8
   27.69 +#define IA64_PKR_KEY_LEN	24
   27.70 +#define IA64_PKR_MBZ1		32
   27.71 +
   27.72 +#define IA64_PKR_VALID		(1 << IA64_PKR_V)
   27.73 +
   27.74 +
   27.75 +/*
   27.76 + * ITIR bit field positions
   27.77 + */
   27.78 +
   27.79 +#define	IA64_ITIR_MBZ0		0
   27.80 +#define	IA64_ITIR_PS		2
   27.81 +#define	IA64_ITIR_PS_LEN	6
   27.82 +#define	IA64_ITIR_KEY		8
   27.83 +#define	IA64_ITIR_KEY_LEN	24
   27.84 +#define	IA64_ITIR_MBZ1		32
   27.85 +#define	IA64_ITIR_MBZ1_LEN	16
   27.86 +#define	IA64_ITIR_PPN		48
   27.87 +#define	IA64_ITIR_PPN_LEN	15
   27.88 +#define	IA64_ITIR_MBZ2		63
   27.89 +
   27.90 +/*
   27.91 + * Definition of PSR and IPSR bits.
   27.92 + */
   27.93 +#define IA64_PSR_BE		0x0000000000000002
   27.94 +#define IA64_PSR_UP		0x0000000000000004
   27.95 +#define IA64_PSR_AC		0x0000000000000008
   27.96 +#define IA64_PSR_MFL		0x0000000000000010
   27.97 +#define IA64_PSR_MFH_BIT	5
   27.98 +#define IA64_PSR_MFH		(1 << IA64_PSR_MFH_BIT)
   27.99 +#define IA64_PSR_UMASK		(IA64_PSR_BE | IA64_PSR_UP |	\
  27.100 +				IA64_PSR_AC | IA64_PSR_MFL |	\
  27.101 +				IA64_PSR_MFH)
  27.102 +#define IA64_PSR_IC_BIT		13
  27.103 +#define IA64_PSR_IC		(1<<IA64_PSR_IC_BIT) /*0x0000000000002000*/
  27.104 +#define IA64_PSR_I_BIT		14
  27.105 +#define IA64_PSR_I		(1<<IA64_PSR_I_BIT) /*0x0000000000004000*/
  27.106 +#define IA64_PSR_PK		0x0000000000008000
  27.107 +#define IA64_PSR_DT		0x0000000000020000
  27.108 +#define IA64_PSR_DFL		0x0000000000040000
  27.109 +#define IA64_PSR_DFH		0x0000000000080000
  27.110 +#define IA64_PSR_SP		0x0000000000100000
  27.111 +#define IA64_PSR_PP		0x0000000000200000
  27.112 +#define IA64_PSR_DI		0x0000000000400000
  27.113 +#define IA64_PSR_SI		0x0000000000800000
  27.114 +#define IA64_PSR_DB		0x0000000001000000
  27.115 +#define IA64_PSR_LP		0x0000000002000000
  27.116 +#define IA64_PSR_TB		0x0000000004000000
  27.117 +#define IA64_PSR_RT		0x0000000008000000
  27.118 +#define IA64_PSR_CPL		0x0000000300000000
  27.119 +#define IA64_PSR_CPL_KERN	0x0000000000000000
  27.120 +#define IA64_PSR_CPL_1		0x0000000100000000
  27.121 +#define IA64_PSR_CPL_2		0x0000000200000000
  27.122 +#define IA64_PSR_CPL_USER	0x0000000300000000
  27.123 +#define IA64_PSR_IS		0x0000000400000000
  27.124 +#define IA64_PSR_MC		0x0000000800000000
  27.125 +#define IA64_PSR_IT		0x0000001000000000
  27.126 +#define IA64_PSR_ID		0x0000002000000000
  27.127 +#define IA64_PSR_DA		0x0000004000000000
  27.128 +#define IA64_PSR_DD		0x0000008000000000
  27.129 +#define IA64_PSR_SS		0x0000010000000000
  27.130 +#define IA64_PSR_RI		0x0000060000000000
  27.131 +#define IA64_PSR_RI_0		0x0000000000000000
  27.132 +#define IA64_PSR_RI_1		0x0000020000000000
  27.133 +#define IA64_PSR_RI_2		0x0000040000000000
  27.134 +#define IA64_PSR_RI_SHIFT	41
  27.135 +#define IA64_PSR_ED		0x0000080000000000
  27.136 +#define IA64_PSR_BN		0x0000100000000000
  27.137 +#define IA64_PSR_IA		0x0000200000000000
  27.138 +
  27.139 +
  27.140 +/* Endianess of mini-os. */
  27.141 +#if defined(BIG_ENDIAN)
  27.142 +#define MOS_IA64_PSR_BE	IA64_PSR_BE
  27.143 +#else
  27.144 +#define MOS_IA64_PSR_BE	0
  27.145 +#endif
  27.146 +
  27.147 +#define STARTUP_PSR (IA64_PSR_IT | \
  27.148 +            	     IA64_PSR_DT | IA64_PSR_RT | MOS_IA64_PSR_BE | \
  27.149 +		     IA64_PSR_BN | IA64_PSR_CPL_2 | IA64_PSR_AC)
  27.150 +
  27.151 +#define MOS_SYS_PSR (IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT | \
  27.152 +            	     IA64_PSR_DT | IA64_PSR_RT | MOS_IA64_PSR_BE | \
  27.153 +		     IA64_PSR_BN | IA64_PSR_CPL_2 | IA64_PSR_AC)
  27.154 +
  27.155 +#define MOS_USR_PSR (IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT | \
  27.156 +            	     IA64_PSR_DT | IA64_PSR_RT | MOS_IA64_PSR_BE | \
  27.157 +		     IA64_PSR_BN | IA64_PSR_CPL_USER | IA64_PSR_AC)
  27.158 +
  27.159 +/*
  27.160 + * Definition of ISR bits.
  27.161 + */
  27.162 +#define IA64_ISR_CODE	0x000000000000ffff
  27.163 +#define IA64_ISR_VECTOR	0x0000000000ff0000
  27.164 +#define IA64_ISR_X	0x0000000100000000
  27.165 +#define IA64_ISR_W	0x0000000200000000
  27.166 +#define IA64_ISR_R	0x0000000400000000
  27.167 +#define IA64_ISR_NA	0x0000000800000000
  27.168 +#define IA64_ISR_SP	0x0000001000000000
  27.169 +#define IA64_ISR_RS	0x0000002000000000
  27.170 +#define IA64_ISR_IR	0x0000004000000000
  27.171 +#define IA64_ISR_NI	0x0000008000000000
  27.172 +#define IA64_ISR_SO	0x0000010000000000
  27.173 +#define IA64_ISR_EI	0x0000060000000000
  27.174 +#define IA64_ISR_EI_0	0x0000000000000000
  27.175 +#define IA64_ISR_EI_1	0x0000020000000000
  27.176 +#define IA64_ISR_EI_2	0x0000040000000000
  27.177 +#define IA64_ISR_ED	0x0000080000000000
  27.178 +
  27.179 +/*
  27.180 + * DCR bit positions
  27.181 + */
  27.182 +#define IA64_DCR_PP		0
  27.183 +#define IA64_DCR_BE		1
  27.184 +#define IA64_DCR_LC		2
  27.185 +#define IA64_DCR_MBZ0		4
  27.186 +#define IA64_DCR_MBZ0_V		0xf
  27.187 +#define IA64_DCR_DM		8
  27.188 +#define IA64_DCR_DP		9
  27.189 +#define IA64_DCR_DK		10
  27.190 +#define IA64_DCR_DX		11
  27.191 +#define IA64_DCR_DR		12
  27.192 +#define IA64_DCR_DA		13
  27.193 +#define IA64_DCR_DD		14
  27.194 +#define IA64_DCR_DEFER_ALL	0x7f00
  27.195 +#define IA64_DCR_MBZ1		2
  27.196 +#define IA64_DCR_MBZ1_V		0xffffffffffffULL
  27.197 +
  27.198 +
  27.199 +	/* Endianess of DCR register. */
  27.200 +#if defined(BIG_ENDIAN)
  27.201 +#define MOS_IA64_DCR_BE	(1 << IA64_DCR_BE)
  27.202 +#else
  27.203 +#define MOS_IA64_DCR_BE	(0 << IA64_DCR_BE)
  27.204 +#endif
  27.205 +
  27.206 +#define IA64_DCR_DEFAULT (MOS_IA64_DCR_BE)
  27.207 +
  27.208 +/*
  27.209 + * Vector numbers for various ia64 interrupts.
  27.210 + */
  27.211 +#define IA64_VEC_VHPT				0
  27.212 +#define IA64_VEC_ITLB				1
  27.213 +#define IA64_VEC_DTLB				2
  27.214 +#define IA64_VEC_ALT_ITLB			3
  27.215 +#define IA64_VEC_ALT_DTLB			4
  27.216 +#define IA64_VEC_NESTED_DTLB			5
  27.217 +#define IA64_VEC_IKEY_MISS			6
  27.218 +#define IA64_VEC_DKEY_MISS			7
  27.219 +#define IA64_VEC_DIRTY_BIT			8
  27.220 +#define IA64_VEC_INST_ACCESS			9
  27.221 +#define IA64_VEC_DATA_ACCESS			10
  27.222 +#define IA64_VEC_BREAK				11
  27.223 +#define IA64_VEC_EXT_INTR			12
  27.224 +#define IA64_VEC_PAGE_NOT_PRESENT		20
  27.225 +#define IA64_VEC_KEY_PERMISSION			21
  27.226 +#define IA64_VEC_INST_ACCESS_RIGHTS		22
  27.227 +#define IA64_VEC_DATA_ACCESS_RIGHTS		23
  27.228 +#define IA64_VEC_GENERAL_EXCEPTION		24
  27.229 +#define IA64_VEC_DISABLED_FP			25
  27.230 +#define IA64_VEC_NAT_CONSUMPTION		26
  27.231 +#define IA64_VEC_SPECULATION			27
  27.232 +#define IA64_VEC_DEBUG				29
  27.233 +#define IA64_VEC_UNALIGNED_REFERENCE		30
  27.234 +#define IA64_VEC_UNSUPP_DATA_REFERENCE		31
  27.235 +#define IA64_VEC_FLOATING_POINT_FAULT		32
  27.236 +#define IA64_VEC_FLOATING_POINT_TRAP		33
  27.237 +#define IA64_VEC_LOWER_PRIVILEGE_TRANSFER 	34
  27.238 +#define IA64_VEC_TAKEN_BRANCH_TRAP		35
  27.239 +#define IA64_VEC_SINGLE_STEP_TRAP		36
  27.240 +#define IA64_VEC_IA32_EXCEPTION			45
  27.241 +#define IA64_VEC_IA32_INTERCEPT			46
  27.242 +#define IA64_VEC_IA32_INTERRUPT			47
  27.243 +
  27.244 +/*
  27.245 + * Define hardware RSE Configuration Register
  27.246 + *
  27.247 + * RS Configuration (RSC) bit field positions
  27.248 + */
  27.249 +
  27.250 +#define IA64_RSC_MODE       0
  27.251 +#define IA64_RSC_PL         2
  27.252 +#define IA64_RSC_BE         4
  27.253 +#define IA64_RSC_MBZ0       5
  27.254 +#define IA64_RSC_MBZ0_V     0x3ff
  27.255 +#define IA64_RSC_LOADRS     16
  27.256 +#define IA64_RSC_LOADRS_LEN 14
  27.257 +#define IA64_RSC_MBZ1       30
  27.258 +#define IA64_RSC_MBZ1_V     0x3ffffffffULL
  27.259 +
  27.260 +/*
  27.261 + * RSC modes
  27.262 + */
  27.263 +#define IA64_RSC_MODE_LY (0x0) 		/* Lazy */
  27.264 +#define IA64_RSC_MODE_SI (0x1) 		/* Store intensive */
  27.265 +#define IA64_RSC_MODE_LI (0x2) 		/* Load intensive */
  27.266 +#define IA64_RSC_MODE_EA (0x3) 		/* Eager */
  27.267 +
  27.268 +/* RSE endian mode. */
  27.269 +#if defined(BIG_ENDIAN)
  27.270 +#define MOS_IA64_RSC_BE	1		/* Big endian rse. */
  27.271 +#else
  27.272 +#define MOS_IA64_RSC_BE	0		/* Little endian rse. */
  27.273 +#endif
  27.274 +
  27.275 +#define IA64_RSE_EAGER ((IA64_RSC_MODE_EA<<IA64_RSC_MODE) |	\
  27.276 +			   (MOS_IA64_RSC_BE << IA64_RSC_BE)	)
  27.277 +
  27.278 +#define IA64_RSE_LAZY ((IA64_RSC_MODE_LY<<IA64_RSC_MODE) |	\
  27.279 +			   (MOS_IA64_RSC_BE << IA64_RSC_BE)	)
  27.280 +
  27.281 +
  27.282 +
  27.283 +#ifndef __ASSEMBLY__
  27.284 +
  27.285 +/* ia64 function descriptor and global pointer */
  27.286 +struct ia64_fdesc
  27.287 +{
  27.288 +	uint64_t	func;
  27.289 +	uint64_t	gp;
  27.290 +};
  27.291 +typedef struct ia64_fdesc ia64_fdesc_t;
  27.292 +
  27.293 +#define FDESC_FUNC(fn)  (((struct ia64_fdesc *) fn)->func)
  27.294 +#define FDESC_GP(fn)    (((struct ia64_fdesc *) fn)->gp)
  27.295 +
  27.296 +
  27.297 +/*
  27.298 + * Various special ia64 instructions.
  27.299 + */
  27.300 +
  27.301 +/*
  27.302 + * Memory Fence.
  27.303 + */
  27.304 +static __inline void
  27.305 +ia64_mf(void)
  27.306 +{
  27.307 +	__asm __volatile("mf" ::: "memory");
  27.308 +}
  27.309 +
  27.310 +static __inline void
  27.311 +ia64_mf_a(void)
  27.312 +{
  27.313 +	__asm __volatile("mf.a");
  27.314 +}
  27.315 +
  27.316 +/*
  27.317 + * Flush Cache.
  27.318 + */
  27.319 +static __inline void
  27.320 +ia64_fc(uint64_t va)
  27.321 +{
  27.322 +	__asm __volatile("fc %0" :: "r"(va));
  27.323 +}
  27.324 +
  27.325 +/*
  27.326 + * Sync instruction stream.
  27.327 + */
  27.328 +static __inline void
  27.329 +ia64_sync_i(void)
  27.330 +{
  27.331 +	__asm __volatile("sync.i");
  27.332 +}
  27.333 +
  27.334 +/*
  27.335 + * Calculate address in VHPT for va.
  27.336 + */
  27.337 +static __inline uint64_t
  27.338 +ia64_thash(uint64_t va)
  27.339 +{
  27.340 +	uint64_t result;
  27.341 +	__asm __volatile("thash %0=%1" : "=r" (result) : "r" (va));
  27.342 +	return result;
  27.343 +}
  27.344 +
  27.345 +/*
  27.346 + * Calculate VHPT tag for va.
  27.347 + */
  27.348 +static __inline uint64_t
  27.349 +ia64_ttag(uint64_t va)
  27.350 +{
  27.351 +	uint64_t result;
  27.352 +	__asm __volatile("ttag %0=%1" : "=r" (result) : "r" (va));
  27.353 +	return result;
  27.354 +}
  27.355 +
  27.356 +/*
  27.357 + * Convert virtual address to physical.
  27.358 + */
  27.359 +static __inline uint64_t
  27.360 +ia64_tpa(uint64_t va)
  27.361 +{
  27.362 +	uint64_t result;
  27.363 +	__asm __volatile("tpa %0=%1" : "=r" (result) : "r" (va));
  27.364 +	return result;
  27.365 +}
  27.366 +
  27.367 +/*
  27.368 + * Generate a ptc.e instruction.
  27.369 + */
  27.370 +static __inline void
  27.371 +ia64_ptc_e(uint64_t v)
  27.372 +{
  27.373 +	__asm __volatile("ptc.e %0;; srlz.d;;" :: "r"(v));
  27.374 +}
  27.375 +
  27.376 +/*
  27.377 + * Generate a ptc.g instruction.
  27.378 + */
  27.379 +static __inline void
  27.380 +ia64_ptc_g(uint64_t va, uint64_t size)
  27.381 +{
  27.382 +	__asm __volatile("ptc.g %0,%1;; srlz.d;;" :: "r"(va), "r"(size<<2));
  27.383 +}
  27.384 +
  27.385 +/*
  27.386 + * Generate a ptc.ga instruction.
  27.387 + */
  27.388 +static __inline void
  27.389 +ia64_ptc_ga(uint64_t va, uint64_t size)
  27.390 +{
  27.391 +	__asm __volatile("ptc.ga %0,%1;; srlz.d;;" :: "r"(va), "r"(size<<2));
  27.392 +}
  27.393 +
  27.394 +/*
  27.395 + * Generate a ptc.l instruction.
  27.396 + */
  27.397 +static __inline void
  27.398 +ia64_ptc_l(uint64_t va, uint64_t size)
  27.399 +{
  27.400 +	__asm __volatile("ptc.l %0,%1;; srlz.d;;" :: "r"(va), "r"(size<<2));
  27.401 +}
  27.402 +
  27.403 +/*
  27.404 + * Read the value of psr.
  27.405 + */
  27.406 +static __inline uint64_t
  27.407 +ia64_get_psr(void)
  27.408 +{
  27.409 +	uint64_t result;
  27.410 +	__asm __volatile("mov %0=psr;;" : "=r" (result));
  27.411 +	return result;
  27.412 +}
  27.413 +
  27.414 +static __inline void
  27.415 +ia64_set_psr(uint64_t v)
  27.416 +{
  27.417 +	__asm __volatile("mov psr.l=%0" :: "r" (v));
  27.418 +}
  27.419 +
  27.420 +static __inline void
  27.421 +ia64_srlz_d(void)
  27.422 +{
  27.423 +	__asm __volatile("srlz.d;;");
  27.424 +}
  27.425 +
  27.426 +static __inline void
  27.427 +disable_intr(void)
  27.428 +{
  27.429 +	__asm __volatile ("rsm psr.ic|psr.i");
  27.430 +}
  27.431 +
  27.432 +static __inline void
  27.433 +enable_intr(void)
  27.434 +{
  27.435 +	__asm __volatile ("ssm psr.ic|psr.i");
  27.436 +}
  27.437 +
  27.438 +/*
  27.439 + * Define accessors for application registers.
  27.440 + */
  27.441 +
  27.442 +#define IA64_AR(name)							\
  27.443 +									\
  27.444 +static __inline uint64_t						\
  27.445 +ia64_get_##name(void)							\
  27.446 +{									\
  27.447 +	uint64_t result;						\
  27.448 +	__asm __volatile(";;mov %0=ar." #name ";;" : "=r" (result));	\
  27.449 +	return result;							\
  27.450 +}									\
  27.451 +									\
  27.452 +static __inline void							\
  27.453 +ia64_set_##name(uint64_t v)						\
  27.454 +{									\
  27.455 +	__asm __volatile("mov ar." #name "=%0" :: "r" (v));		\
  27.456 +}
  27.457 +
  27.458 +IA64_AR(k0)
  27.459 +IA64_AR(k1)
  27.460 +IA64_AR(k2)
  27.461 +IA64_AR(k3)
  27.462 +IA64_AR(k4)
  27.463 +IA64_AR(k5)
  27.464 +IA64_AR(k6)
  27.465 +IA64_AR(k7)
  27.466 +
  27.467 +IA64_AR(rsc)
  27.468 +IA64_AR(bsp)
  27.469 +IA64_AR(bspstore)
  27.470 +IA64_AR(rnat)
  27.471 +
  27.472 +IA64_AR(fcr)
  27.473 +
  27.474 +IA64_AR(eflag)
  27.475 +IA64_AR(csd)
  27.476 +IA64_AR(ssd)
  27.477 +IA64_AR(cflg)
  27.478 +IA64_AR(fsr)
  27.479 +IA64_AR(fir)
  27.480 +IA64_AR(fdr)
  27.481 +
  27.482 +IA64_AR(ccv)
  27.483 +
  27.484 +IA64_AR(unat)
  27.485 +
  27.486 +IA64_AR(fpsr)
  27.487 +
  27.488 +IA64_AR(itc)
  27.489 +
  27.490 +IA64_AR(pfs)
  27.491 +IA64_AR(lc)
  27.492 +IA64_AR(ec)
  27.493 +
  27.494 +/*
  27.495 + * Define accessors for control registers.
  27.496 + */
  27.497 +
  27.498 +#define IA64_CR(name)						\
  27.499 +								\
  27.500 +static __inline uint64_t					\
  27.501 +ia64_get_##name(void)						\
  27.502 +{								\
  27.503 +	uint64_t result;					\
  27.504 +	__asm __volatile("mov %0=cr." #name : "=r" (result));	\
  27.505 +	return result;						\
  27.506 +}								\
  27.507 +								\
  27.508 +static __inline void						\
  27.509 +ia64_set_##name(uint64_t v)					\
  27.510 +{								\
  27.511 +	__asm __volatile("mov cr." #name "=%0" :: "r" (v));	\
  27.512 +}
  27.513 +
  27.514 +IA64_CR(dcr)
  27.515 +IA64_CR(itm)
  27.516 +IA64_CR(iva)
  27.517 +
  27.518 +IA64_CR(pta)
  27.519 +
  27.520 +IA64_CR(ipsr)
  27.521 +IA64_CR(isr)
  27.522 +
  27.523 +IA64_CR(iip)
  27.524 +IA64_CR(ifa)
  27.525 +IA64_CR(itir)
  27.526 +IA64_CR(iipa)
  27.527 +IA64_CR(ifs)
  27.528 +IA64_CR(iim)
  27.529 +IA64_CR(iha)
  27.530 +
  27.531 +IA64_CR(lid)
  27.532 +IA64_CR(ivr)
  27.533 +IA64_CR(tpr)
  27.534 +IA64_CR(eoi)
  27.535 +IA64_CR(irr0)
  27.536 +IA64_CR(irr1)
  27.537 +IA64_CR(irr2)
  27.538 +IA64_CR(irr3)
  27.539 +IA64_CR(itv)
  27.540 +IA64_CR(pmv)
  27.541 +IA64_CR(cmcv)
  27.542 +
  27.543 +IA64_CR(lrr0)
  27.544 +IA64_CR(lrr1)
  27.545 +
  27.546 +#define IA64_GR(name)						\
  27.547 +								\
  27.548 +static __inline uint64_t					\
  27.549 +ia64_get_##name(void)						\
  27.550 +{								\
  27.551 +	uint64_t result;					\
  27.552 +	__asm __volatile("mov %0=" #name : "=r" (result));	\
  27.553 +	return result;						\
  27.554 +}								\
  27.555 +								\
  27.556 +static __inline void						\
  27.557 +ia64_set_##name(uint64_t v)					\
  27.558 +{								\
  27.559 +	__asm __volatile("mov " #name "=%0" :: "r" (v));	\
  27.560 +}
  27.561 +
  27.562 +IA64_GR(sp)
  27.563 +IA64_GR(b0)
  27.564 +IA64_GR(r13)	// tp
  27.565 +
  27.566 +
  27.567 +/*
  27.568 + * Write a region register.
  27.569 + */
  27.570 +static __inline void
  27.571 +ia64_set_rr(uint64_t rrbase, uint64_t v)
  27.572 +{
  27.573 +	__asm __volatile("mov rr[%0]=%1;; srlz.d;;"
  27.574 +			 :: "r"(rrbase), "r"(v) : "memory");
  27.575 +}
  27.576 +
  27.577 +/*
  27.578 + * Read a region register.
  27.579 + */
  27.580 +static __inline uint64_t
  27.581 +ia64_get_rr(uint64_t rrbase)
  27.582 +{
  27.583 +	uint64_t v;
  27.584 +	__asm __volatile("mov %1=rr[%0];;"
  27.585 +			 : "=r" (v) : "r"(rrbase) : "memory");
  27.586 +	return v;
  27.587 +}
  27.588 +
  27.589 +
  27.590 +/*
  27.591 + * Read a CPUID register.
  27.592 + */
  27.593 +static __inline uint64_t
  27.594 +ia64_get_cpuid(int i)
  27.595 +{
  27.596 +	uint64_t result;
  27.597 +	__asm __volatile("mov %0=cpuid[%1]"
  27.598 +			 : "=r" (result) : "r"(i));
  27.599 +	return result;
  27.600 +}
  27.601 +
  27.602 +
  27.603 +struct trap_frame
  27.604 +{
  27.605 +	uint64_t	rsc;
  27.606 +	uint64_t	ndirty;		/* number of dirty regs */
  27.607 +	uint64_t	ssd;
  27.608 +	uint64_t	iip;		/* interrupted ip */
  27.609 +	uint64_t	ipsr;		/* interrupted psr */
  27.610 +	uint64_t	ifs;		/* interruption func status register */
  27.611 +
  27.612 +	uint16_t	trap_num;	/* Trap num, index in trap_vec */
  27.613 +	uint64_t	cfm;		/* current frame marker */
  27.614 +	uint64_t	pfs;		/* previous function state ar64 */
  27.615 +	uint64_t	bsp;		/* backing store pointer ar17 */
  27.616 +	uint64_t	rnat;		/* rse nat collection ar19 */
  27.617 +	uint64_t	csd;		/* comp and store data reg ar25 */
  27.618 +	uint64_t	ccv;		/* comp and xchange val reg ar32 */
  27.619 +	uint64_t	unat;		/* */
  27.620 +	uint64_t	fpsr;		/* floating point state reg ar40 */
  27.621 +	uint64_t	pr;		/* predicate regs 0-63 */
  27.622 +
  27.623 +	uint64_t	gp;		/* the gp pointer */
  27.624 +	uint64_t	sp;		/* stack pointer */
  27.625 +	uint64_t	tp;		/* thread pointer */
  27.626 +
  27.627 +	uint64_t	r2;		/* global reg 2 */
  27.628 +	uint64_t	r3;
  27.629 +	uint64_t	r8;
  27.630 +	uint64_t	r9;
  27.631 +	uint64_t	r10;
  27.632 +	uint64_t	r11;
  27.633 +	uint64_t	r14;
  27.634 +	uint64_t	r15;
  27.635 +	uint64_t	r16;
  27.636 +	uint64_t	r17;
  27.637 +	uint64_t	r18;
  27.638 +	uint64_t	r19;
  27.639 +	uint64_t	r20;
  27.640 +	uint64_t	r21;
  27.641 +	uint64_t	r22;
  27.642 +	uint64_t	r23;
  27.643 +	uint64_t	r24;
  27.644 +	uint64_t	r25;
  27.645 +	uint64_t	r26;
  27.646 +	uint64_t	r27;
  27.647 +	uint64_t	r28;
  27.648 +	uint64_t	r29;
  27.649 +	uint64_t	r30;
  27.650 +	uint64_t	r31;
  27.651 +
  27.652 +	uint64_t	b0;
  27.653 +	uint64_t	b6;
  27.654 +	uint64_t	b7;
  27.655 +
  27.656 +	ia64_fpreg_t	f6;           /* floating point register 6 */
  27.657 +	ia64_fpreg_t	f7;
  27.658 +	ia64_fpreg_t	f8;
  27.659 +	ia64_fpreg_t	f9;
  27.660 +	ia64_fpreg_t	f10;
  27.661 +	ia64_fpreg_t	f11;
  27.662 +
  27.663 +	uint64_t	ifa;		/* interruption faulting address */
  27.664 +	uint64_t	isr;		/* interruption status register */
  27.665 +	uint64_t	iim;		/* interruption immediate register */
  27.666 +};
  27.667 +
  27.668 +typedef struct trap_frame trap_frame_t;
  27.669 +
  27.670 +
  27.671 +#endif  /* __ASSEMBLY__ */
  27.672 +
  27.673 +/* Page access parameters. */
  27.674 +#define PTE_P_SHIFT	0
  27.675 +#define PTE_P		1
  27.676 +
  27.677 +#define PTE_MA_SHIFT	2
  27.678 +#define PTE_MA_WB	0
  27.679 +
  27.680 +#define PTE_A_SHIFT	5
  27.681 +#define PTE_A		1
  27.682 +#define PTE_D_SHIFT	6
  27.683 +#define PTE_D		1
  27.684 +
  27.685 +#define PTE_AR_SHIFT	9
  27.686 +#define PTE_AR_R	0
  27.687 +#define PTE_AR_RX	1
  27.688 +#define PTE_AR_RW	2
  27.689 +#define PTE_AR_RWX	3
  27.690 +#define PTE_AR_R_RW	4
  27.691 +#define PTE_AR_RX_RWX	5
  27.692 +#define PTE_AR_RWX_RW	6
  27.693 +/* privilege level */
  27.694 +#define PTE_PL_SHIFT	7
  27.695 +#define PTE_PL_KERN	0	/* used for kernel */
  27.696 +/* page size */
  27.697 +#define PTE_PS_4K	12
  27.698 +#define PTE_PS_8K	13
  27.699 +#define PTE_PS_16K	14
  27.700 +#define PTE_PS_64K	16
  27.701 +#define PTE_PS_256K	18
  27.702 +#define PTE_PS_1M	20
  27.703 +#define PTE_PS_4M	22
  27.704 +#define PTE_PS_16M	24
  27.705 +#define PTE_PS_64M	26
  27.706 +#define PTE_PS_256M	28
  27.707 +
  27.708 +
  27.709 +	/* Some offsets for ia64_pte_t. */
  27.710 +#define PTE_OFF_P	0
  27.711 +#define PTE_OFF_MA	3
  27.712 +#define PTE_OFF_A	5
  27.713 +#define PTE_OFF_D	6
  27.714 +#define PTE_OFF_PL	7
  27.715 +#define PTE_OFF_AR	9
  27.716 +#define PTE_OFF_PPN	12
  27.717 +#define PTE_OFF_ED	52
  27.718 +
  27.719 +#if !defined(_ASM) && !defined(__ASSEMBLY__)
  27.720 +/*
  27.721 + * A short-format VHPT entry. Also matches the TLB insertion format.
  27.722 + */
  27.723 +typedef struct
  27.724 +{
  27.725 +#if defined(BIG_ENDIAN)
  27.726 +	uint64_t pte_ig	:11;	/* bits 53..63 */
  27.727 +	uint64_t pte_ed	:1;	/* bits 52..52 */
  27.728 +	uint64_t pte_rv2:2;	/* bits 50..51 */
  27.729 +	uint64_t pte_ppn:38;	/* bits 12..49 */
  27.730 +	uint64_t pte_ar	:3;	/* bits 9..11 */
  27.731 +	uint64_t pte_pl	:2;	/* bits 7..8 */
  27.732 +	uint64_t pte_d	:1;	/* bits 6..6 */
  27.733 +	uint64_t pte_a	:1;	/* bits 5..5 */
  27.734 +	uint64_t pte_ma	:3;	/* bits 2..4 */
  27.735 +	uint64_t pte_rv1:1;	/* bits 1..1 */
  27.736 +	uint64_t pte_p	:1;	/* bits 0..0 */
  27.737 +#else
  27.738 +	uint64_t pte_p	:1;	/* bits 0..0 */
  27.739 +	uint64_t pte_rv1:1;	/* bits 1..1 */
  27.740 +	uint64_t pte_ma	:3;	/* bits 2..4 */
  27.741 +	uint64_t pte_a	:1;	/* bits 5..5 */
  27.742 +	uint64_t pte_d	:1;	/* bits 6..6 */
  27.743 +	uint64_t pte_pl	:2;	/* bits 7..8 */
  27.744 +	uint64_t pte_ar	:3;	/* bits 9..11 */
  27.745 +	uint64_t pte_ppn:38;	/* bits 12..49 */
  27.746 +	uint64_t pte_rv2:2;	/* bits 50..51 */
  27.747 +	uint64_t pte_ed	:1;	/* bits 52..52 */
  27.748 +	uint64_t pte_ig	:11;	/* bits 53..63 */
  27.749 +#endif
  27.750 +} ia64_pte_t;
  27.751 +
  27.752 +
  27.753 +/*
  27.754 + * A long-format VHPT entry.
  27.755 + */
  27.756 +typedef struct
  27.757 +{
  27.758 +	uint64_t pte_p		:1;	/* bits 0..0 */
  27.759 +	uint64_t pte_rv1	:1;	/* bits 1..1 */
  27.760 +	uint64_t pte_ma		:3;	/* bits 2..4 */
  27.761 +	uint64_t pte_a		:1;	/* bits 5..5 */
  27.762 +	uint64_t pte_d		:1;	/* bits 6..6 */
  27.763 +	uint64_t pte_pl		:2;	/* bits 7..8 */
  27.764 +	uint64_t pte_ar		:3;	/* bits 9..11 */
  27.765 +	uint64_t pte_ppn	:38;	/* bits 12..49 */
  27.766 +	uint64_t pte_rv2	:2;	/* bits 50..51 */
  27.767 +	uint64_t pte_ed		:1;	/* bits 52..52 */
  27.768 +	uint64_t pte_ig		:11;	/* bits 53..63 */
  27.769 +	uint64_t pte_rv3	:2;	/* bits 0..1 */
  27.770 +	uint64_t pte_ps		:6;	/* bits 2..7 */
  27.771 +	uint64_t pte_key	:24;	/* bits 8..31 */
  27.772 +	uint64_t pte_rv4	:32;	/* bits 32..63 */
  27.773 +	uint64_t pte_tag;		/* includes ti */
  27.774 +	uint64_t pte_chain;		/* pa of collision chain */
  27.775 +} ia64_lpte_t;
  27.776 +
  27.777 +#endif /* __ASSEMBLY__ */
  27.778 +
  27.779 +#endif /* _IA64_CPU_H_ */
    28.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    28.2 +++ b/extras/mini-os/include/ia64/ia64_fpu.h	Thu Feb 15 13:13:36 2007 -0700
    28.3 @@ -0,0 +1,99 @@
    28.4 +/*
    28.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    28.6 + * This code is mostly taken from FreeBSD.
    28.7 + *
    28.8 + ****************************************************************************
    28.9 + *
   28.10 + * Redistribution and use in source and binary forms, with or without
   28.11 + * modification, are permitted provided that the following conditions
   28.12 + * are met:
   28.13 + * 1. Redistributions of source code must retain the above copyright
   28.14 + *    notice, this list of conditions and the following disclaimer.
   28.15 + * 2. Redistributions in binary form must reproduce the above copyright
   28.16 + *    notice, this list of conditions and the following disclaimer in the
   28.17 + *    documentation and/or other materials provided with the distribution.
   28.18 + *
   28.19 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   28.20 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   28.21 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   28.22 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   28.23 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   28.24 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   28.25 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   28.26 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   28.27 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   28.28 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28.29 + * SUCH DAMAGE.
   28.30 + *
   28.31 + */
   28.32 +
   28.33 +#ifndef _IA64_FPU_H_
   28.34 +#define _IA64_FPU_H_
   28.35 +
   28.36 +#include "os.h"
   28.37 +
   28.38 +/*
   28.39 + * Floating point status register bits.
   28.40 + */
   28.41 +#define IA64_FPSR_TRAP_VD	UL_CONST(0x0000000000000001)
   28.42 +#define IA64_FPSR_TRAP_DD	UL_CONST(0x0000000000000002)
   28.43 +#define IA64_FPSR_TRAP_ZD	UL_CONST(0x0000000000000004)
   28.44 +#define IA64_FPSR_TRAP_OD	UL_CONST(0x0000000000000008)
   28.45 +#define IA64_FPSR_TRAP_UD	UL_CONST(0x0000000000000010)
   28.46 +#define IA64_FPSR_TRAP_ID	UL_CONST(0x0000000000000020)
   28.47 +#define IA64_FPSR_SF(i,v)	((v) << ((i)*13+6))
   28.48 +
   28.49 +#define IA64_SF_FTZ		UL_CONST(0x0001)
   28.50 +#define IA64_SF_WRE		UL_CONST(0x0002)
   28.51 +#define IA64_SF_PC		UL_CONST(0x000c)
   28.52 +#define IA64_SF_PC_0		UL_CONST(0x0000)
   28.53 +#define IA64_SF_PC_1		UL_CONST(0x0004)
   28.54 +#define IA64_SF_PC_2		UL_CONST(0x0008)
   28.55 +#define IA64_SF_PC_3		UL_CONST(0x000c)
   28.56 +#define IA64_SF_RC		UL_CONST(0x0030)
   28.57 +#define IA64_SF_RC_NEAREST	UL_CONST(0x0000)
   28.58 +#define IA64_SF_RC_NEGINF	UL_CONST(0x0010)
   28.59 +#define IA64_SF_RC_POSINF	UL_CONST(0x0020)
   28.60 +#define IA64_SF_RC_TRUNC	UL_CONST(0x0030)
   28.61 +#define IA64_SF_TD		UL_CONST(0x0040)
   28.62 +#define IA64_SF_V		UL_CONST(0x0080)
   28.63 +#define IA64_SF_D		UL_CONST(0x0100)
   28.64 +#define IA64_SF_Z		UL_CONST(0x0200)
   28.65 +#define IA64_SF_O		UL_CONST(0x0400)
   28.66 +#define IA64_SF_U		UL_CONST(0x0800)
   28.67 +#define IA64_SF_I		UL_CONST(0x1000)
   28.68 +
   28.69 +#define IA64_SF_DEFAULT	(IA64_SF_PC_3 | IA64_SF_RC_NEAREST)
   28.70 +
   28.71 +#define IA64_FPSR_DEFAULT	(IA64_FPSR_TRAP_VD			\
   28.72 +				 | IA64_FPSR_TRAP_DD			\
   28.73 +				 | IA64_FPSR_TRAP_ZD			\
   28.74 +				 | IA64_FPSR_TRAP_OD			\
   28.75 +				 | IA64_FPSR_TRAP_UD			\
   28.76 +				 | IA64_FPSR_TRAP_ID			\
   28.77 +				 | IA64_FPSR_SF(0, IA64_SF_DEFAULT)	\
   28.78 +				 | IA64_FPSR_SF(1, (IA64_SF_DEFAULT	\
   28.79 +						    | IA64_SF_TD	\
   28.80 +						    | IA64_SF_WRE))	\
   28.81 +				 | IA64_FPSR_SF(2, (IA64_SF_DEFAULT	\
   28.82 +						    | IA64_SF_TD))	\
   28.83 +				 | IA64_FPSR_SF(3, (IA64_SF_DEFAULT	\
   28.84 +						    | IA64_SF_TD)))
   28.85 +
   28.86 +
   28.87 +#ifndef __ASSEMBLY__
   28.88 +
   28.89 +	/* This is from sys/cdefs.h in FreeBSD */
   28.90 +#define __aligned(x)    __attribute__((__aligned__(x)))
   28.91 +
   28.92 +	/* A single Floating Point register. */
   28.93 +struct ia64_fpreg
   28.94 +{
   28.95 +	uint8_t	fpr_bits[16];
   28.96 +} __aligned(16);
   28.97 +
   28.98 +typedef struct ia64_fpreg ia64_fpreg_t;
   28.99 +
  28.100 +#endif /* __ASSEMBLY__ */
  28.101 +
  28.102 +#endif /* _IA64_FPU_H_ */
    29.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    29.2 +++ b/extras/mini-os/include/ia64/os.h	Thu Feb 15 13:13:36 2007 -0700
    29.3 @@ -0,0 +1,319 @@
    29.4 +/*
    29.5 + * Copyright (C) 2007 - Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    29.6 + *
    29.7 + ****************************************************************************
    29.8 + * Permission is hereby granted, free of charge, to any person obtaining a copy
    29.9 + * of this software and associated documentation files (the "Software"), to
   29.10 + * deal in the Software without restriction, including without limitation the
   29.11 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   29.12 + * sell copies of the Software, and to permit persons to whom the Software is
   29.13 + * furnished to do so, subject to the following conditions:
   29.14 + * 
   29.15 + * The above copyright notice and this permission notice shall be included in
   29.16 + * all copies or substantial portions of the Software.
   29.17 + * 
   29.18 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   29.19 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   29.20 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   29.21 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   29.22 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   29.23 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   29.24 + * DEALINGS IN THE SOFTWARE.
   29.25 + */
   29.26 +
   29.27 +
   29.28 +#if !defined(__OS_H__)
   29.29 +#define __OS_H__
   29.30 +
   29.31 +#if !defined(__ASSEMBLY__)
   29.32 +
   29.33 +#include "types.h"
   29.34 +#include "endian.h"
   29.35 +#include "ia64_cpu.h"
   29.36 +#include "atomic.h"
   29.37 +#include "efi.h"
   29.38 +#include "sal.h"
   29.39 +#include "pal.h"
   29.40 +#include "hypervisor.h"
   29.41 +
   29.42 +
   29.43 +typedef uint64_t paddr_t;		/* Physical address. */
   29.44 +typedef uint64_t caddr_t;		/* rr7/kernel memory address. */
   29.45 +
   29.46 +#include "page.h"
   29.47 +#include "mm.h"
   29.48 +
   29.49 +
   29.50 +void do_exit(void);
   29.51 +void arch_init(start_info_t *si);	/* in common.c */
   29.52 +void arch_print_info(void);		/* in common.c */
   29.53 +
   29.54 +
   29.55 +/* Size of xen_ia64_boot_param.command_line */
   29.56 +#define COMMAND_LINE_SIZE       512
   29.57 +
   29.58 +struct xen_ia64_boot_param* ia64_boot_paramP;
   29.59 +extern struct xen_ia64_boot_param ia64BootParamG;
   29.60 +extern char boot_cmd_line[];
   29.61 +extern efi_system_table_t* efiSysTableP;
   29.62 +extern int bootverbose;
   29.63 +
   29.64 +extern void ia64_probe_sapics(void);
   29.65 +
   29.66 +
   29.67 +
   29.68 +/* Contains the needed stuff from efi. */
   29.69 +struct efi
   29.70 +{
   29.71 +
   29.72 +	efi_system_table_t*		efiSysTableP;
   29.73 +	efi_set_virtual_address_map_t	setVirtAddrMapF;
   29.74 +	efi_get_time_t			getTimeF;
   29.75 +	efi_reset_system_t		resetSystemF;
   29.76 +
   29.77 +};
   29.78 +
   29.79 +struct machine_fw
   29.80 +{
   29.81 +	struct efi efi;
   29.82 +
   29.83 +	uint64_t ia64_port_base;	/* physical address */
   29.84 +	uint64_t ia64_pal_base;		/* virtual rr7 address */
   29.85 +
   29.86 +	sal_system_table_t* ia64_sal_tableP;
   29.87 +	sal_entry_t* ia64_sal_entryP;	/* SAL_PROC entrypoint */
   29.88 +
   29.89 +	uint64_t ia64_efi_acpi_table;	/* physical address */
   29.90 +	uint64_t ia64_efi_acpi20_table;	/* physical address */
   29.91 +
   29.92 +	uint64_t mach_mem_start;	/* phys start addr of machine memory */
   29.93 +	uint64_t mach_mem_size;		/* size of machine memory */
   29.94 +
   29.95 +	uint64_t kernstart;		/* virt address of kern text start */
   29.96 +	uint64_t kernend;
   29.97 +	uint64_t kernpstart;		/* phys address of kern text start */
   29.98 +	uint64_t kernpend;
   29.99 +};
  29.100 +
  29.101 +extern struct machine_fw machineFwG;
  29.102 +
  29.103 +#define ia64_sal_entry machineFwG.ia64_sal_entryP
  29.104 +
  29.105 +#define smp_processor_id() 0
  29.106 +
  29.107 +static inline uint64_t
  29.108 +xchg8(uint64_t* ptr, uint64_t x)                                               \
  29.109 +{
  29.110 +        uint64_t oldVal;
  29.111 +        asm volatile ("xchg8 %0=[%1],%2" : "=r" (oldVal)
  29.112 +                      : "r" (ptr), "r" (x) : "memory");
  29.113 +        return oldVal;
  29.114 +}
  29.115 +#define xchg xchg8
  29.116 +
  29.117 +// Counts the number of 1-bits in x.
  29.118 +#if __GNUC__ >= 4 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
  29.119 +# define get_popcnt(x)         __builtin_popcountl(x)
  29.120 +#else
  29.121 +# define get_popcnt(x)					\
  29.122 +  ({							\
  29.123 +	uint64_t num;					\
  29.124 +	asm ("popcnt %0=%1" : "=r" (num) : "r" (x));	\
  29.125 +	num;						\
  29.126 +  })
  29.127 +#endif
  29.128 +
  29.129 +/**
  29.130 + * __ffs - find first bit in word.
  29.131 + * @x: The word to search
  29.132 + *
  29.133 + * Undefined if no bit exists, so code should check against 0 first.
  29.134 + */
  29.135 +static inline unsigned long
  29.136 +__ffs (unsigned long x)
  29.137 +{
  29.138 +	unsigned long result;
  29.139 +
  29.140 +	result = get_popcnt((x-1) & ~x);
  29.141 +	return result;
  29.142 +}
  29.143 +
  29.144 +
  29.145 +static inline void
  29.146 +synch_clear_bit(int num, volatile void *addr)
  29.147 +{
  29.148 +	clear_bit(num, addr);
  29.149 +}
  29.150 +
  29.151 +static inline void
  29.152 +synch_set_bit(int num, volatile void *addr)
  29.153 +{
  29.154 +	set_bit(num, addr);
  29.155 +}
  29.156 +
  29.157 +static inline int
  29.158 +synch_test_bit(int nr, const volatile void *addr)
  29.159 +{
  29.160 +	return test_bit(nr, addr);
  29.161 +}
  29.162 +
  29.163 +static inline int
  29.164 +synch_test_and_set_bit(int num, volatile void * addr)
  29.165 +{
  29.166 +	return test_and_set_bit(num, addr);
  29.167 +}
  29.168 +
  29.169 +
  29.170 +#define synch_cmpxchg(ptr, old, new) \
  29.171 +((__typeof__(*(ptr)))__synch_cmpxchg((ptr),\
  29.172 +                                     (unsigned long)(old), \
  29.173 +                                     (unsigned long)(new), \
  29.174 +                                     sizeof(*(ptr))))
  29.175 +
  29.176 +static inline unsigned long
  29.177 +__synch_cmpxchg(volatile void *ptr, uint64_t old, uint64_t new, int size)
  29.178 +{
  29.179 +	switch (size)
  29.180 +	{
  29.181 +		case 1:
  29.182 +			return ia64_cmpxchg_acq_8(ptr, old, new);
  29.183 +		case 2:
  29.184 +			return ia64_cmpxchg_acq_16(ptr, old, new);
  29.185 +		case 4:
  29.186 +			return ia64_cmpxchg_acq_32(ptr, old, new);
  29.187 +		case 8:
  29.188 +			return ia64_cmpxchg_acq_64(ptr, old, new);
  29.189 +	}
  29.190 +	return ia64_cmpxchg_acq_64(ptr, old, new);
  29.191 +}
  29.192 +
  29.193 +/*
  29.194 + * Force a proper event-channel callback from Xen after clearing the
  29.195 + * callback mask. We do this in a very simple manner, by making a call
  29.196 + * down into Xen. The pending flag will be checked by Xen on return.
  29.197 + */
  29.198 +static inline void
  29.199 +force_evtchn_callback(void)
  29.200 +{
  29.201 +	(void)HYPERVISOR_xen_version(0, NULL);
  29.202 +}
  29.203 +
  29.204 +extern shared_info_t *HYPERVISOR_shared_info;
  29.205 +
  29.206 +static inline int
  29.207 +HYPERVISOR_shutdown(unsigned int reason)
  29.208 +{
  29.209 +	struct sched_shutdown sched_shutdown = {
  29.210 +		.reason = reason
  29.211 +	};
  29.212 +
  29.213 +	int rc = HYPERVISOR_sched_op(SCHEDOP_shutdown, &sched_shutdown);
  29.214 +
  29.215 +	if (rc == -ENOSYS)
  29.216 +		rc = HYPERVISOR_sched_op_compat(SCHEDOP_shutdown, reason);
  29.217 +
  29.218 +	return rc;
  29.219 +}
  29.220 +
  29.221 +
  29.222 +/*
  29.223 + * This code is from the originally os.h and should be put in a
  29.224 + * common header file!
  29.225 + */
  29.226 +
  29.227 +/* 
  29.228 + * The use of 'barrier' in the following reflects their use as local-lock
  29.229 + * operations. Reentrancy must be prevented (e.g., __cli()) /before/ following
  29.230 + * critical operations are executed. All critical operations must complete
  29.231 + * /before/ reentrancy is permitted (e.g., __sti()). Alpha architecture also
  29.232 + * includes these barriers, for example.
  29.233 + */
  29.234 +
  29.235 +#define __cli()								\
  29.236 +do {									\
  29.237 +	vcpu_info_t *_vcpu;						\
  29.238 +	_vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()];	\
  29.239 +	_vcpu->evtchn_upcall_mask = SWAP(1);				\
  29.240 +	barrier();							\
  29.241 +} while (0)
  29.242 +
  29.243 +#define __sti()								\
  29.244 +do {									\
  29.245 +	vcpu_info_t *_vcpu;						\
  29.246 +	barrier();							\
  29.247 +	_vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()];	\
  29.248 +	_vcpu->evtchn_upcall_mask = 0;					\
  29.249 +	barrier(); /* unmask then check (avoid races) */		\
  29.250 +	if (unlikely(SWAP(_vcpu->evtchn_upcall_pending)))		\
  29.251 +		force_evtchn_callback();				\
  29.252 +} while (0)
  29.253 +
  29.254 +#define __save_flags(x)							\
  29.255 +do {									\
  29.256 +	vcpu_info_t *_vcpu;						\
  29.257 +	_vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()];	\
  29.258 +	(x) = SWAP(_vcpu->evtchn_upcall_mask);				\
  29.259 +} while (0)
  29.260 +
  29.261 +#define __restore_flags(x)						\
  29.262 +do {									\
  29.263 +	vcpu_info_t *_vcpu;						\
  29.264 +	barrier();							\
  29.265 +	_vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()];	\
  29.266 +	if ((_vcpu->evtchn_upcall_mask = (x)) == 0) {			\
  29.267 +		barrier(); /* unmask then check (avoid races) */	\
  29.268 +		if ( unlikely(SWAP(_vcpu->evtchn_upcall_pending)) )	\
  29.269 +			force_evtchn_callback();			\
  29.270 +	}\
  29.271 +} while (0)
  29.272 +
  29.273 +#define safe_halt()		((void)0)
  29.274 +
  29.275 +#define __save_and_cli(x)						\
  29.276 +do {									\
  29.277 +	vcpu_info_t *_vcpu;						\
  29.278 +	_vcpu = &HYPERVISOR_shared_info->vcpu_info[smp_processor_id()];	\
  29.279 +	(x) = SWAP(_vcpu->evtchn_upcall_mask);				\
  29.280 +	_vcpu->evtchn_upcall_mask = SWAP(1);				\
  29.281 +	barrier();							\
  29.282 +} while (0)
  29.283 +
  29.284 +#define local_irq_save(x)	__save_and_cli(x)
  29.285 +#define local_irq_restore(x)	__restore_flags(x)
  29.286 +#define local_save_flags(x)	__save_flags(x)
  29.287 +#define local_irq_disable()	__cli()
  29.288 +#define local_irq_enable()	__sti()
  29.289 +
  29.290 +#define irqs_disabled()			\
  29.291 +	SWAP(HYPERVISOR_shared_info->vcpu_info[smp_processor_id()].evtchn_upcall_mask)
  29.292 +
  29.293 +/* This is a barrier for the compiler only, NOT the processor! */
  29.294 +#define barrier() __asm__ __volatile__("": : :"memory")
  29.295 +
  29.296 +#define mb()	ia64_mf()
  29.297 +#define rmb()	mb()
  29.298 +#define wmb()	mb()
  29.299 +
  29.300 +
  29.301 +#define BUG()	\
  29.302 +	{ printk("mini-os BUG at %s:%d!\n", __FILE__, __LINE__); do_exit(); }
  29.303 +
  29.304 +#define PRINT_BV(_fmt, _params...)		\
  29.305 +	if (bootverbose)			\
  29.306 +		printk(_fmt , ## _params)
  29.307 +
  29.308 +#endif /* !defined(__ASSEMBLY__) */
  29.309 +
  29.310 +#if defined(__ASSEMBLY__)
  29.311 +
  29.312 +#define UL_CONST(x)	x
  29.313 +#define UL_TYPE(x)	x
  29.314 +
  29.315 +#else /* defined(__ASSEMBLY__) */
  29.316 +
  29.317 +#define UL_CONST(x)	x##UL
  29.318 +#define UL_TYPE(x)	((uint64_t)x)
  29.319 +
  29.320 +#endif /* defined(__ASSEMBLY__) */
  29.321 +
  29.322 +#endif /* !defined(__OS_H__) */
    30.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    30.2 +++ b/extras/mini-os/include/ia64/page.h	Thu Feb 15 13:13:36 2007 -0700
    30.3 @@ -0,0 +1,106 @@
    30.4 +/*
    30.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    30.6 + * Common stuff for memory and page handling.
    30.7 + * Parts are taken from FreeBSD.
    30.8 + *
    30.9 + ****************************************************************************
   30.10 + * Permission is hereby granted, free of charge, to any person obtaining a copy
   30.11 + * of this software and associated documentation files (the "Software"), to
   30.12 + * deal in the Software without restriction, including without limitation the
   30.13 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   30.14 + * sell copies of the Software, and to permit persons to whom the Software is
   30.15 + * furnished to do so, subject to the following conditions:
   30.16 + * 
   30.17 + * The above copyright notice and this permission notice shall be included in
   30.18 + * all copies or substantial portions of the Software.
   30.19 + * 
   30.20 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   30.21 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   30.22 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   30.23 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   30.24 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   30.25 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   30.26 + * DEALINGS IN THE SOFTWARE.
   30.27 + */
   30.28 +
   30.29 +
   30.30 +#if !defined(_PAGE_H_)
   30.31 +#define _PAGE_H_
   30.32 +
   30.33 +#include "os.h"
   30.34 +#include "ia64_cpu.h"
   30.35 +
   30.36 +#define PTE_KERNEL_ATTR ((PTE_P<<PTE_P_SHIFT)		|\
   30.37 +			(PTE_MA_WB<<PTE_MA_SHIFT)	|\
   30.38 +			(PTE_D<<PTE_D_SHIFT)		|\
   30.39 +			(PTE_A<<PTE_A_SHIFT)		|\
   30.40 +			(PTE_PL_KERN<<PTE_PL_SHIFT)	|\
   30.41 +			(PTE_AR_RWX<<PTE_AR_SHIFT))
   30.42 +
   30.43 +
   30.44 +/* The kernel tr page size for text and data. */
   30.45 +#define KERNEL_TR_PAGE_SIZE	PTE_PS_1M
   30.46 +/* The efi-pal page size for text and data. */
   30.47 +#define PAL_TR_PAGE_SIZE	PTE_PS_1M
   30.48 +
   30.49 +/* Commonly 16K pages are used. */
   30.50 +#define PAGE_SHIFT	14	/* 16K pages */
   30.51 +#define PAGE_SIZE	(1<<(PAGE_SHIFT))
   30.52 +#define PAGE_MASK	(~(PAGE_SIZE-1))
   30.53 +
   30.54 +#define KSTACK_PAGES	4	/* 4 pages for the kernel stack + bsp */
   30.55 +
   30.56 +#define IA64_TR_KERNEL	0       /* itr0, dtr0: maps kernel image (code) */
   30.57 +#define IA64_TR_PAL	1       /* itr1: maps pal code */
   30.58 +
   30.59 +/*
   30.60 + * Manipulating region bits of an address.
   30.61 + */
   30.62 +#define IA64_RR_BASE(n)		((UL_TYPE(n)) << 61)
   30.63 +#define IA64_RR_MASK(x)		((UL_TYPE(x)) & ((1L << 61) - 1))
   30.64 +#define IA64_RR_EXTR(x)		((x) >> 61)
   30.65 +
   30.66 +#define IA64_PHYS_TO_RR5(x)	((x) | IA64_RR_BASE(5))
   30.67 +#define IA64_PHYS_TO_RR7(x)	((x) | IA64_RR_BASE(7))
   30.68 +
   30.69 +#define __pa(x)	IA64_RR_MASK(x)
   30.70 +#define __va(x)	IA64_PHYS_TO_RR7(x)
   30.71 +
   30.72 +#define roundup_page(x)	((((unsigned long)(x)) + PAGE_SIZE -1) & PAGE_MASK)
   30.73 +#define trunc_page(x)	((unsigned long)(x) & PAGE_MASK)
   30.74 +
   30.75 +
   30.76 +#if !defined(__ASSEMBLY__)
   30.77 +
   30.78 +/* Contains the parts of the physically memory. */
   30.79 +extern paddr_t phys_avail[];
   30.80 +
   30.81 +#define page_to_pfn(page)	((uint64_t)(page) >> PAGE_SHIFT)
   30.82 +#define pfn_to_page(pfn)	((uint64_t)pfn << PAGE_SHIFT)
   30.83 +/* Get phyiscal address of page of virtual address. */
   30.84 +#define virt_to_page(addr)	((uint64_t)__pa(addr) & PAGE_MASK)
   30.85 +#define virt_to_pfn(addr)	(page_to_pfn(virt_to_page(addr)))
   30.86 +
   30.87 +
   30.88 +#endif /* __ASSEMBLY__ */
   30.89 +
   30.90 +
   30.91 +/* For both see minios-ia64.lds. */
   30.92 +/* This is where the kernel virtually starts. */
   30.93 +#define KERNEL_START	IA64_PHYS_TO_RR5(0x100000000)
   30.94 +/* !!!!!
   30.95 + * For physical start of kernel
   30.96 + * Currently used in arch/ia64/fw.S.
   30.97 + * !!!!!
   30.98 + */
   30.99 +#define KERNEL_PHYS_START_SHIFT	20
  30.100 +
  30.101 +/* A region 5 address to physical address */
  30.102 +#define KERN_VIRT_2_PHYS(x) (((x) - KERNEL_START) + \
  30.103 +				(1 << KERNEL_PHYS_START_SHIFT))
  30.104 +
  30.105 +// This is xen specific !
  30.106 +#define PAGE_SHIFT_XEN_16K	14	// For 16KB page size
  30.107 +#define mfn_to_virt(mfn)	((void*)__va((mfn) << PAGE_SHIFT_XEN_16K))
  30.108 +
  30.109 +#endif /* !defined(_PAGE_H_) */
    31.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    31.2 +++ b/extras/mini-os/include/ia64/pal.h	Thu Feb 15 13:13:36 2007 -0700
    31.3 @@ -0,0 +1,87 @@
    31.4 +/*
    31.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    31.6 + * The code is mostly taken from FreeBSD.
    31.7 + *
    31.8 + ****************************************************************************
    31.9 + *
   31.10 + * Redistribution and use in source and binary forms, with or without
   31.11 + * modification, are permitted provided that the following conditions
   31.12 + * are met:
   31.13 + * 1. Redistributions of source code must retain the above copyright
   31.14 + *    notice, this list of conditions and the following disclaimer.
   31.15 + * 2. Redistributions in binary form must reproduce the above copyright
   31.16 + *    notice, this list of conditions and the following disclaimer in the
   31.17 + *    documentation and/or other materials provided with the distribution.
   31.18 + *
   31.19 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   31.20 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   31.21 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   31.22 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   31.23 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   31.24 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   31.25 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   31.26 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   31.27 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   31.28 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   31.29 + * SUCH DAMAGE.
   31.30 + *
   31.31 + */
   31.32 +
   31.33 +#ifndef _PAL_H_
   31.34 +#define _PAL_H_
   31.35 +
   31.36 +/*
   31.37 + * Architected static calling convention procedures.
   31.38 + */
   31.39 +#define PAL_CACHE_FLUSH		1
   31.40 +#define PAL_CACHE_INFO		2
   31.41 +#define PAL_CACHE_INIT		3
   31.42 +#define PAL_CACHE_SUMMARY	4
   31.43 +#define PAL_MEM_ATTRIB		5
   31.44 +#define PAL_PTCE_INFO		6
   31.45 +#define PAL_VM_INFO		7
   31.46 +#define PAL_VM_SUMMARY		8
   31.47 +#define PAL_BUS_GET_FEATURES	9
   31.48 +#define PAL_BUS_SET_FEATURES	10
   31.49 +#define PAL_DEBUG_INFO		11
   31.50 +#define PAL_FIXED_ADDR		12
   31.51 +#define PAL_FREQ_BASE		13
   31.52 +#define PAL_FREQ_RATIOS		14
   31.53 +#define PAL_PERF_MON_INFO	15
   31.54 +#define PAL_PLATFORM_ADDR	16
   31.55 +#define PAL_PROC_GET_FEATURE	17
   31.56 +#define PAL_PROC_SET_FEATURE	18
   31.57 +#define PAL_RSE_INFO		19
   31.58 +#define PAL_VERSION		20
   31.59 +#define PAL_MC_CLEAR_LOG	21
   31.60 +#define PAL_MC_DRAIN		22
   31.61 +#define PAL_MC_DYNAMIC_STATE	24
   31.62 +#define PAL_MC_ERROR_INFO	25
   31.63 +#define PAL_MC_EXPECTED		23
   31.64 +#define PAL_MC_REGISTER_MEM	27
   31.65 +#define PAL_MC_RESUME		26
   31.66 +#define PAL_HALT		28
   31.67 +#define PAL_HALT_LIGHT		29
   31.68 +#define PAL_COPY_INFO		30
   31.69 +#define PAL_CACHE_LINE_INIT	31
   31.70 +#define PAL_PMI_ENTRYPOINT	32
   31.71 +#define PAL_ENTER_IA_32_ENV	33
   31.72 +#define PAL_VM_PAGE_SIZE	34
   31.73 +#define PAL_MEM_FOR_TEST	37
   31.74 +#define PAL_CACHE_PROT_INFO	38
   31.75 +#define PAL_REGISTER_INFO	39
   31.76 +#define PAL_SHUTDOWN		40
   31.77 +#define PAL_PREFETCH_VISIBILITY	41
   31.78 +
   31.79 +
   31.80 +struct ia64_pal_result
   31.81 +{
   31.82 +	int64_t		pal_status;
   31.83 +	uint64_t	pal_result[3];
   31.84 +};
   31.85 +
   31.86 +extern struct ia64_pal_result
   31.87 +	ia64_call_pal_static(uint64_t proc, uint64_t arg1,
   31.88 +			     uint64_t arg2, uint64_t arg3);
   31.89 +
   31.90 +#endif /* _PAL_H_ */
    32.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    32.2 +++ b/extras/mini-os/include/ia64/privop.h	Thu Feb 15 13:13:36 2007 -0700
    32.3 @@ -0,0 +1,97 @@
    32.4 +
    32.5 +/*
    32.6 + * Copyright (C) 2005 Hewlett-Packard Co
    32.7 + *	Dan Magenheimer <dan.magenheimer@hp.com>
    32.8 + *
    32.9 + * Paravirtualizations of privileged operations for Xen/ia64
   32.10 + *
   32.11 + */
   32.12 +
   32.13 +#ifndef _PRIVOP_H_
   32.14 +#define _PRIVOP_H_
   32.15 +
   32.16 +#include <xen/arch-ia64.h>
   32.17 +
   32.18 +#define IA64_PARAVIRTUALIZED
   32.19 +
   32.20 +/* At 1 MB, before per-cpu space but still addressable using addl instead
   32.21 +   of movl. */
   32.22 +#define XSI_BASE		0xfffffffffff00000
   32.23 +
   32.24 +/* Address of mapped regs.  */
   32.25 +#define XMAPPEDREGS_BASE	(XSI_BASE + XSI_SIZE)
   32.26 +
   32.27 +#ifdef __ASSEMBLY__
   32.28 +#define	XEN_HYPER_RFI		break HYPERPRIVOP_RFI
   32.29 +#define	XEN_HYPER_RSM_PSR_DT	break HYPERPRIVOP_RSM_DT
   32.30 +#define	XEN_HYPER_SSM_PSR_DT	break HYPERPRIVOP_SSM_DT
   32.31 +#define	XEN_HYPER_COVER		break HYPERPRIVOP_COVER
   32.32 +#define	XEN_HYPER_ITC_D		break HYPERPRIVOP_ITC_D
   32.33 +#define	XEN_HYPER_ITC_I		break HYPERPRIVOP_ITC_I
   32.34 +#define	XEN_HYPER_SSM_I		break HYPERPRIVOP_SSM_I
   32.35 +#define	XEN_HYPER_GET_IVR	break HYPERPRIVOP_GET_IVR
   32.36 +#define	XEN_HYPER_GET_TPR	break HYPERPRIVOP_GET_TPR
   32.37 +#define	XEN_HYPER_SET_TPR	break HYPERPRIVOP_SET_TPR
   32.38 +#define	XEN_HYPER_EOI		break HYPERPRIVOP_EOI
   32.39 +#define	XEN_HYPER_SET_ITM	break HYPERPRIVOP_SET_ITM
   32.40 +#define	XEN_HYPER_THASH		break HYPERPRIVOP_THASH
   32.41 +#define	XEN_HYPER_PTC_GA	break HYPERPRIVOP_PTC_GA
   32.42 +#define	XEN_HYPER_ITR_D		break HYPERPRIVOP_ITR_D
   32.43 +#define	XEN_HYPER_GET_RR	break HYPERPRIVOP_GET_RR
   32.44 +#define	XEN_HYPER_SET_RR	break HYPERPRIVOP_SET_RR
   32.45 +#define	XEN_HYPER_SET_KR	break HYPERPRIVOP_SET_KR
   32.46 +#define	XEN_HYPER_FC		break HYPERPRIVOP_FC
   32.47 +#define	XEN_HYPER_GET_CPUID	break HYPERPRIVOP_GET_CPUID
   32.48 +#define	XEN_HYPER_GET_PMD	break HYPERPRIVOP_GET_PMD
   32.49 +#define	XEN_HYPER_GET_EFLAG	break HYPERPRIVOP_GET_EFLAG
   32.50 +#define	XEN_HYPER_SET_EFLAG	break HYPERPRIVOP_SET_EFLAG
   32.51 +#define	XEN_HYPER_RSM_BE	break HYPERPRIVOP_RSM_BE
   32.52 +#define	XEN_HYPER_GET_PSR	break HYPERPRIVOP_GET_PSR
   32.53 +
   32.54 +#define XSI_IFS			(XSI_BASE + XSI_IFS_OFS)
   32.55 +#define XSI_PRECOVER_IFS	(XSI_BASE + XSI_PRECOVER_IFS_OFS)
   32.56 +#define XSI_INCOMPL_REGFR	(XSI_BASE + XSI_INCOMPL_REGFR_OFS)
   32.57 +#define XSI_IFA			(XSI_BASE + XSI_IFA_OFS)
   32.58 +#define XSI_ISR			(XSI_BASE + XSI_ISR_OFS)
   32.59 +#define XSI_IIM			(XSI_BASE + XSI_IIM_OFS)
   32.60 +#define XSI_ITIR		(XSI_BASE + XSI_ITIR_OFS)
   32.61 +#define XSI_PSR_I_ADDR		(XSI_BASE + XSI_PSR_I_ADDR_OFS)
   32.62 +#define XSI_PSR_IC		(XSI_BASE + XSI_PSR_IC_OFS)
   32.63 +#define XSI_IPSR		(XSI_BASE + XSI_IPSR_OFS)
   32.64 +#define XSI_IIP			(XSI_BASE + XSI_IIP_OFS)
   32.65 +#define XSI_BANK1_R16		(XSI_BASE + XSI_BANK1_R16_OFS)
   32.66 +#define XSI_BANKNUM		(XSI_BASE + XSI_BANKNUM_OFS)
   32.67 +#define XSI_IHA			(XSI_BASE + XSI_IHA_OFS)
   32.68 +#endif
   32.69 +
   32.70 +#ifndef __ASSEMBLY__
   32.71 +#define	XEN_HYPER_SSM_I		asm("break %0" : : "i" (HYPERPRIVOP_SSM_I))
   32.72 +#define	XEN_HYPER_GET_IVR	asm("break %0" : : "i" (HYPERPRIVOP_GET_IVR))
   32.73 +
   32.74 +/************************************************/
   32.75 +/* Instructions paravirtualized for performance */
   32.76 +/************************************************/
   32.77 +
   32.78 +/* Xen uses memory-mapped virtual privileged registers for access to many
   32.79 + * performance-sensitive privileged registers.  Some, like the processor
   32.80 + * status register (psr), are broken up into multiple memory locations.
   32.81 + * Others, like "pend", are abstractions based on privileged registers.
   32.82 + * "Pend" is guaranteed to be set if reading cr.ivr would return a
   32.83 + * (non-spurious) interrupt. */
   32.84 +#define XEN_MAPPEDREGS ((struct mapped_regs *)XMAPPEDREGS_BASE)
   32.85 +#define XSI_PSR_I			\
   32.86 +	(*XEN_MAPPEDREGS->interrupt_mask_addr)
   32.87 +#define xen_get_virtual_psr_i()		\
   32.88 +	(!XSI_PSR_I)
   32.89 +#define xen_set_virtual_psr_i(_val)	\
   32.90 +	({ XSI_PSR_I = (uint8_t)(_val) ? 0 : 1; })
   32.91 +#define xen_get_virtual_psr_ic()	\
   32.92 +	( XEN_MAPPEDREGS->interrupt_collection_enabled )
   32.93 +#define xen_set_virtual_psr_ic(_val)	\
   32.94 +	({ XEN_MAPPEDREGS->interrupt_collection_enabled = _val ? 1 : 0; })
   32.95 +#define xen_get_virtual_pend()		(XEN_MAPPEDREGS->pending_interruption)
   32.96 +
   32.97 +#endif /* __ASSEMBLY__ */
   32.98 +
   32.99 +#endif /* _PRIVOP_H_ */
  32.100 +
    33.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    33.2 +++ b/extras/mini-os/include/ia64/sal.h	Thu Feb 15 13:13:36 2007 -0700
    33.3 @@ -0,0 +1,188 @@
    33.4 +/*
    33.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    33.6 + * The code is mostly taken from FreeBSD.
    33.7 + *
    33.8 + ****************************************************************************
    33.9 + *
   33.10 + * Redistribution and use in source and binary forms, with or without
   33.11 + * modification, are permitted provided that the following conditions
   33.12 + * are met:
   33.13 + * 1. Redistributions of source code must retain the above copyright
   33.14 + *    notice, this list of conditions and the following disclaimer.
   33.15 + * 2. Redistributions in binary form must reproduce the above copyright
   33.16 + *    notice, this list of conditions and the following disclaimer in the
   33.17 + *    documentation and/or other materials provided with the distribution.
   33.18 + *
   33.19 + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   33.20 + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   33.21 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   33.22 + * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   33.23 + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   33.24 + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   33.25 + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   33.26 + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   33.27 + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   33.28 + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   33.29 + * SUCH DAMAGE.
   33.30 + *
   33.31 + */
   33.32 +
   33.33 +
   33.34 +/*
   33.35 + * The SAL System Table starts with a header which is described in
   33.36 + * sal_system_table_t.
   33.37 + * Table header will be followed by a variable number of variable length
   33.38 + * entries. The first byte of each entry will identify the entry type and
   33.39 + * the entries shall be in ascending order by the entry type. Each entry
   33.40 + * type will have a known fixed length. The total length of this table
   33.41 + * depends upon the configuration of the system. Operating system software
   33.42 + * must step through each entry until it reaches the ENTRY_COUNT. The entries
   33.43 + * are sorted on entry type in ascending order.
   33.44 + * Unless otherwise stated, there is one entry per entry type.
   33.45 + */
   33.46 +
   33.47 +#ifndef _SAL_H_
   33.48 +#define _SAL_H_
   33.49 +
   33.50 +typedef uint64_t u_int64_t;
   33.51 +typedef uint32_t u_int32_t;
   33.52 +typedef uint16_t u_int16_t;
   33.53 +typedef uint8_t u_int8_t;
   33.54 +
   33.55 +struct sal_system_table {
   33.56 +	char		sal_signature[4];
   33.57 +#define	SAL_SIGNATURE	"SST_"
   33.58 +	uint32_t	sal_length;
   33.59 +	uint8_t		sal_rev[2];	/* Byte 8 - Minor, Byte 0 - Major */
   33.60 +	uint16_t	sal_entry_count;	// num entries in var part
   33.61 +	uint8_t		sal_checksum;
   33.62 +	uint8_t		sal_reserved1[7];
   33.63 +	uint8_t		sal_a_version[2];	// like sal_rev
   33.64 +	uint8_t		sal_b_version[2];	// like sal_rev
   33.65 +	char		sal_oem_id[32];		// Ascii - manufacturer of HW
   33.66 +	char		sal_product_id[32];	// ascii - identification
   33.67 +	uint8_t		sal_reserved2[8];
   33.68 +};
   33.69 +
   33.70 +typedef struct sal_system_table sal_system_table_t;
   33.71 +
   33.72 +#define SAL_DESC_ENTRYPOINT		0
   33.73 +#define SAL_DESC_ENTRYPOINT_LENGTH	48
   33.74 +#define SAL_DESC_MEMORY			1
   33.75 +#define SAL_DESC_MEMORY_LENGTH		32
   33.76 +#define SAL_DESC_PLATFORM		2
   33.77 +#define SAL_DESC_PLATFORM_LENGT		16
   33.78 +#define SAL_DESC_TR_REG			3
   33.79 +#define SAL_DESC_TR_REG_LENGTH		32
   33.80 +#define SAL_DESC_PURGE_TR_CACHE		4
   33.81 +#define SAL_DESC_PURGE_TR_CACHE_LENGTH	16
   33.82 +#define SAL_DESC_AP_WAKEUP		5
   33.83 +#define SAL_DESC_AP_WAKEUP_LENGTH	16
   33.84 +
   33.85 +
   33.86 +struct sal_entrypoint_descriptor
   33.87 +{
   33.88 +	uint8_t		sale_type;		/* == 0 */
   33.89 +	uint8_t		sale_reserved1[7];
   33.90 +	uint64_t	sale_pal_proc;		/* PAL_PROC entry point */
   33.91 +	uint64_t	sale_sal_proc;		/* SAL_PROC entry point */
   33.92 +	uint64_t	sale_sal_gp;		/* gp for SAL_PROC, PAL_PROC */
   33.93 +	uint8_t		sale_reserved2[16];
   33.94 +};
   33.95 +
   33.96 +struct sal_memory_descriptor
   33.97 +{
   33.98 +	uint8_t		sale_type;	/* == 1 */
   33.99 +	uint8_t		sale_need_virtual;
  33.100 +	uint8_t		sale_current_attribute;
  33.101 +	uint8_t		sale_access_rights;
  33.102 +	uint8_t		sale_supported_attributes;
  33.103 +	uint8_t		sale_reserved1;
  33.104 +	uint8_t		sale_memory_type[2];
  33.105 +	uint64_t	sale_physical_address;
  33.106 +	uint32_t	sale_length;
  33.107 +	uint8_t		sale_reserved2[12];
  33.108 +};
  33.109 +
  33.110 +struct sal_platform_descriptor
  33.111 +{
  33.112 +	uint8_t		sale_type;	/* == 2 */
  33.113 +	uint8_t		sale_features;
  33.114 +	uint8_t		sale_reserved[14];
  33.115 +};
  33.116 +
  33.117 +struct sal_tr_descriptor
  33.118 +{
  33.119 +	u_int8_t	sale_type;	/* == 3 */
  33.120 +	u_int8_t	sale_register_type;
  33.121 +	u_int8_t	sale_register_number;
  33.122 +	u_int8_t	sale_reserved1[5];
  33.123 +	u_int64_t	sale_virtual_address;
  33.124 +	u_int64_t	sale_page_size;
  33.125 +	u_int8_t	sale_reserved2[8];
  33.126 +};
  33.127 +
  33.128 +struct sal_ptc_cache_descriptor
  33.129 +{
  33.130 +	uint8_t		sale_type;	/* == 4 */
  33.131 +	uint8_t		sale_reserved[3];
  33.132 +	uint32_t	sale_domains;
  33.133 +	uint64_t	sale_address;
  33.134 +};
  33.135 +
  33.136 +struct sal_ap_wakeup_descriptor
  33.137 +{
  33.138 +	uint8_t		sale_type;	/* == 5 */
  33.139 +	uint8_t		sale_mechanism;
  33.140 +	uint8_t		sale_reserved[6];
  33.141 +	uint64_t	sale_vector;
  33.142 +};
  33.143 +
  33.144 +/*
  33.145 + * SAL Procedure numbers.
  33.146 + */
  33.147 +
  33.148 +#define SAL_SET_VECTORS			0x01000000
  33.149 +#define SAL_GET_STATE_INFO		0x01000001
  33.150 +#define SAL_GET_STATE_INFO_SIZE		0x01000002
  33.151 +#define SAL_CLEAR_STATE_INFO		0x01000003
  33.152 +#define SAL_MC_RENDEZ			0x01000004
  33.153 +#define SAL_MC_SET_PARAMS		0x01000005
  33.154 +#define SAL_REGISTER_PHYSICAL_ADDR	0x01000006
  33.155 +#define SAL_CACHE_FLUSH			0x01000008
  33.156 +#define SAL_CACHE_INIT			0x01000009
  33.157 +#define SAL_PCI_CONFIG_READ		0x01000010
  33.158 +#define SAL_PCI_CONFIG_WRITE		0x01000011
  33.159 +#define SAL_FREQ_BASE			0x01000012
  33.160 +#define SAL_UPDATE_PAL			0x01000020
  33.161 +
  33.162 +/* SAL_SET_VECTORS event handler types */
  33.163 +#define	SAL_OS_MCA		0
  33.164 +#define	SAL_OS_INIT		1
  33.165 +#define	SAL_OS_BOOT_RENDEZ	2
  33.166 +
  33.167 +/* SAL_GET_STATE_INFO, SAL_GET_STATE_INFO_SIZE types */
  33.168 +#define	SAL_INFO_MCA		0
  33.169 +#define	SAL_INFO_INIT		1
  33.170 +#define	SAL_INFO_CMC		2
  33.171 +#define	SAL_INFO_CPE		3
  33.172 +#define	SAL_INFO_TYPES		4	/* number of types we know about */
  33.173 +
  33.174 +struct ia64_sal_result
  33.175 +{
  33.176 +	int64_t		sal_status;
  33.177 +	uint64_t	sal_result[3];
  33.178 +};
  33.179 +typedef struct ia64_sal_result ia64_sal_result_t;
  33.180 +
  33.181 +typedef ia64_sal_result_t sal_entry_t
  33.182 +	(	uint64_t, uint64_t, uint64_t, uint64_t,
  33.183 +	 	uint64_t, uint64_t, uint64_t, uint64_t
  33.184 +	);
  33.185 +
  33.186 +extern ia64_sal_result_t ia64_sal_call(uint64_t, uint64_t, uint64_t, uint64_t,
  33.187 +	 				uint64_t, uint64_t, uint64_t, uint64_t);
  33.188 +
  33.189 +extern void ia64_sal_init(sal_system_table_t *saltab);
  33.190 +
  33.191 +#endif /* _SAL_H_ */
    34.1 --- /dev/null	Thu Jan 01 00:00:00 1970 +0000
    34.2 +++ b/extras/mini-os/include/ia64/traps.h	Thu Feb 15 13:13:36 2007 -0700
    34.3 @@ -0,0 +1,48 @@
    34.4 +/*
    34.5 + * Done by Dietmar Hahn <dietmar.hahn@fujitsu-siemens.com>
    34.6 + *
    34.7 + ****************************************************************************
    34.8 + * Permission is hereby granted, free of charge, to any person obtaining a copy
    34.9 + * of this software and associated documentation files (the "Software"), to
   34.10 + * deal in the Software without restriction, including without limitation the
   34.11 + * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
   34.12 + * sell copies of the Software, and to permit persons to whom the Software is
   34.13 + * furnished to do so, subject to the following conditions:
   34.14 + * 
   34.15 + * The above copyright notice and this permission notice shall be included in
   34.16 + * all copies or substantial portions of the Software.
   34.17 + * 
   34.18 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
   34.19 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
   34.20 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
   34.21 + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
   34.22 + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
   34.23 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
   34.24 + * DEALINGS IN THE SOFTWARE.
   34.25 + */
   34.26 +
   34.27 +#if !defined(_TRAPS_H_)
   34.28 +#define _TRAPS_H_
   34.29 +
   34.30 +#if !defined(__ASSEMBLY__)
   34.31 +
   34.32 +/* See ia64_cpu.h */
   34.33 +struct trap_frame;
   34.34 +
   34.35 +#define pt_regs trap_frame
   34.36 +
   34.37 +/*
   34.38 + * A dummy function, which is currently not supported.
   34.39 + */
   34.40 +inline static void trap_init(void)
   34.41 +{
   34.42 +	//printk("trap_init() until now not needed!\n");
   34.43 +}
   34.44 +
   34.45 +
   34.46 +#endif /* !defined(__ASSEMBLY__) */
   34.47 +
   34.48 +#include "ia64_cpu.h"
   34.49 +
   34.50 +#endif /* !defined(_TRAPS_H_) */
   34.51 +