1.1 --- a/xen/arch/ia64/vmx/pal_emul.c	Mon Jul 03 08:15:43 2006 -0600
     1.2 +++ b/xen/arch/ia64/vmx/pal_emul.c	Mon Jul 03 08:27:24 2006 -0600
     1.3 @@ -24,6 +24,8 @@
     1.4  #include <asm/dom_fw.h>
     1.5  #include <asm/tlb.h>
     1.6  #include <asm/vmx_mm_def.h>
     1.7 +#include <xen/hypercall.h>
     1.8 +#include <public/sched.h>
     1.9  
    1.10  static void
    1.11  get_pal_parameters (VCPU *vcpu, UINT64 *gr29,
    1.12 @@ -123,9 +125,11 @@ pal_halt (VCPU *vcpu) {
    1.13  static struct ia64_pal_retval
    1.14  pal_halt_light (VCPU *vcpu) {
    1.15  	struct ia64_pal_retval result;
    1.16 -
    1.17 -	result.status= -1; //unimplemented
    1.18 -
    1.19 +	
    1.20 +	if(SPURIOUS_VECTOR==vmx_check_pending_irq(vcpu))
    1.21 +		do_sched_op_compat(SCHEDOP_block,0);
    1.22 +	    
    1.23 +	result.status= 0;
    1.24  	return result;
    1.25  }
    1.26  

     2.1 --- a/xen/arch/ia64/vmx/vlsapic.c	Mon Jul 03 08:15:43 2006 -0600
     2.2 +++ b/xen/arch/ia64/vmx/vlsapic.c	Mon Jul 03 08:27:24 2006 -0600
     2.3 @@ -103,6 +103,7 @@ static void vtm_timer_fn(void *data)
     2.4      vitv = VCPU(vcpu, itv);
     2.5      if ( !ITV_IRQ_MASK(vitv) ){
     2.6          vmx_vcpu_pend_interrupt(vcpu, vitv & 0xff);
     2.7 +        vcpu_unblock(vcpu);
     2.8      }
     2.9      vtm=&(vcpu->arch.arch_vmx.vtm);
    2.10      cur_itc = now_itc(vtm);
    2.11 @@ -551,8 +552,7 @@ void vmx_vcpu_pend_batch_interrupt(VCPU 
    2.12   * it into the guest. Otherwise, we set the VHPI if vac.a_int=1 so that when 
    2.13   * the interrupt becomes unmasked, it gets injected.
    2.14   * RETURN:
    2.15 - *  TRUE:   Interrupt is injected.
    2.16 - *  FALSE:  Not injected but may be in VHPI when vac.a_int=1
    2.17 + *    the highest unmasked interrupt.
    2.18   *
    2.19   * Optimization: We defer setting the VHPI until the EOI time, if a higher 
    2.20   *               priority interrupt is in-service. The idea is to reduce the 
    2.21 @@ -562,13 +562,15 @@ int vmx_check_pending_irq(VCPU *vcpu)
    2.22  {
    2.23      uint64_t  spsr, mask;
    2.24      int     h_pending, h_inservice;
    2.25 -    int injected=0;
    2.26      uint64_t    isr;
    2.27      IA64_PSR    vpsr;
    2.28      REGS *regs=vcpu_regs(vcpu);
    2.29      local_irq_save(spsr);
    2.30      h_pending = highest_pending_irq(vcpu);
    2.31 -    if ( h_pending == NULL_VECTOR ) goto chk_irq_exit;
    2.32 +    if ( h_pending == NULL_VECTOR ) {
    2.33 +        h_pending = SPURIOUS_VECTOR;
    2.34 +        goto chk_irq_exit;
    2.35 +    }
    2.36      h_inservice = highest_inservice_irq(vcpu);
    2.37  
    2.38      vpsr.val = vmx_vcpu_get_psr(vcpu);
    2.39 @@ -578,7 +580,6 @@ int vmx_check_pending_irq(VCPU *vcpu)
    2.40          if ( !vpsr.ic )
    2.41              panic_domain(regs,"Interrupt when IC=0\n");
    2.42          vmx_reflect_interruption(0,isr,0, 12, regs ); // EXT IRQ
    2.43 -        injected = 1;
    2.44      }
    2.45      else if ( mask == IRQ_MASKED_BY_INSVC ) {
    2.46          // cann't inject VHPI
    2.47 @@ -591,7 +592,7 @@ int vmx_check_pending_irq(VCPU *vcpu)
    2.48  
    2.49  chk_irq_exit:
    2.50      local_irq_restore(spsr);
    2.51 -    return injected;
    2.52 +    return h_pending;
    2.53  }
    2.54  
    2.55  /*

     3.1 --- a/xen/arch/ia64/xen/vcpu.c	Mon Jul 03 08:15:43 2006 -0600
     3.2 +++ b/xen/arch/ia64/xen/vcpu.c	Mon Jul 03 08:27:24 2006 -0600
     3.3 @@ -266,7 +266,6 @@ IA64FAULT vcpu_reset_psr_sm(VCPU *vcpu, 
     3.4  	return IA64_NO_FAULT;
     3.5  }
     3.6  
     3.7 -#define SPURIOUS_VECTOR 0xf
     3.8  
     3.9  IA64FAULT vcpu_set_psr_dt(VCPU *vcpu)
    3.10  {

     4.1 --- a/xen/include/asm-ia64/vcpu.h	Mon Jul 03 08:15:43 2006 -0600
     4.2 +++ b/xen/include/asm-ia64/vcpu.h	Mon Jul 03 08:27:24 2006 -0600
     4.3 @@ -20,6 +20,7 @@ typedef cpu_user_regs_t REGS;
     4.4  #define PSCB(_v,_x) VCPU(_v,_x)
     4.5  #define PSCBX(_v,_x) (_v->arch._x)
     4.6  
     4.7 +#define SPURIOUS_VECTOR 0xf
     4.8  
     4.9  /* general registers */
    4.10  extern UINT64 vcpu_get_gr(VCPU *vcpu, unsigned long reg);