ia64/xen-unstable

changeset 8101:a90691f5207c

Hardcode many cpu features for x86/64 -- we know 64-bit
cpus have many features by default.

Signed-off-by: Keir Fraser <keir@xensource.com>
author kaf24@firebug.cl.cam.ac.uk
date Mon Nov 28 17:37:15 2005 +0100 (2005-11-28)
parents 5ea875b72e0a
children 82e48750542c
files xen/include/asm-x86/cpufeature.h
line diff
     1.1 --- a/xen/include/asm-x86/cpufeature.h	Mon Nov 28 16:24:14 2005 +0100
     1.2 +++ b/xen/include/asm-x86/cpufeature.h	Mon Nov 28 17:37:15 2005 +0100
     1.3 @@ -94,7 +94,7 @@
     1.4  #define cpu_has(c, bit)		test_bit(bit, (c)->x86_capability)
     1.5  #define boot_cpu_has(bit)	test_bit(bit, boot_cpu_data.x86_capability)
     1.6  
     1.7 -#define cpu_has_fpu		boot_cpu_has(X86_FEATURE_FPU)
     1.8 +#ifdef __i386__
     1.9  #define cpu_has_vme		boot_cpu_has(X86_FEATURE_VME)
    1.10  #define cpu_has_de		boot_cpu_has(X86_FEATURE_DE)
    1.11  #define cpu_has_pse		boot_cpu_has(X86_FEATURE_PSE)
    1.12 @@ -102,7 +102,6 @@
    1.13  #define cpu_has_pae		boot_cpu_has(X86_FEATURE_PAE)
    1.14  #define cpu_has_pge		boot_cpu_has(X86_FEATURE_PGE)
    1.15  #define cpu_has_apic		boot_cpu_has(X86_FEATURE_APIC)
    1.16 -#define cpu_has_sep		boot_cpu_has(X86_FEATURE_SEP)
    1.17  #define cpu_has_mtrr		boot_cpu_has(X86_FEATURE_MTRR)
    1.18  #define cpu_has_mmx		boot_cpu_has(X86_FEATURE_MMX)
    1.19  #define cpu_has_fxsr		boot_cpu_has(X86_FEATURE_FXSR)
    1.20 @@ -115,10 +114,29 @@
    1.21  #define cpu_has_k6_mtrr		boot_cpu_has(X86_FEATURE_K6_MTRR)
    1.22  #define cpu_has_cyrix_arr	boot_cpu_has(X86_FEATURE_CYRIX_ARR)
    1.23  #define cpu_has_centaur_mcr	boot_cpu_has(X86_FEATURE_CENTAUR_MCR)
    1.24 -#define cpu_has_xstore		boot_cpu_has(X86_FEATURE_XSTORE)
    1.25 -#define cpu_has_xstore_enabled	boot_cpu_has(X86_FEATURE_XSTORE_EN)
    1.26 -#define cpu_has_xcrypt		boot_cpu_has(X86_FEATURE_XCRYPT)
    1.27 -#define cpu_has_xcrypt_enabled	boot_cpu_has(X86_FEATURE_XCRYPT_EN)
    1.28 +#define cpu_has_clflush		boot_cpu_has(X86_FEATURE_CLFLSH)
    1.29 +#else /* __x86_64__ */
    1.30 +#define cpu_has_vme		0
    1.31 +#define cpu_has_de		1
    1.32 +#define cpu_has_pse		1
    1.33 +#define cpu_has_tsc		1
    1.34 +#define cpu_has_pae		1
    1.35 +#define cpu_has_pge		1
    1.36 +#define cpu_has_apic		boot_cpu_has(X86_FEATURE_APIC)
    1.37 +#define cpu_has_mtrr		1
    1.38 +#define cpu_has_mmx		1
    1.39 +#define cpu_has_fxsr		1
    1.40 +#define cpu_has_xmm		1
    1.41 +#define cpu_has_xmm2		1
    1.42 +#define cpu_has_xmm3		boot_cpu_has(X86_FEATURE_XMM3)
    1.43 +#define cpu_has_ht		boot_cpu_has(X86_FEATURE_HT)
    1.44 +#define cpu_has_mp		1
    1.45 +#define cpu_has_nx		boot_cpu_has(X86_FEATURE_NX)
    1.46 +#define cpu_has_k6_mtrr		0
    1.47 +#define cpu_has_cyrix_arr	0
    1.48 +#define cpu_has_centaur_mcr	0
    1.49 +#define cpu_has_clflush		boot_cpu_has(X86_FEATURE_CLFLSH)
    1.50 +#endif
    1.51  
    1.52  #endif /* __ASM_I386_CPUFEATURE_H */
    1.53